FR2301923A1 - Procede pour l'elimination de composants parasites dans les circuits integres - Google Patents
Procede pour l'elimination de composants parasites dans les circuits integresInfo
- Publication number
- FR2301923A1 FR2301923A1 FR7603862A FR7603862A FR2301923A1 FR 2301923 A1 FR2301923 A1 FR 2301923A1 FR 7603862 A FR7603862 A FR 7603862A FR 7603862 A FR7603862 A FR 7603862A FR 2301923 A1 FR2301923 A1 FR 2301923A1
- Authority
- FR
- France
- Prior art keywords
- elimination
- procedure
- integrated circuits
- parasite components
- parasite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008030 elimination Effects 0.000 title 1
- 238000003379 elimination reaction Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 244000045947 parasite Species 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/06—Gettering
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2507366A DE2507366C3 (de) | 1975-02-20 | 1975-02-20 | Verfahren zur Unterdrückung parasitärer Schaltungselemente |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2301923A1 true FR2301923A1 (fr) | 1976-09-17 |
FR2301923B1 FR2301923B1 (US06826419-20041130-M00005.png) | 1978-08-18 |
Family
ID=5939404
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7603862A Granted FR2301923A1 (fr) | 1975-02-20 | 1976-02-12 | Procede pour l'elimination de composants parasites dans les circuits integres |
Country Status (7)
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0168325A2 (en) * | 1984-07-11 | 1986-01-15 | Fairchild Semiconductor Corporation | Ion implantation to increase emitter energy gap in bipolar transistors |
EP0197948A1 (en) * | 1984-09-28 | 1986-10-22 | Motorola, Inc. | Charge storage depletion region discharge protection |
WO1987001868A1 (en) * | 1985-09-11 | 1987-03-26 | Robert Bosch Gmbh | Monolithically-integrated semiconductor devices |
EP0253059A2 (en) * | 1986-03-20 | 1988-01-20 | Hitachi, Ltd. | Process for suppressing the rise of the buried layer of a semiconductor device |
FR2762138A1 (fr) * | 1997-04-11 | 1998-10-16 | Sgs Thomson Microelectronics | Transistor mos a fort gradient de dopage sous sa grille |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53129589A (en) * | 1977-04-18 | 1978-11-11 | Fujitsu Ltd | Integrated circuit unit |
US4155778A (en) * | 1977-12-30 | 1979-05-22 | International Business Machines Corporation | Forming semiconductor devices having ion implanted and diffused regions |
US4210925A (en) * | 1978-02-07 | 1980-07-01 | Harris Corporation | I2 L Integrated circuit and process of fabrication |
US4140558A (en) * | 1978-03-02 | 1979-02-20 | Bell Telephone Laboratories, Incorporated | Isolation of integrated circuits utilizing selective etching and diffusion |
US4252581A (en) * | 1979-10-01 | 1981-02-24 | International Business Machines Corporation | Selective epitaxy method for making filamentary pedestal transistor |
JPS5658870U (US06826419-20041130-M00005.png) * | 1980-10-02 | 1981-05-20 | ||
JPS58210659A (ja) * | 1982-06-01 | 1983-12-07 | Nec Corp | 半導体装置およびその製造方法 |
US4507848A (en) * | 1982-11-22 | 1985-04-02 | Fairchild Camera & Instrument Corporation | Control of substrate injection in lateral bipolar transistors |
JPS6031231A (ja) * | 1983-07-29 | 1985-02-18 | Toshiba Corp | 半導体基体の製造方法 |
JPS6031232A (ja) * | 1983-07-29 | 1985-02-18 | Toshiba Corp | 半導体基体の製造方法 |
JPS61107027U (US06826419-20041130-M00005.png) * | 1984-12-20 | 1986-07-07 | ||
US4717677A (en) * | 1985-08-19 | 1988-01-05 | Motorola Inc. | Fabricating a semiconductor device with buried oxide |
US4819040A (en) * | 1986-05-02 | 1989-04-04 | Motorola, Inc. | Epitaxial CMOS by oxygen implantation |
IT1231913B (it) * | 1987-10-23 | 1992-01-15 | Sgs Microelettronica Spa | Procedimento di fabbricazione di transistori ad alta frequenza. |
US5250445A (en) * | 1988-12-20 | 1993-10-05 | Texas Instruments Incorporated | Discretionary gettering of semiconductor circuits |
US5289024A (en) * | 1990-08-07 | 1994-02-22 | National Semiconductor Corporation | Bipolar transistor with diffusion compensation |
US5384477A (en) * | 1993-03-09 | 1995-01-24 | National Semiconductor Corporation | CMOS latchup suppression by localized minority carrier lifetime reduction |
DE10232176A1 (de) * | 2002-07-16 | 2004-02-05 | Infineon Technologies Ag | Bipolarer Hochfrequenztransistor und Verfahren zur Herstellung desselben |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1564169A1 (de) * | 1966-08-06 | 1970-01-08 | Ibm Deutschland | Verfahren zur gegenseitigen elektrischen Isolierung verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefassten aktiver Schaltelemente mit Hilfe in Sperrichtung vorgespannter PN-UEbergaenge |
FR2024916A1 (US06826419-20041130-M00005.png) * | 1968-11-22 | 1970-09-04 | Western Electric Co |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3457632A (en) * | 1966-10-07 | 1969-07-29 | Us Air Force | Process for implanting buried layers in semiconductor devices |
US3515956A (en) * | 1967-10-16 | 1970-06-02 | Ion Physics Corp | High-voltage semiconductor device having a guard ring containing substitutionally active ions in interstitial positions |
US3533857A (en) * | 1967-11-29 | 1970-10-13 | Hughes Aircraft Co | Method of restoring crystals damaged by irradiation |
US3622382A (en) * | 1969-05-05 | 1971-11-23 | Ibm | Semiconductor isolation structure and method of producing |
US3666548A (en) * | 1970-01-06 | 1972-05-30 | Ibm | Monocrystalline semiconductor body having dielectrically isolated regions and method of forming |
US3840409A (en) * | 1970-03-16 | 1974-10-08 | Ibm | Insulating layer pedestal transistor device and process |
US3849204A (en) * | 1973-06-29 | 1974-11-19 | Ibm | Process for the elimination of interface states in mios structures |
JPS5179591A (US06826419-20041130-M00005.png) * | 1975-01-06 | 1976-07-10 | Hitachi Ltd |
-
1975
- 1975-02-20 DE DE2507366A patent/DE2507366C3/de not_active Expired
- 1975-11-18 GB GB47391/75A patent/GB1485540A/en not_active Expired
- 1975-12-23 CA CA242,415A patent/CA1033470A/en not_active Expired
-
1976
- 1976-01-09 US US05/647,857 patent/US4082571A/en not_active Expired - Lifetime
- 1976-02-11 IT IT20066/76A patent/IT1055198B/it active
- 1976-02-12 FR FR7603862A patent/FR2301923A1/fr active Granted
- 1976-02-20 JP JP1783476A patent/JPS5653223B2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1564169A1 (de) * | 1966-08-06 | 1970-01-08 | Ibm Deutschland | Verfahren zur gegenseitigen elektrischen Isolierung verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefassten aktiver Schaltelemente mit Hilfe in Sperrichtung vorgespannter PN-UEbergaenge |
FR2024916A1 (US06826419-20041130-M00005.png) * | 1968-11-22 | 1970-09-04 | Western Electric Co |
Non-Patent Citations (2)
Title |
---|
PAGE 1701.) * |
REVUE US "IBM" TECHNICAL DISCLOSURE BULLETIN", VOLUME 16, NO 6, NOVEMBRE 1973, "REDUCTION OF PARASITIC EFFECTS BY ION BOMBARDEMENT" M. GHAFGHAICHI ET AL * |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0168325A2 (en) * | 1984-07-11 | 1986-01-15 | Fairchild Semiconductor Corporation | Ion implantation to increase emitter energy gap in bipolar transistors |
EP0168325A3 (en) * | 1984-07-11 | 1988-01-20 | Fairchild Camera & Instrument Corporation | Ion implantation to increase emitter energy gap in bipolar transistors |
EP0197948A1 (en) * | 1984-09-28 | 1986-10-22 | Motorola, Inc. | Charge storage depletion region discharge protection |
EP0197948A4 (en) * | 1984-09-28 | 1988-01-07 | Motorola Inc | PROTECTION AGAINST THE DISCHARGE OF A DEPLETION AREA OF A LOAD MEMORY. |
WO1987001868A1 (en) * | 1985-09-11 | 1987-03-26 | Robert Bosch Gmbh | Monolithically-integrated semiconductor devices |
US4829360A (en) * | 1985-09-11 | 1989-05-09 | Robert Bosch Gmbh | Monolithic integrated semiconductor means to reduce power dissipation of a parasitic transistor |
EP0253059A2 (en) * | 1986-03-20 | 1988-01-20 | Hitachi, Ltd. | Process for suppressing the rise of the buried layer of a semiconductor device |
EP0253059A3 (en) * | 1986-03-20 | 1989-09-13 | Hitachi, Ltd. | Process for suppressing the rise of the buried layer of a semiconductor device |
FR2762138A1 (fr) * | 1997-04-11 | 1998-10-16 | Sgs Thomson Microelectronics | Transistor mos a fort gradient de dopage sous sa grille |
WO1998047173A1 (fr) * | 1997-04-11 | 1998-10-22 | Stmicroelectronics S.A. | Transistor mos a fort gradient de dopage sous sa grille |
US6465332B1 (en) | 1997-04-11 | 2002-10-15 | Stmicroelectronics S.A. | Method of making MOS transistor with high doping gradient under the gate |
Also Published As
Publication number | Publication date |
---|---|
GB1485540A (en) | 1977-09-14 |
DE2507366B2 (de) | 1979-10-04 |
DE2507366C3 (de) | 1980-06-26 |
IT1055198B (it) | 1981-12-21 |
JPS5653223B2 (US06826419-20041130-M00005.png) | 1981-12-17 |
US4082571A (en) | 1978-04-04 |
DE2507366A1 (de) | 1976-09-02 |
JPS51108787A (US06826419-20041130-M00005.png) | 1976-09-27 |
CA1033470A (en) | 1978-06-20 |
FR2301923B1 (US06826419-20041130-M00005.png) | 1978-08-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |