FR2191365B1 - - Google Patents

Info

Publication number
FR2191365B1
FR2191365B1 FR7320855*A FR7320855A FR2191365B1 FR 2191365 B1 FR2191365 B1 FR 2191365B1 FR 7320855 A FR7320855 A FR 7320855A FR 2191365 B1 FR2191365 B1 FR 2191365B1
Authority
FR
France
Prior art keywords
source
pulses
bit line
capacitive load
discharge path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7320855*A
Other languages
English (en)
French (fr)
Other versions
FR2191365A1 (US07923587-20110412-C00022.png
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2191365A1 publication Critical patent/FR2191365A1/fr
Application granted granted Critical
Publication of FR2191365B1 publication Critical patent/FR2191365B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
FR7320855*A 1972-06-29 1973-05-25 Expired FR2191365B1 (US07923587-20110412-C00022.png)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US26730272A 1972-06-29 1972-06-29
US05/444,437 US3995171A (en) 1972-06-29 1974-02-21 Decoder driver circuit for monolithic memories

Publications (2)

Publication Number Publication Date
FR2191365A1 FR2191365A1 (US07923587-20110412-C00022.png) 1974-02-01
FR2191365B1 true FR2191365B1 (US07923587-20110412-C00022.png) 1976-05-28

Family

ID=26952351

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7320855*A Expired FR2191365B1 (US07923587-20110412-C00022.png) 1972-06-29 1973-05-25

Country Status (8)

Country Link
US (1) US3995171A (US07923587-20110412-C00022.png)
AU (1) AU468399B2 (US07923587-20110412-C00022.png)
CA (1) CA1007371A (US07923587-20110412-C00022.png)
CH (1) CH549905A (US07923587-20110412-C00022.png)
FR (1) FR2191365B1 (US07923587-20110412-C00022.png)
GB (1) GB1375958A (US07923587-20110412-C00022.png)
NL (1) NL167788C (US07923587-20110412-C00022.png)
SE (1) SE388063B (US07923587-20110412-C00022.png)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042838A (en) * 1976-07-28 1977-08-16 Rockwell International Corporation MOS inverting power driver circuit
DE2641693C2 (de) * 1976-09-16 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decodierschaltung mit MOS-Transistoren
NL7704005A (nl) * 1977-04-13 1977-06-30 Philips Nv Geintegreerde schakeling.
JPS5484936A (en) * 1977-12-20 1979-07-06 Fujitsu Ltd Decoder circuit
US4354123A (en) * 1979-08-13 1982-10-12 Mostek Corporation High voltage clock generator
JPS56122526A (en) * 1980-03-03 1981-09-26 Fujitsu Ltd Semiconductor integrated circuit
US4500799A (en) * 1980-07-28 1985-02-19 Inmos Corporation Bootstrap driver circuits for an MOS memory
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
DE3266075D1 (en) * 1981-01-22 1985-10-17 Philips Corp Switching circuit
US4491748A (en) * 1981-04-16 1985-01-01 International Business Machines Corporation High performance FET driver circuit
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
US4782247A (en) * 1984-08-08 1988-11-01 Fujitsu Limited Decoder circuit having a variable power supply
FR2591789B1 (fr) * 1985-12-17 1988-02-19 Labo Electronique Physique Circuit decodeur pour memoire ram statique
US4963765A (en) * 1989-07-03 1990-10-16 Texas Instruments Incorporated High speed CMOS transition detector circuit
US5160860A (en) * 1991-09-16 1992-11-03 Advanced Micro Devices, Inc. Input transition responsive CMOS self-boost circuit
GB9414928D0 (en) * 1994-07-25 1994-09-14 Inmos Ltd Off-chip driver circuit
GB9419689D0 (en) * 1994-09-29 1994-11-16 Inmos Ltd Off-chip driver circuit
JP3190233B2 (ja) * 1995-08-22 2001-07-23 株式会社東芝 出力バッファ回路
US5764077A (en) * 1996-02-05 1998-06-09 Texas Instruments Incorporated 5 volt tolerant I/O buffer circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3567968A (en) * 1967-02-27 1971-03-02 North American Rockwell Gating system for reducing the effects of positive feedback noise in multiphase gating devices
US3579275A (en) * 1969-01-07 1971-05-18 North American Rockwell Isolation circuit for gating devices
US3564290A (en) * 1969-03-13 1971-02-16 Ibm Regenerative fet source follower
US3629618A (en) * 1970-08-27 1971-12-21 North American Rockwell Field effect transistor single-phase clock signal generator
US3702926A (en) * 1970-09-30 1972-11-14 Ibm Fet decode circuit
US3665473A (en) * 1970-12-18 1972-05-23 North American Rockwell Address decode logic for a semiconductor memory
US3758761A (en) * 1971-08-17 1973-09-11 Texas Instruments Inc Self-interconnecting/self-repairable electronic systems on a slice
US3801964A (en) * 1972-02-24 1974-04-02 Advanced Memory Sys Inc Semiconductor memory with address decoding
US3798616A (en) * 1972-04-14 1974-03-19 North American Rockwell Strobe driver including a memory circuit

Also Published As

Publication number Publication date
NL167788B (nl) 1981-08-17
SE388063B (sv) 1976-09-20
DE2331442B2 (de) 1975-07-24
US3995171A (en) 1976-11-30
GB1375958A (en) 1974-12-04
NL167788C (nl) 1982-01-18
AU5756473A (en) 1975-01-09
DE2331442A1 (de) 1974-01-17
CA1007371A (en) 1977-03-22
AU468399B2 (en) 1976-01-08
FR2191365A1 (US07923587-20110412-C00022.png) 1974-02-01
CH549905A (de) 1974-05-31
USB444437I5 (US07923587-20110412-C00022.png) 1976-03-09
NL7308696A (US07923587-20110412-C00022.png) 1974-01-02

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Legal Events

Date Code Title Description
ST Notification of lapse