FR2150161A5 - - Google Patents

Info

Publication number
FR2150161A5
FR2150161A5 FR7229446A FR7229446A FR2150161A5 FR 2150161 A5 FR2150161 A5 FR 2150161A5 FR 7229446 A FR7229446 A FR 7229446A FR 7229446 A FR7229446 A FR 7229446A FR 2150161 A5 FR2150161 A5 FR 2150161A5
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7229446A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19712141415 external-priority patent/DE2141415C3/de
Application filed by Siemens Corp filed Critical Siemens Corp
Application granted granted Critical
Publication of FR2150161A5 publication Critical patent/FR2150161A5/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5016Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086Emitter coupled logic
    • H03K19/0866Stacked emitter coupled logic
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802Special implementations
    • G06F2207/4806Cascode or current mode logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
FR7229446A 1971-08-18 1972-08-17 Expired FR2150161A5 (cg-RX-API-DMAC10.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19712141415 DE2141415C3 (de) 1971-08-18 Seriengekoppelter ECL-Schaltkreis mit mehreren unabhängig steuerbaren Strompfaden in einer unteren Ebene

Publications (1)

Publication Number Publication Date
FR2150161A5 true FR2150161A5 (cg-RX-API-DMAC10.html) 1973-03-30

Family

ID=5817097

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7229446A Expired FR2150161A5 (cg-RX-API-DMAC10.html) 1971-08-18 1972-08-17

Country Status (3)

Country Link
FR (1) FR2150161A5 (cg-RX-API-DMAC10.html)
GB (1) GB1404015A (cg-RX-API-DMAC10.html)
IT (1) IT963948B (cg-RX-API-DMAC10.html)

Also Published As

Publication number Publication date
GB1404015A (en) 1975-08-28
DE2141415B2 (de) 1975-06-26
IT963948B (it) 1974-01-21
DE2141415A1 (de) 1973-03-01

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Legal Events

Date Code Title Description
ST Notification of lapse