FR1509644A - Procédé de fabrication d'un circuit intégré - Google Patents

Procédé de fabrication d'un circuit intégré

Info

Publication number
FR1509644A
FR1509644A FR92980A FR92980A FR1509644A FR 1509644 A FR1509644 A FR 1509644A FR 92980 A FR92980 A FR 92980A FR 92980 A FR92980 A FR 92980A FR 1509644 A FR1509644 A FR 1509644A
Authority
FR
France
Prior art keywords
integrated circuit
manufacturing process
manufacturing
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR92980A
Other languages
English (en)
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Centre Electronique Horloger SA
Original Assignee
Centre Electronique Horloger SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre Electronique Horloger SA filed Critical Centre Electronique Horloger SA
Application granted granted Critical
Publication of FR1509644A publication Critical patent/FR1509644A/fr
Expired legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C01INORGANIC CHEMISTRY
    • C01BNON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00Silicon; Compounds thereof
    • C01B33/02Silicon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
FR92980A 1966-01-31 1967-01-30 Procédé de fabrication d'un circuit intégré Expired FR1509644A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH126866A CH428947A (fr) 1966-01-31 1966-01-31 Procédé de fabrication d'un circuit intégré

Publications (1)

Publication Number Publication Date
FR1509644A true FR1509644A (fr) 1968-01-12

Family

ID=4206417

Family Applications (1)

Application Number Title Priority Date Filing Date
FR92980A Expired FR1509644A (fr) 1966-01-31 1967-01-30 Procédé de fabrication d'un circuit intégré

Country Status (8)

Country Link
AT (1) AT262383B (de)
BE (1) BE693141A (de)
CH (1) CH428947A (de)
DE (1) DE1619949A1 (de)
FR (1) FR1509644A (de)
GB (1) GB1117713A (de)
NL (1) NL6701103A (de)
SE (1) SE309453B (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2458680A1 (de) * 1973-12-14 1975-06-26 Hitachi Ltd Verfahren zur herstellung von dielektrisch isolierten substraten fuer monolithische integrierte halbleiterschaltkreise
DE2555155A1 (de) * 1974-12-11 1976-06-16 Hitachi Ltd Dielektrisch isolierte unterlage fuer integrierte halbleiterschaltungen und verfahren zu ihrer herstellung

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6022497B2 (ja) * 1974-10-26 1985-06-03 ソニー株式会社 半導体装置
DE2632647A1 (de) * 1976-07-20 1978-01-26 Siemens Ag Halbleiterbauelement mit passivierender schutzschicht
DE102007032577B4 (de) 2007-07-09 2011-07-21 ADC GmbH, 14167 Endverschluss für die Telekommunikations- und Datentechnik

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2458680A1 (de) * 1973-12-14 1975-06-26 Hitachi Ltd Verfahren zur herstellung von dielektrisch isolierten substraten fuer monolithische integrierte halbleiterschaltkreise
DE2555155A1 (de) * 1974-12-11 1976-06-16 Hitachi Ltd Dielektrisch isolierte unterlage fuer integrierte halbleiterschaltungen und verfahren zu ihrer herstellung

Also Published As

Publication number Publication date
SE309453B (de) 1969-03-24
DE1619949A1 (de) 1970-07-30
AT262383B (de) 1968-06-10
NL6701103A (de) 1967-08-01
BE693141A (de) 1967-07-03
CH428947A (fr) 1967-01-31
GB1117713A (en) 1968-06-19

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