FR1205278A - Additionneur décimal - Google Patents

Additionneur décimal

Info

Publication number
FR1205278A
FR1205278A FR1205278DA FR1205278A FR 1205278 A FR1205278 A FR 1205278A FR 1205278D A FR1205278D A FR 1205278DA FR 1205278 A FR1205278 A FR 1205278A
Authority
FR
France
Prior art keywords
decimal adder
decimal
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Inventor
Walter G Edwards
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
National Cash Register Co
Original Assignee
NCR Corp
National Cash Register Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp, National Cash Register Co filed Critical NCR Corp
Application granted granted Critical
Publication of FR1205278A publication Critical patent/FR1205278A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494—Adding; Subtracting
    • G06F7/495—Adding; Subtracting in digit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
FR1205278D 1957-04-02 1958-03-31 Additionneur décimal Expired FR1205278A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US650275A US2991009A (en) 1957-04-02 1957-04-02 Coded digit adder

Publications (1)

Publication Number Publication Date
FR1205278A true FR1205278A (fr) 1960-02-02

Family

ID=24608210

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1205278D Expired FR1205278A (fr) 1957-04-02 1958-03-31 Additionneur décimal

Country Status (7)

Country Link
US (1) US2991009A (fr)
BE (1) BE566076A (fr)
CH (1) CH350128A (fr)
DE (1) DE1079358B (fr)
FR (1) FR1205278A (fr)
GB (1) GB845466A (fr)
NL (2) NL226436A (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1140380B (de) * 1960-08-16 1962-11-29 Telefunken Patent Anordnung zur Dezimaladdition in einem binaeren Parallelrechenwerk
NL276777A (fr) * 1961-04-04
US3196260A (en) * 1961-05-03 1965-07-20 Ibm Adder
US3278734A (en) * 1961-09-05 1966-10-11 Telefunken Patent Coded decimal adder
DE1157008B (de) * 1961-09-18 1963-11-07 Kienzle Apparate Gmbh Addierwerk fuer dual verschluesselte Zahlen
US3339064A (en) * 1962-09-28 1967-08-29 Nippon Electric Co Decimal addition system
US3308284A (en) * 1963-06-28 1967-03-07 Ibm Qui-binary adder and readout latch
GB1103383A (en) * 1964-03-02 1968-02-14 Olivetti & Co Spa Improvements in or relating to apparatus for performing arithmetic operations in digital computers
US3508037A (en) * 1967-01-30 1970-04-21 Sperry Rand Corp Decimal add/subtract circuitry
DE2460897C3 (de) * 1974-12-21 1978-10-05 Olympia Werke Ag, 2940 Wilhelmshaven Parallel-Rechenwerk für Addition und Subtraktion
DE3024518A1 (de) * 1980-06-28 1982-01-28 Hans Grohe Gmbh & Co Kg, 7622 Schiltach Mischventil fuer fluessigkeiten

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB738605A (en) * 1953-02-05 1955-10-19 British Tabulating Mach Co Ltd Improvements in or relating to electronic adding circuits

Also Published As

Publication number Publication date
GB845466A (en) 1960-08-24
US2991009A (en) 1961-07-04
BE566076A (fr)
NL133891C (fr)
NL226436A (fr)
DE1079358B (de) 1960-04-07
CH350128A (fr) 1960-11-15

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