FI20115255A0 - Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä - Google Patents

Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä

Info

Publication number
FI20115255A0
FI20115255A0 FI20115255A FI20115255A FI20115255A0 FI 20115255 A0 FI20115255 A0 FI 20115255A0 FI 20115255 A FI20115255 A FI 20115255A FI 20115255 A FI20115255 A FI 20115255A FI 20115255 A0 FI20115255 A0 FI 20115255A0
Authority
FI
Finland
Prior art keywords
manufacturing process
semiconductor substrate
composite
semiconductor device
semiconductor
Prior art date
Application number
FI20115255A
Other languages
English (en)
Swedish (sv)
Inventor
Vladislav Bougrov
Maxim Odnoblyudov
Vladimir Nikolaev
Alexey Romanov
Original Assignee
Optogan Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optogan Oy filed Critical Optogan Oy
Priority to FI20115255A priority Critical patent/FI20115255A0/fi
Publication of FI20115255A0 publication Critical patent/FI20115255A0/fi
Priority to TW101108593A priority patent/TW201244154A/zh
Priority to PCT/FI2012/050241 priority patent/WO2012123639A1/en
Priority to US14/005,023 priority patent/US20140001486A1/en
Priority to RU2013143729/28A priority patent/RU2013143729A/ru
Priority to EP12715694.1A priority patent/EP2686873A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02387Group 13/15 materials
    • H01L21/02389Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
FI20115255A 2011-03-14 2011-03-14 Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä FI20115255A0 (fi)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FI20115255A FI20115255A0 (fi) 2011-03-14 2011-03-14 Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä
TW101108593A TW201244154A (en) 2011-03-14 2012-03-14 Composite semiconductor substrate, semiconductor device, and manufacturing method
PCT/FI2012/050241 WO2012123639A1 (en) 2011-03-14 2012-03-14 Composite semiconductor substrate, semiconductor device, and manufacturing method
US14/005,023 US20140001486A1 (en) 2011-03-14 2012-03-14 Composite semidconductor substrate, semiconductor device, and manufacturing method
RU2013143729/28A RU2013143729A (ru) 2011-03-14 2012-03-14 Композиция полупроводниковая подложка, полупроводниковое устройство и способ изготовления
EP12715694.1A EP2686873A1 (en) 2011-03-14 2012-03-14 Composite semiconductor substrate, semiconductor device, and manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20115255A FI20115255A0 (fi) 2011-03-14 2011-03-14 Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä

Publications (1)

Publication Number Publication Date
FI20115255A0 true FI20115255A0 (fi) 2011-03-14

Family

ID=43806465

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20115255A FI20115255A0 (fi) 2011-03-14 2011-03-14 Yhdistelmäpuolijohdesubstraatti, puolijohdelaite, ja valmistusmenetelmä

Country Status (6)

Country Link
US (1) US20140001486A1 (fi)
EP (1) EP2686873A1 (fi)
FI (1) FI20115255A0 (fi)
RU (1) RU2013143729A (fi)
TW (1) TW201244154A (fi)
WO (1) WO2012123639A1 (fi)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015157589A1 (en) 2014-04-10 2015-10-15 Sensor Electronic Technology, Inc. Structured substrate
US10186630B2 (en) 2016-08-02 2019-01-22 QMAT, Inc. Seed wafer for GaN thickening using gas- or liquid-phase epitaxy
KR102481927B1 (ko) * 2017-02-16 2022-12-28 신에쓰 가가꾸 고교 가부시끼가이샤 화합물 반도체 적층 기판, 그 제조 방법, 및 반도체 소자

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6328796B1 (en) * 1999-02-01 2001-12-11 The United States Of America As Represented By The Secretary Of The Navy Single-crystal material on non-single-crystalline substrate
WO2006093817A2 (en) * 2005-02-28 2006-09-08 Silicon Genesis Corporation Substrate stiffness method and resulting devices
WO2008048303A2 (en) * 2005-12-12 2008-04-24 Kyma Technologies, Inc. Group iii nitride articles and methods for making same
US20090278233A1 (en) * 2007-07-26 2009-11-12 Pinnington Thomas Henry Bonded intermediate substrate and method of making same
WO2010021623A1 (en) * 2008-08-21 2010-02-25 Midwest Research Institute Epitaxial growth of silicon for layer transfer

Also Published As

Publication number Publication date
TW201244154A (en) 2012-11-01
WO2012123639A1 (en) 2012-09-20
EP2686873A1 (en) 2014-01-22
US20140001486A1 (en) 2014-01-02
RU2013143729A (ru) 2015-04-20

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