FI20075430A - Menetelmä johderakenteiden valmistamiseksi ja sen sovellukset - Google Patents

Menetelmä johderakenteiden valmistamiseksi ja sen sovellukset Download PDF

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Publication number
FI20075430A
FI20075430A FI20075430A FI20075430A FI20075430A FI 20075430 A FI20075430 A FI 20075430A FI 20075430 A FI20075430 A FI 20075430A FI 20075430 A FI20075430 A FI 20075430A FI 20075430 A FI20075430 A FI 20075430A
Authority
FI
Finland
Prior art keywords
nanoparticles
structures
procedure
applications
preparation
Prior art date
Application number
FI20075430A
Other languages
English (en)
Swedish (sv)
Other versions
FI20075430A0 (fi
FI122644B (fi
Inventor
Tomi Mattila
Ari Alastalo
Mark Allen
Heikki Seppae
Original Assignee
Valtion Teknillinen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Valtion Teknillinen filed Critical Valtion Teknillinen
Priority to FI20075430A priority Critical patent/FI122644B/fi
Publication of FI20075430A0 publication Critical patent/FI20075430A0/fi
Priority to CNA2008101099752A priority patent/CN101325177A/zh
Priority to US12/155,669 priority patent/US7759160B2/en
Priority to EP08157722A priority patent/EP2001273B1/en
Priority to AT08157722T priority patent/ATE528974T1/de
Publication of FI20075430A publication Critical patent/FI20075430A/fi
Application granted granted Critical
Publication of FI122644B publication Critical patent/FI122644B/fi

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00031—Regular or irregular arrays of nanoscale structures, e.g. etch mask layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0224—Conductive particles having an insulating coating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0242—Shape of an individual particle
    • H05K2201/0257—Nanoparticles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/105—Using an electrical field; Special methods of applying an electric potential
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/762—Nanowire or quantum wire, i.e. axially elongated structure having two dimensions of 100 nm or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/773—Nanoparticle, i.e. structure having three dimensions of 100 nm or less
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Analytical Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Powder Metallurgy (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Silicon Compounds (AREA)
  • Conductive Materials (AREA)
  • Processes Specially Adapted For Manufacturing Cables (AREA)
  • Steroid Compounds (AREA)
  • Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
  • Measuring Temperature Or Quantity Of Heat (AREA)
FI20075430A 2007-06-08 2007-06-08 Menetelmä sähköisesti johtavien tai puolijohtavien reittien muodostamiseksi substraatille sekä menetelmän käyttö transistorien tuottamiseen ja anturien valmistukseen FI122644B (fi)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FI20075430A FI122644B (fi) 2007-06-08 2007-06-08 Menetelmä sähköisesti johtavien tai puolijohtavien reittien muodostamiseksi substraatille sekä menetelmän käyttö transistorien tuottamiseen ja anturien valmistukseen
CNA2008101099752A CN101325177A (zh) 2007-06-08 2008-06-06 形成导体结构的方法及其应用
US12/155,669 US7759160B2 (en) 2007-06-08 2008-06-06 Method for producing conductor structures and applications thereof
EP08157722A EP2001273B1 (en) 2007-06-08 2008-06-06 Method for producing conductor structures and applications thereof
AT08157722T ATE528974T1 (de) 2007-06-08 2008-06-06 Verfahren zur herstellung von leiterstrukturen und anwendung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20075430 2007-06-08
FI20075430A FI122644B (fi) 2007-06-08 2007-06-08 Menetelmä sähköisesti johtavien tai puolijohtavien reittien muodostamiseksi substraatille sekä menetelmän käyttö transistorien tuottamiseen ja anturien valmistukseen

Publications (3)

Publication Number Publication Date
FI20075430A0 FI20075430A0 (fi) 2007-06-08
FI20075430A true FI20075430A (fi) 2008-12-09
FI122644B FI122644B (fi) 2012-04-30

Family

ID=38212401

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20075430A FI122644B (fi) 2007-06-08 2007-06-08 Menetelmä sähköisesti johtavien tai puolijohtavien reittien muodostamiseksi substraatille sekä menetelmän käyttö transistorien tuottamiseen ja anturien valmistukseen

Country Status (5)

Country Link
US (1) US7759160B2 (fi)
EP (1) EP2001273B1 (fi)
CN (1) CN101325177A (fi)
AT (1) ATE528974T1 (fi)
FI (1) FI122644B (fi)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI122009B (fi) * 2007-06-08 2011-07-15 Teknologian Tutkimuskeskus Vtt Nanopartikkeleihin perustuvat rakenteet ja menetelmä niiden valmistamiseksi
SG155778A1 (en) * 2008-03-10 2009-10-29 Turbine Overhaul Services Pte Method for diffusion bonding metallic components with nanoparticle foil
CN101908388B (zh) * 2009-06-04 2013-01-23 财团法人工业技术研究院 纳米点状材料的形成方法
GB201604818D0 (en) * 2016-03-22 2016-05-04 Xtpl Sp Z O O Method for forming structures upon a substrate
GB201812691D0 (en) * 2018-08-03 2018-09-19 Xtpl S A Method of forming a structure upon a substrate

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2676416B1 (fr) * 1991-05-15 1996-10-04 Sambre & Meuse Usines Bogie ferroviaire avec chassis a deformabilite selective.
US5471163A (en) 1993-11-16 1995-11-28 Hewlett-Packard Company Tab circuit fusible links for disconnection or encoding information
US6807079B2 (en) 2002-11-01 2004-10-19 Hewlett-Packard Development Company, L.P. Device having a state dependent upon the state of particles dispersed in a carrier
ATE486368T1 (de) * 2002-12-18 2010-11-15 Ibm Verfahren zur selbstanordnung elektronischer schaltkreise und damit hergestellte schaltungen
DE102004020497B8 (de) 2004-04-26 2006-06-14 Infineon Technologies Ag Verfahren zur Herstellung von Durchkontaktierungen und Halbleiterbauteil mit derartigen Durchkontaktierungen
EP1899986B1 (en) 2005-07-01 2014-05-07 National University of Singapore An electrically conductive composite
WO2007038950A1 (en) 2005-09-28 2007-04-12 Stichting Dutch Polymer Institute Method for generation of metal surface structures and apparatus therefor
FI121562B (fi) 2006-07-21 2010-12-31 Valtion Teknillinen Menetelmä johteiden ja puolijohteiden valmistamiseksi
EP2050319A4 (en) * 2006-07-21 2010-12-08 Valtion Teknillinen METHOD FOR THE PRODUCTION OF LADDERS AND SEMICONDUCTORS

Also Published As

Publication number Publication date
EP2001273A2 (en) 2008-12-10
FI20075430A0 (fi) 2007-06-08
ATE528974T1 (de) 2011-10-15
EP2001273B1 (en) 2011-10-12
US7759160B2 (en) 2010-07-20
US20090014821A1 (en) 2009-01-15
EP2001273A3 (en) 2010-02-24
FI122644B (fi) 2012-04-30
CN101325177A (zh) 2008-12-17

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