FI20031539A - Procedure for making wiring pattern structures - Google Patents

Procedure for making wiring pattern structures

Info

Publication number
FI20031539A
FI20031539A FI20031539A FI20031539A FI20031539A FI 20031539 A FI20031539 A FI 20031539A FI 20031539 A FI20031539 A FI 20031539A FI 20031539 A FI20031539 A FI 20031539A FI 20031539 A FI20031539 A FI 20031539A
Authority
FI
Finland
Prior art keywords
procedure
wiring pattern
pattern structures
making wiring
making
Prior art date
Application number
FI20031539A
Other languages
Finnish (fi)
Swedish (sv)
Other versions
FI20031539A0 (en
Inventor
Leo Biener
Martin Novotny
Holger Straub
Original Assignee
Vogt Electronic Fuba Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vogt Electronic Fuba Gmbh filed Critical Vogt Electronic Fuba Gmbh
Publication of FI20031539A0 publication Critical patent/FI20031539A0/en
Publication of FI20031539A publication Critical patent/FI20031539A/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377—Protective layers
    • H05K2203/1394—Covering open PTHs, e.g. by dry film resist or by metal disc
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
FI20031539A 2002-10-31 2003-10-21 Procedure for making wiring pattern structures FI20031539A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10250725A DE10250725A1 (en) 2002-10-31 2002-10-31 Process for the production of circuit pattern structures on a circuit board

Publications (2)

Publication Number Publication Date
FI20031539A0 FI20031539A0 (en) 2003-10-21
FI20031539A true FI20031539A (en) 2004-05-01

Family

ID=29225231

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20031539A FI20031539A (en) 2002-10-31 2003-10-21 Procedure for making wiring pattern structures

Country Status (4)

Country Link
DE (1) DE10250725A1 (en)
FI (1) FI20031539A (en)
FR (1) FR2846847A1 (en)
IT (1) ITTO20030820A1 (en)

Also Published As

Publication number Publication date
FI20031539A0 (en) 2003-10-21
DE10250725A1 (en) 2004-05-13
FR2846847A1 (en) 2004-05-07
ITTO20030820A1 (en) 2004-04-30

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Legal Events

Date Code Title Description
FD Application lapsed