FI20030457A0 - Kaksisuuntainen prosessorijärjestelmä - Google Patents

Kaksisuuntainen prosessorijärjestelmä

Info

Publication number
FI20030457A0
FI20030457A0 FI20030457A FI20030457A FI20030457A0 FI 20030457 A0 FI20030457 A0 FI 20030457A0 FI 20030457 A FI20030457 A FI 20030457A FI 20030457 A FI20030457 A FI 20030457A FI 20030457 A0 FI20030457 A0 FI 20030457A0
Authority
FI
Finland
Prior art keywords
processor system
bidirectional processor
bidirectional
processor
Prior art date
Application number
FI20030457A
Other languages
English (en)
Swedish (sv)
Other versions
FI20030457A (fi
Inventor
Hirofumi Sudo
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Publication of FI20030457A0 publication Critical patent/FI20030457A0/fi
Publication of FI20030457A publication Critical patent/FI20030457A/fi

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1443—Transmit or communication errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2048—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share neither address space nor persistent storage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
FI20030457A 2002-03-28 2003-03-27 Kaksisuuntainen prosessorijärjestelmä FI20030457A (fi)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002090144A JP4453238B2 (ja) 2002-03-28 2002-03-28 ２重化プロセッサシステム

Publications (2)

Publication Number Publication Date
FI20030457A0 true FI20030457A0 (fi) 2003-03-27
FI20030457A FI20030457A (fi) 2003-09-29

Family

ID=19193482

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20030457A FI20030457A (fi) 2002-03-28 2003-03-27 Kaksisuuntainen prosessorijärjestelmä

Country Status (5)

Country Link
US (1) US7162545B2 (fi)
JP (1) JP4453238B2 (fi)
CN (1) CN1246788C (fi)
CA (1) CA2423723C (fi)
FI (1) FI20030457A (fi)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005066805A1 (ja) * 2003-12-26 2007-07-26 富士通株式会社 共通メモリアクセス方法及びそれを用いたマルチプロセッサ・システム
US8079036B2 (en) * 2004-11-10 2011-12-13 Microsoft Corporation Method and system for structured DMA transactions
JP2006285631A (ja) 2005-03-31 2006-10-19 Yokogawa Electric Corp 二重化システム
US7869442B1 (en) 2005-09-30 2011-01-11 Nortel Networks Limited Method and apparatus for specifying IP termination in a network element
US7643496B1 (en) * 2005-09-30 2010-01-05 Nortel Networks Limited Application specified steering policy implementation
WO2007042864A1 (en) * 2005-10-14 2007-04-19 Freescale Semiconductor, Inc. Device and method for managing a retransmit operation
JP4247228B2 (ja) * 2005-11-28 2009-04-02 株式会社日立製作所 ヘテロマルチプロセッサシステムおよびそのｏｓ構成方法
CN1852456A (zh) * 2005-11-30 2006-10-25 华为技术有限公司 一种可实现业务切换的系统及其实现的业务切换方法
US7783813B2 (en) * 2007-06-14 2010-08-24 International Business Machines Corporation Multi-node configuration of processor cards connected via processor fabrics
JP5268469B2 (ja) * 2008-07-23 2013-08-21 株式会社東芝 高可用システム及び実行状態制御方法
JP5976458B2 (ja) * 2012-08-23 2016-08-23 株式会社東芝 Ｉｃカード、及び、携帯可能電子装置
JP6260361B2 (ja) * 2014-03-07 2018-01-17 富士通株式会社 データ転送システム及び方法
JP7135897B2 (ja) * 2019-01-29 2022-09-13 日本電信電話株式会社 情報処理装置および情報処理方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3247330B2 (ja) * 1997-12-25 2002-01-15 株式会社神戸製鋼所 複数プロセッサシステム
US6446058B1 (en) * 1999-04-26 2002-09-03 At&T Corp. Computer platform alarm and control system
US7099350B2 (en) * 2001-04-24 2006-08-29 Atitania, Ltd. Method and apparatus for converting data between two dissimilar systems

Also Published As

Publication number Publication date
JP4453238B2 (ja) 2010-04-21
FI20030457A (fi) 2003-09-29
US20030188126A1 (en) 2003-10-02
US7162545B2 (en) 2007-01-09
JP2003288228A (ja) 2003-10-10
CA2423723A1 (en) 2003-09-28
CA2423723C (en) 2008-03-11
CN1448859A (zh) 2003-10-15
CN1246788C (zh) 2006-03-22

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