ES8306894A1 - "aparato perfeccionado de tratamiento de datos". - Google Patents

"aparato perfeccionado de tratamiento de datos".

Info

Publication number
ES8306894A1
ES8306894A1 ES515726A ES515726A ES8306894A1 ES 8306894 A1 ES8306894 A1 ES 8306894A1 ES 515726 A ES515726 A ES 515726A ES 515726 A ES515726 A ES 515726A ES 8306894 A1 ES8306894 A1 ES 8306894A1
Authority
ES
Spain
Prior art keywords
program
segments
intersegment
call
programs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES515726A
Other languages
English (en)
Other versions
ES515726A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES8306894A1 publication Critical patent/ES8306894A1/es
Publication of ES515726A0 publication Critical patent/ES515726A0/es
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

ARQUITECTURA DE ORDENADOR. LA ARQUITECTURA PERMITE LLAMADAS DE PROGRAMA ENTRE SEGMENTOS CON ASIGNACION SELECTIVA DE SEGMENTOS DE DATOS DE LONGITUDES VARIABLES. EL PROGRAMA QUE EMITE LA LLAMADA CONTROLA LA ASIGNACION SELECTIVA DE SEGMENTOS AL PROGRAMA OBJETO DE LA LLAMADA, INDISTINTAMENTE A PARTIR DE SUS PROPIOS SEGMENTOS ASIGNADOS O, BAJO SU CONTROL, PUEDEN GENERARSE NUEVOS SEGMENTOS, PERO EL PROGRAMA OBJETO DE LLAMADA PUEDE UTILIZARSE PARA CONTROLAR LAS LONGITUDES DE LOS SEGMENTOS QUE ESTAN SIENDO ASIGNADOS. DE ESTE MODO, LAS LLAMADAS RECURSIVAS AL MISMO PROGRAMA NO PUEDEN AFECTAR A LA FUNCION O DATOS DE OTROS PROGRAMAS O DEL MISMO PROGRAMA EN UNA LLAMADA ANTERIOR. TAMBIEN LA ASIGNACION DE SEGMENTOS DE DATOS PUEDE POSPONERSE HASTA LA EJECUCION, OBTENIENDOSE COMO RESULTADO UNA EJECUCION MAS FLEXIBLE DE PROGRAMAS ESCRITOS SIN CONOCIMIENTO DE LOS DETALLES DE OTROS PROGRAMAS DE EJECUCION SIMULTANEA.
ES515726A 1981-09-16 1982-09-15 "aparato perfeccionado de tratamiento de datos". Granted ES515726A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/302,932 US4454580A (en) 1981-09-16 1981-09-16 Program call method and call instruction execution apparatus

Publications (2)

Publication Number Publication Date
ES8306894A1 true ES8306894A1 (es) 1983-06-01
ES515726A0 ES515726A0 (es) 1983-06-01

Family

ID=23169858

Family Applications (1)

Application Number Title Priority Date Filing Date
ES515726A Granted ES515726A0 (es) 1981-09-16 1982-09-15 "aparato perfeccionado de tratamiento de datos".

Country Status (7)

Country Link
US (1) US4454580A (es)
EP (1) EP0074479B1 (es)
JP (1) JPS5848147A (es)
CA (1) CA1172375A (es)
DE (1) DE3275668D1 (es)
ES (1) ES515726A0 (es)
MX (1) MX158846A (es)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3420316C2 (de) * 1983-05-31 1997-01-09 Canon Kk Verfahren zur Steuerung eines Kopiergeräts
US4862351A (en) * 1983-09-01 1989-08-29 Unisys Corporation Method of executing called activities via depictor-linked low level language microcode, hardware logic, and high level language commands; and apparatus for same
JPS61212249A (ja) * 1985-03-15 1986-09-20 Ajinomoto Co Inc 飼料用組成物
JPS61212248A (ja) * 1985-03-18 1986-09-20 Ajinomoto Co Inc 動物栄養組成物
US4766537A (en) * 1986-01-02 1988-08-23 Motorola, Inc. Paged memory management unit having stack change control register
US4945480A (en) * 1988-02-10 1990-07-31 International Business Machines Corporation Data domain switching on program address space switching and return
US5220669A (en) * 1988-02-10 1993-06-15 International Business Machines Corporation Linkage mechanism for program isolation
US5023773A (en) * 1988-02-10 1991-06-11 International Business Machines Corporation Authorization for selective program access to data in multiple address spaces
US4979098A (en) * 1988-02-10 1990-12-18 International Business Machines Corporation Multiple address space token designation, protection controls, designation translation and lookaside
US5136696A (en) * 1988-06-27 1992-08-04 Prime Computer, Inc. High-performance pipelined central processor for predicting the occurrence of executing single-cycle instructions and multicycle instructions
US5189733A (en) * 1989-08-22 1993-02-23 Borland International, Inc. Application program memory management system
WO1991011765A1 (en) * 1990-01-29 1991-08-08 Teraplex, Inc. Architecture for minimal instruction set computing system
CA2082066C (en) * 1991-03-07 1998-04-21 James A. Wooldridge Software debugging system and method especially adapted for code debugging within a multi-architecture environment
US5339422A (en) * 1991-03-07 1994-08-16 Digital Equipment Corporation System and method for jacketing cross-domain calls in a multi-code execution and debugging system within a multi-architecture environment
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
US5568642A (en) * 1991-12-26 1996-10-22 Institute Of Software Scientifical Constructions Computer system with easy programming architecture and programming method therefor
US5611043A (en) * 1994-03-18 1997-03-11 Borland International, Inc. Debugger system and method for controlling child processes
JPH085357A (ja) * 1994-06-16 1996-01-12 Kodo Eizo Gijutsu Kenkyusho:Kk 曲面形状入出力装置およびシステム
US5835958A (en) * 1996-10-29 1998-11-10 Sun Microsystems, Inc. Method and apparatus for dynamically sizing non-contiguous runtime stacks
US10120688B2 (en) * 2016-11-15 2018-11-06 Andes Technology Corporation Data processing system and method for executing block call and block return instructions

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2258113A5 (es) * 1973-11-30 1975-08-08 Honeywell Bull Soc Ind
AU506710B2 (en) * 1974-10-21 1980-01-24 Honeywell Information Systems Incorp. Method of accessing priviledged memory in a multiprogrammed data processing system
US4041462A (en) * 1976-04-30 1977-08-09 International Business Machines Corporation Data processing system featuring subroutine linkage operations using hardware controlled stacks
JPS5311547A (en) * 1976-07-20 1978-02-02 Oki Electric Ind Co Ltd Program call order system
US4338663A (en) * 1978-10-25 1982-07-06 Digital Equipment Corporation Calling instructions for a data processing system

Also Published As

Publication number Publication date
JPS6259812B2 (es) 1987-12-12
JPS5848147A (ja) 1983-03-22
CA1172375A (en) 1984-08-07
EP0074479B1 (en) 1987-03-11
ES515726A0 (es) 1983-06-01
MX158846A (es) 1989-03-17
EP0074479A2 (en) 1983-03-23
EP0074479A3 (en) 1984-07-04
US4454580A (en) 1984-06-12
DE3275668D1 (en) 1987-04-16

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19970203