ES8106620A1 - Instalacion segura de tratamiento de datos - Google Patents

Instalacion segura de tratamiento de datos

Info

Publication number
ES8106620A1
ES8106620A1 ES495411A ES495411A ES8106620A1 ES 8106620 A1 ES8106620 A1 ES 8106620A1 ES 495411 A ES495411 A ES 495411A ES 495411 A ES495411 A ES 495411A ES 8106620 A1 ES8106620 A1 ES 8106620A1
Authority
ES
Spain
Prior art keywords
parallel
information items
serial
output
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES495411A
Other languages
English (en)
Other versions
ES495411A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of ES8106620A1 publication Critical patent/ES8106620A1/es
Publication of ES495411A0 publication Critical patent/ES495411A0/es
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)

Abstract

CIRCUITOS DE EMISION DE SEGURIDAD PARA INSTALACIONES DE TRATAMIENTO DE DATOS. CONSISTE EN UNIDADES DE MANDO QUE TRATAN LAS INFORMACIONES EN, AL MENOS, DOS CANALES Y QUE SON CONTROLADOS PASO A PASO; EN CADA CANAL ESTA CONTENIDA UNA LINEA GENERAL; A CADA LINEA GENERAL ESTAN CONECTADOS UN MICROORDENADOR DE FUNCIONAMIENTO INDEPENDIENTE, UNA MEMORIA DE INSCRIPCION DE LECTURA, UNA MEDIDA DE VALORES FIJOS Y UN MODULO DE MEMORIA PASADA; A CADA LINEA GENERAL ESTAN CONECTADOS UN CIRCUITO DE EMISION DE DATOS EN SERIE, Y LAS LINEAS GENERALES ESTAN UNIDAS ENTRE SI A TRAVES DE UNA UNIDAD DE COORDINACION SEGURA CONTRA FALLOS, LA CUAL CONTROLA A RECEPCION Y EMISION DE LAS INFORMACIONES.
ES495411A 1979-09-28 1980-09-26 Instalacion segura de tratamiento de datos Granted ES495411A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19792939935 DE2939935A1 (de) 1979-09-28 1979-09-28 Sichere datenverarbeitungseinrichtung

Publications (2)

Publication Number Publication Date
ES8106620A1 true ES8106620A1 (es) 1981-07-16
ES495411A0 ES495411A0 (es) 1981-07-16

Family

ID=6082501

Family Applications (1)

Application Number Title Priority Date Filing Date
ES495411A Granted ES495411A0 (es) 1979-09-28 1980-09-26 Instalacion segura de tratamiento de datos

Country Status (7)

Country Link
EP (1) EP0026734A1 (es)
DD (1) DD153258A5 (es)
DE (1) DE2939935A1 (es)
DK (1) DK376480A (es)
ES (1) ES495411A0 (es)
FI (1) FI803026A (es)
NO (1) NO802841L (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5109507A (en) * 1982-01-29 1992-04-28 Pitney Bowes Inc. Electronic postage meter having redundant memory
US4916623A (en) * 1982-01-29 1990-04-10 Pitney Bowes Inc. Electronic postage meter having redundant memory
US4566106A (en) * 1982-01-29 1986-01-21 Pitney Bowes Inc. Electronic postage meter having redundant memory
EP0231452B2 (en) * 1982-01-29 2002-01-16 Pitney Bowes Inc. Microprocessor systems for electronic postage arrangements
CA1206619A (en) * 1982-01-29 1986-06-24 Frank T. Check, Jr. Electronic postage meter having redundant memory
DE3412049A1 (de) * 1984-03-30 1985-10-17 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Signaltechnisch sichere datenverarbeitungseinrichtung
DE3642851A1 (de) * 1986-12-16 1988-06-30 Bbc Brown Boveri & Cie Fehlertolerantes rechensystem und verfahren zum erkennen, lokalisieren und eliminieren von fehlerhaften einheiten in einem solchen system
GB9101227D0 (en) * 1991-01-19 1991-02-27 Lucas Ind Plc Method of and apparatus for arbitrating between a plurality of controllers,and control system
EP0986008B1 (en) * 1993-12-01 2008-04-16 Marathon Technologies Corporation Computer system comprising controllers and computing elements
DE102015121349A1 (de) 2015-12-08 2017-06-08 Staku Anlagenbau Gmbh Vorrichtung zur Oberflächenbehandlung eines Endlosmaterials sowie deren Verwendung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810119A (en) * 1971-05-04 1974-05-07 Us Navy Processor synchronization scheme
FR2144912A5 (es) * 1971-07-02 1973-02-16 Cerci
IT1014277B (it) * 1974-06-03 1977-04-20 Cselt Centro Studi Lab Telecom Sistema di controllo di elaboratori di processo operanti in parallelo
DE2458224C3 (de) * 1974-12-09 1978-04-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen Datenverarbeitungssystem mit Koordinierung der Parallelarbeit von mindestens zwei Datenverarbeitungsanlagen
GB1560554A (en) * 1976-03-10 1980-02-06 Smith Industries Ltd Control systems
DE2612100A1 (de) * 1976-03-22 1977-10-06 Siemens Ag Digitale datenverarbeitungsanordnung, insbesondere fuer die eisenbahnsicherungstechnik
US4169288A (en) * 1977-04-26 1979-09-25 International Telephone And Telegraph Corporation Redundant memory for point of sale system

Also Published As

Publication number Publication date
EP0026734A1 (de) 1981-04-08
DD153258A5 (de) 1981-12-30
NO802841L (no) 1981-03-30
FI803026A (fi) 1981-03-29
DE2939935A1 (de) 1981-04-09
DK376480A (da) 1981-03-29
ES495411A0 (es) 1981-07-16

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