ES8105535A1 - Dispositivo de conmutacion de dos trenes numericos - Google Patents

Dispositivo de conmutacion de dos trenes numericos

Info

Publication number
ES8105535A1
ES8105535A1 ES493447A ES493447A ES8105535A1 ES 8105535 A1 ES8105535 A1 ES 8105535A1 ES 493447 A ES493447 A ES 493447A ES 493447 A ES493447 A ES 493447A ES 8105535 A1 ES8105535 A1 ES 8105535A1
Authority
ES
Spain
Prior art keywords
switching
switching circuit
clock signals
circuit
digital streams
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES493447A
Other languages
English (en)
Other versions
ES493447A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Societe Anonyme de Telecommunications SAT
Original Assignee
Societe Anonyme de Telecommunications SAT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Societe Anonyme de Telecommunications SAT filed Critical Societe Anonyme de Telecommunications SAT
Publication of ES8105535A1 publication Critical patent/ES8105535A1/es
Publication of ES493447A0 publication Critical patent/ES493447A0/es
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)

Abstract

DISPOSITIVO DE CONMUTACION DE DOS TRENES NUMERICOS. CONSTA DE UN CIRCUITO DE ORIENTACION (1) PARA SEÑALES DE DATOS Y UN CIRCUITO DE ORIENTACION (3) PARA SEÑALES DE RELOJ. UN CIRCUITO DE MANDO (3) DE LOS CIRCUITOS DE ORIENTACION PRODUCE UNA SEÑAL CUYOS CAMBIOS DE ESTADO SOLO SE PRODUCEN, TRAS UN CAMBIO DE ESTADO DE LA SEÑAL DE MANDO DE CONMUTACION, A PARTIR DEL MOMENTO EN QUE LAS DOS SEÑALES DE RELOJ SE HALLAN EN EL MISMO ESTADO LOGICO. EL CIRCUITO DE MANDO (3) COMPRENDE UNA PUERTA O-NO QUE RECIBE LAS DOS SEÑALES DE RELOJ, ESTANDO SU SALIDA ENLAZADA A LA ENTRADA DE UNA BASCULA (30), Y A LA SALIDA DE ESTA SE ENCUENTRA DISPONIBLE LA SEÑAL DE MANDO. I
ES493447A 1979-07-17 1980-07-16 Dispositivo de conmutacion de dos trenes numericos Granted ES493447A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7918479A FR2462066B1 (fr) 1979-07-17 1979-07-17 Dispositif de commutation de deux trains numeriques

Publications (2)

Publication Number Publication Date
ES8105535A1 true ES8105535A1 (es) 1981-05-16
ES493447A0 ES493447A0 (es) 1981-05-16

Family

ID=9227974

Family Applications (1)

Application Number Title Priority Date Filing Date
ES493447A Granted ES493447A0 (es) 1979-07-17 1980-07-16 Dispositivo de conmutacion de dos trenes numericos

Country Status (5)

Country Link
US (1) US4359718A (es)
EP (1) EP0022718B1 (es)
DE (1) DE3065606D1 (es)
ES (1) ES493447A0 (es)
FR (1) FR2462066B1 (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2505582B1 (fr) * 1981-05-06 1985-06-07 Telecommunications Sa Systeme de mise en phase de trains numeriques et son application a la commutation desdits trains
US4692633A (en) * 1984-07-02 1987-09-08 International Business Machines Corporation Edge sensitive single clock latch apparatus with a skew compensated scan function
US5079740A (en) * 1987-01-12 1992-01-07 Ncr Corporation System and method of providing an automatic back-up primary terminal for a cluster of secondary terminals
US4873631A (en) * 1988-04-25 1989-10-10 Ncr Corporation Point of sale automatic back-up system and method
US5835953A (en) * 1994-10-13 1998-11-10 Vinca Corporation Backup system that takes a snapshot of the locations in a mass storage device that has been identified for updating prior to updating
US5649152A (en) * 1994-10-13 1997-07-15 Vinca Corporation Method and system for providing a static snapshot of data stored on a mass storage system
US6791977B1 (en) * 2000-10-17 2004-09-14 Gennum Corporation Reclocker circuit and router cell

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539933A (en) * 1967-09-07 1970-11-10 Bell Telephone Labor Inc Switchover logic circuit
CA1065020A (en) * 1974-06-27 1979-10-23 William L. Hatton High reliability diversity communications system
JPS5438844B2 (es) * 1974-07-19 1979-11-24
US4009469A (en) * 1975-12-19 1977-02-22 Ibm Corporation Loop communications system with method and apparatus for switch to secondary loop
US4239982A (en) * 1978-06-14 1980-12-16 The Charles Stark Draper Laboratory, Inc. Fault-tolerant clock system

Also Published As

Publication number Publication date
FR2462066B1 (fr) 1988-01-15
FR2462066A1 (fr) 1981-02-06
US4359718A (en) 1982-11-16
EP0022718B1 (fr) 1983-11-16
DE3065606D1 (en) 1983-12-22
EP0022718A1 (fr) 1981-01-21
ES493447A0 (es) 1981-05-16

Similar Documents

Publication Publication Date Title
JPS54118723A (en) Phase converter
ES8105535A1 (es) Dispositivo de conmutacion de dos trenes numericos
KR920022719A (ko) 모뎀과 터미날 사이의 데이타 전송율을 변화시킬 수 있는 데이타 전송 시스템
ES448469A1 (es) Un sistema de transmision de datos en serie binaria.
GB1212340A (en) Transmission system comprising a transmitter and a receiver for the transmission of information in a prescribed frequency band
ES425144A1 (es) Un circuito de retardo de tiempo para modems.
JPS5797749A (en) Synchronous switching system without momentary break
JPS5472949A (en) Multiplexer circuit
JPS5671358A (en) Control system for button telephone
JPS56164429A (en) Cue system for multiplex synchronizing operation
JPS57182837A (en) Digital data connecting device
JPS5690655A (en) Wire transmission system
JPS55105491A (en) Data exchange system
JPS51150933A (en) 2-line type semi-double data transmission system
JPS5396605A (en) Data transmission system
JPS5671349A (en) Bidirectional transmission system
JPS5376602A (en) Circuit switching system
JPS5690656A (en) Wire transmission system
JPS56119557A (en) Communication mode switching system
JPS5365007A (en) Transmission system for intermittent signal
JPS57104358A (en) Information offering system
GB1434542A (en) Information transfer device
JPS57129048A (en) Loop data transmitting device
KR960027475A (ko) 동기 및 루프스위칭회로
JPS5612154A (en) Answer signal transmission system

Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19990405