ES471406A1 - Perfeccionamientos introducidos en un sistema de tratamientode datos - Google Patents

Perfeccionamientos introducidos en un sistema de tratamientode datos

Info

Publication number
ES471406A1
ES471406A1 ES471406A ES471406A ES471406A1 ES 471406 A1 ES471406 A1 ES 471406A1 ES 471406 A ES471406 A ES 471406A ES 471406 A ES471406 A ES 471406A ES 471406 A1 ES471406 A1 ES 471406A1
Authority
ES
Spain
Prior art keywords
data
request
requests
storage
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES471406A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES471406A1 publication Critical patent/ES471406A1/es
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

Perfeccionamientos introducidos en un sistema de tratamiento de datos, que incluye canales múltiples de entrada-salida en grupos múltiples de canales y un equipo de memoria direccionable compartido por dichos canales, que comprenden en combinación: adaptadores múltiples de grupos de canal asociados con grupos respectivos de dichos grupos de canales para transferir solicitudes de acceso a memoria de entrada y salida desde los canales del grupo respectivo a dicho equipo de memoria; una unidad controladora de línea general intermedia entre dichos adaptadores de grupo y dicho equipo de memoria; una unidad controladora de línea general intermedia entre dichos adaptadores de grupo y dicho equipo de memoria para dar curso a las solicitudes asíncronamente desde la totalidad de dichos adaptadores a dicho equipo de memoria.
ES471406A 1977-07-05 1978-07-04 Perfeccionamientos introducidos en un sistema de tratamientode datos Expired ES471406A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/813,404 US4126897A (en) 1977-07-05 1977-07-05 Request forwarding system

Publications (1)

Publication Number Publication Date
ES471406A1 true ES471406A1 (es) 1979-01-16

Family

ID=25212283

Family Applications (1)

Application Number Title Priority Date Filing Date
ES471406A Expired ES471406A1 (es) 1977-07-05 1978-07-04 Perfeccionamientos introducidos en un sistema de tratamientode datos

Country Status (11)

Country Link
US (1) US4126897A (es)
JP (1) JPS5414645A (es)
AU (1) AU517309B2 (es)
BR (1) BR7804288A (es)
CA (1) CA1103324A (es)
CH (1) CH634938A5 (es)
DE (1) DE2828741A1 (es)
ES (1) ES471406A1 (es)
FR (1) FR2397015A1 (es)
GB (1) GB1591779A (es)
IT (1) IT1109960B (es)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4268906A (en) * 1978-12-22 1981-05-19 International Business Machines Corporation Data processor input/output controller
US4328549A (en) * 1980-01-11 1982-05-04 Olin Corporation Process flow computer control system
US4495564A (en) * 1981-08-10 1985-01-22 International Business Machines Corporation Multi sub-channel adapter with single status/address register
SE8104981L (sv) * 1981-08-21 1982-07-26 Ibm Svenska Ab Metod och anordning for adressering av ett minne
US4509113A (en) * 1982-02-02 1985-04-02 International Business Machines Corporation Peripheral interface adapter circuit for use in I/O controller card having multiple modes of operation
US4667305A (en) * 1982-06-30 1987-05-19 International Business Machines Corporation Circuits for accessing a variable width data bus with a variable width data field
JPS59148952A (ja) * 1983-02-14 1984-08-25 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 優先順位回路
US4559611A (en) * 1983-06-30 1985-12-17 International Business Machines Corporation Mapping and memory hardware for writing horizontal and vertical lines
US5038277A (en) * 1983-11-07 1991-08-06 Digital Equipment Corporation Adjustable buffer for data communications in a data processing system
US4663729A (en) * 1984-06-01 1987-05-05 International Business Machines Corp. Display architecture having variable data width
US4716545A (en) * 1985-03-19 1987-12-29 Wang Laboratories, Inc. Memory means with multiple word read and single word write
JPS62208153A (ja) * 1986-03-08 1987-09-12 Nec Corp 入出力バツフア装置
US5014186A (en) * 1986-08-01 1991-05-07 International Business Machines Corporation Data-processing system having a packet transfer type input/output system
US4999808A (en) * 1986-09-26 1991-03-12 At&T Bell Laboratories Dual byte order data processor
US5119498A (en) * 1989-06-12 1992-06-02 International Business Machines Corporation Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact
US6931478B2 (en) * 2002-02-06 2005-08-16 International Business Machines Corporation Implicit addressing sequential media drive with intervening converter simulating explicit addressing to host applications

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3380034A (en) * 1963-07-17 1968-04-23 Vyzk Ustav Matemat Stroju Addressing system for computer memories
US3550133A (en) * 1964-04-06 1970-12-22 Ibm Automatic channel apparatus
US3488633A (en) * 1964-04-06 1970-01-06 Ibm Automatic channel apparatus
US3599186A (en) * 1970-05-14 1971-08-10 Ibm Memory-centered computer system
JPS5324256B2 (es) * 1973-12-03 1978-07-19
US4115854A (en) * 1977-03-28 1978-09-19 International Business Machines Corporation Channel bus controller

Also Published As

Publication number Publication date
JPS5414645A (en) 1979-02-03
IT1109960B (it) 1985-12-23
AU517309B2 (en) 1981-07-23
CA1103324A (en) 1981-06-16
DE2828741A1 (de) 1979-01-25
BR7804288A (pt) 1979-04-10
CH634938A5 (de) 1983-02-28
US4126897A (en) 1978-11-21
AU3630578A (en) 1979-11-22
IT7821593A0 (it) 1978-03-24
JPS573094B2 (es) 1982-01-20
FR2397015B1 (es) 1980-10-24
FR2397015A1 (fr) 1979-02-02
GB1591779A (en) 1981-06-24

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