ES415871A1 - Un metodo para formar un sustrato para pastillas de circui-tos integrados. - Google Patents

Un metodo para formar un sustrato para pastillas de circui-tos integrados.

Info

Publication number
ES415871A1
ES415871A1 ES415871A ES415871A ES415871A1 ES 415871 A1 ES415871 A1 ES 415871A1 ES 415871 A ES415871 A ES 415871A ES 415871 A ES415871 A ES 415871A ES 415871 A1 ES415871 A1 ES 415871A1
Authority
ES
Spain
Prior art keywords
thin film
metallized
interconnect design
integrated circuit
bonding force
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES415871A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES415871A1 publication Critical patent/ES415871A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
ES415871A 1972-06-14 1973-06-13 Un metodo para formar un sustrato para pastillas de circui-tos integrados. Expired ES415871A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26284872A 1972-06-14 1972-06-14

Publications (1)

Publication Number Publication Date
ES415871A1 true ES415871A1 (es) 1976-02-01

Family

ID=22999323

Family Applications (1)

Application Number Title Priority Date Filing Date
ES415871A Expired ES415871A1 (es) 1972-06-14 1973-06-13 Un metodo para formar un sustrato para pastillas de circui-tos integrados.

Country Status (9)

Country Link
JP (1) JPS4944673A (es)
AU (1) AU467287B2 (es)
CA (1) CA974664A (es)
CH (1) CH557128A (es)
ES (1) ES415871A1 (es)
FR (1) FR2196570B1 (es)
GB (1) GB1416205A (es)
IT (1) IT981607B (es)
SE (1) SE401767B (es)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1414836A (fr) * 1963-08-08 1965-10-22 Ibm Composants fonctionnels
US3484534A (en) * 1966-07-29 1969-12-16 Texas Instruments Inc Multilead package for a multilead electrical device
FR1534329A (fr) * 1966-08-16 1968-07-26 Signetics Corp Procédé de montage de circuits intégrés

Also Published As

Publication number Publication date
JPS4944673A (es) 1974-04-26
FR2196570A1 (es) 1974-03-15
CH557128A (de) 1974-12-13
AU5695073A (en) 1974-12-19
FR2196570B1 (es) 1976-11-12
IT981607B (it) 1974-10-10
CA974664A (en) 1975-09-16
GB1416205A (en) 1975-12-03
DE2329052A1 (de) 1973-12-20
SE401767B (sv) 1978-05-22
DE2329052B2 (de) 1977-02-17
AU467287B2 (en) 1975-11-27

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