ES378868A1 - A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding) - Google Patents

A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding)

Info

Publication number
ES378868A1
ES378868A1 ES378868A ES378868A ES378868A1 ES 378868 A1 ES378868 A1 ES 378868A1 ES 378868 A ES378868 A ES 378868A ES 378868 A ES378868 A ES 378868A ES 378868 A1 ES378868 A1 ES 378868A1
Authority
ES
Spain
Prior art keywords
translation
circuit elements
manufacturing
machine
legally binding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES378868A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Priority to ES378868A priority Critical patent/ES378868A1/en
Publication of ES378868A1 publication Critical patent/ES378868A1/en
Expired legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method of manufacturing an integrated semiconductor circuit, comprising the steps of: forming a plurality of circuit elements adjacent to a first surface of a semiconductor wafer, with an insulation layer on said first surface, having openings in it that expose areas of contact on said circuit elements, forming a conductive design on said insulation layer, which extends inside said openings and interconnects selected elements of said circuit elements and which has a portion thereof located on said insulation layer, apart from said circuit elements, apply a separation agent on said portion, place said semiconductor wafer on a support having an opening therein, with an insulating adhesive, so that said first surface of said semiconductor wafer is adjacent to said support and said separation agent is aligned with said aber in order to remove said separation agent to leave said portion of said exposed conductive design and join an electrical connection to said exposed portion of said conductive design, through said opening. (Machine-translation by Google Translate, not legally binding)
ES378868A 1970-04-21 1970-04-21 A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding) Expired ES378868A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ES378868A ES378868A1 (en) 1970-04-21 1970-04-21 A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES378868A ES378868A1 (en) 1970-04-21 1970-04-21 A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding)

Publications (1)

Publication Number Publication Date
ES378868A1 true ES378868A1 (en) 1972-06-16

Family

ID=8455713

Family Applications (1)

Application Number Title Priority Date Filing Date
ES378868A Expired ES378868A1 (en) 1970-04-21 1970-04-21 A method of manufacturing an integrated semiconductor circuit. (Machine-translation by Google Translate, not legally binding)

Country Status (1)

Country Link
ES (1) ES378868A1 (en)

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