ES2424463T3 - Aparato de decodificación, método de decodificación y programa - Google Patents

Aparato de decodificación, método de decodificación y programa Download PDF

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Publication number
ES2424463T3
ES2424463T3 ES10178005T ES10178005T ES2424463T3 ES 2424463 T3 ES2424463 T3 ES 2424463T3 ES 10178005 T ES10178005 T ES 10178005T ES 10178005 T ES10178005 T ES 10178005T ES 2424463 T3 ES2424463 T3 ES 2424463T3
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Spain
Prior art keywords
decoding
results
progress
matrix
calculation
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Expired - Lifetime
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ES10178005T
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English (en)
Spanish (es)
Inventor
Takashi Yokokawa
Toshiyuki Miyauchi
Yasuhiro Iida
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Sony Corp
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Sony Corp
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1114—Merged schedule message passing algorithm with storage of sums of check-to-bit node messages or sums of bit-to-check node messages, e.g. in order to increase the memory efficiency
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1134—Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1145—Pipelined decoding at code word level, e.g. multiple code words being decoded simultaneously
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
ES10178005T 2003-05-13 2004-04-19 Aparato de decodificación, método de decodificación y programa Expired - Lifetime ES2424463T3 (es)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2003133941 2003-05-13
JP2003133941 2003-05-13
JP2003294383 2003-08-18
JP2003294383A JP4225163B2 (ja) 2003-05-13 2003-08-18 復号装置および復号方法、並びにプログラム

Publications (1)

Publication Number Publication Date
ES2424463T3 true ES2424463T3 (es) 2013-10-02

Family

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Family Applications (3)

Application Number Title Priority Date Filing Date
ES10178005T Expired - Lifetime ES2424463T3 (es) 2003-05-13 2004-04-19 Aparato de decodificación, método de decodificación y programa
ES04728265T Expired - Lifetime ES2401577T3 (es) 2003-05-13 2004-04-19 Dispositivo de decodificación, método de decodificación y programa
ES10178046T Expired - Lifetime ES2426756T3 (es) 2003-05-13 2004-04-19 Aparato de decodificación, método de decodificación y programa

Family Applications After (2)

Application Number Title Priority Date Filing Date
ES04728265T Expired - Lifetime ES2401577T3 (es) 2003-05-13 2004-04-19 Dispositivo de decodificación, método de decodificación y programa
ES10178046T Expired - Lifetime ES2426756T3 (es) 2003-05-13 2004-04-19 Aparato de decodificación, método de decodificación y programa

Country Status (6)

Country Link
US (2) USRE44420E1 (enExample)
EP (3) EP1624581B1 (enExample)
JP (1) JP4225163B2 (enExample)
KR (1) KR101090001B1 (enExample)
ES (3) ES2424463T3 (enExample)
WO (1) WO2004102811A1 (enExample)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7409628B2 (en) * 2002-08-15 2008-08-05 Broadcom Corporation Efficient design to implement LDPC (Low Density Parity Check) decoder
US7296208B2 (en) * 2003-07-03 2007-11-13 The Directv Group, Inc. Method and system for generating parallel decodable low density parity check (LDPC) codes
US8140931B2 (en) * 2003-07-03 2012-03-20 Dtvg Licensing, Inc. Method and system for generating parallel decodable low density parity check (LDPC) codes
KR20050118056A (ko) * 2004-05-12 2005-12-15 삼성전자주식회사 다양한 부호율을 갖는 Ｂｌｏｃｋ ＬＤＰＣ 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치
FR2871975B1 (fr) * 2004-06-22 2006-08-11 St Microelectronics Sa Decodeur ldpc
CN101032084B (zh) * 2004-10-01 2010-05-05 汤姆逊许可公司 用于接收器的方法和设备
US7634710B2 (en) * 2005-03-25 2009-12-15 Teranetics, Inc. Efficient decoding
JP4595650B2 (ja) * 2005-04-25 2010-12-08 ソニー株式会社 復号装置および復号方法
JP4729964B2 (ja) * 2005-04-25 2011-07-20 ソニー株式会社 復号装置および復号方法
JP4617985B2 (ja) * 2005-04-25 2011-01-26 ソニー株式会社 符号装置および符号化方法
JP4622654B2 (ja) 2005-04-25 2011-02-02 ソニー株式会社 復号装置および復号方法
JP2006339799A (ja) 2005-05-31 2006-12-14 Toshiba Corp イレギュラー低密度パリティチェック符号復号器及び方法
KR100727316B1 (ko) * 2005-06-01 2007-06-12 삼성전자주식회사 저밀도채리티체크 채널 디코딩 방법 및 장치
JP4730592B2 (ja) * 2005-07-11 2011-07-20 ソニー株式会社 復号装置および復号方法
EP1909395B1 (en) * 2005-07-13 2019-11-20 Mitsubishi Electric Corporation Communication apparatus and decoding method
JP4293172B2 (ja) 2005-09-13 2009-07-08 ソニー株式会社 復号装置および復号方法
BRPI0520713A2 (pt) 2005-12-01 2009-05-26 Nagra Thomson Licensing aparelho e método para decodificar sinais codificados com verificação de paridade de baixa densidade
US7661055B2 (en) * 2005-12-05 2010-02-09 Broadcom Corporation Partial-parallel implementation of LDPC (Low Density Parity Check) decoders
JP4807063B2 (ja) 2005-12-20 2011-11-02 ソニー株式会社 復号装置、制御方法、およびプログラム
US7530002B2 (en) * 2006-01-03 2009-05-05 Broadcom Corporation Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder
US7617433B2 (en) * 2006-01-03 2009-11-10 Broadcom Corporation Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices
JP4739086B2 (ja) * 2006-04-05 2011-08-03 三菱電機株式会社 誤り訂正復号装置および誤り訂正復号方法
US7647548B2 (en) * 2006-07-31 2010-01-12 Agere Systems Inc. Methods and apparatus for low-density parity check decoding using hardware-sharing and serial sum-product architecture
JP4743156B2 (ja) * 2007-04-27 2011-08-10 ソニー株式会社 復号装置
JP4780027B2 (ja) * 2007-04-27 2011-09-28 ソニー株式会社 復号装置、制御方法、及びプログラム
US8359522B2 (en) 2007-05-01 2013-01-22 Texas A&M University System Low density parity check decoder for regular LDPC codes
JP4487212B2 (ja) * 2007-10-19 2010-06-23 ソニー株式会社 復号装置および方法、送受信システム、受信装置および方法、並びにプログラム
JP4487213B2 (ja) * 2007-10-19 2010-06-23 ソニー株式会社 復号装置および方法、並びにプログラム
CN101431337A (zh) * 2007-11-09 2009-05-13 松下电器产业株式会社 提高编码并行度实现降低编码时延的方法
JP2009271956A (ja) * 2008-04-30 2009-11-19 Toshiba Corp データ復号装置，データ再生装置，およびデータ復号方法
US8443033B2 (en) * 2008-08-04 2013-05-14 Lsi Corporation Variable node processing unit
US8145986B2 (en) * 2008-09-22 2012-03-27 Broadcom Corporation Multi-CSI (Cyclic Shifted Identity) sub-matrix based LDPC (Low Density Parity Check) codes
JP5320964B2 (ja) * 2008-10-08 2013-10-23 ソニー株式会社 サイクリックシフト装置、サイクリックシフト方法、ｌｄｐｃ復号装置、テレビジョン受像機、及び、受信システム
JP5536155B2 (ja) * 2012-08-03 2014-07-02 トムソン ライセンシング 誤り訂正を実行する装置及び方法
KR102068030B1 (ko) 2012-12-11 2020-01-20 삼성전자 주식회사 메모리 컨트롤러 및 그 동작방법
RU2546070C1 (ru) * 2013-11-12 2015-04-10 Открытое акционерное общество "Калужский научно-исследовательский институт телемеханических устройств" Способ мягкого декодирования помехоустойчивого кода
US9553608B2 (en) * 2013-12-20 2017-01-24 Sandisk Technologies Llc Data storage device decoder and method of operation
KR102433645B1 (ko) * 2015-11-09 2022-08-18 삼성전자주식회사 무선 통신 시스템에서 복호화 방법 및 장치
JP7051024B2 (ja) * 2020-02-27 2022-04-08 三菱電機株式会社 復号方法、復号装置、制御回路およびプログラム記憶媒体
CN119254243B (zh) * 2024-10-09 2025-09-19 成都流体动力创新中心 数据存储、校验节点数据更新以及ldpc译码方法和系统

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6539367B1 (en) * 2000-05-26 2003-03-25 Agere Systems Inc. Methods and apparatus for decoding of general codes on probability dependency graphs
JP4389373B2 (ja) 2000-10-11 2009-12-24 ソニー株式会社 ２元巡回符号を反復型復号するための復号器
US6567465B2 (en) * 2001-05-21 2003-05-20 Pc Tel Inc. DSL modem utilizing low density parity check codes
US6633856B2 (en) 2001-06-15 2003-10-14 Flarion Technologies, Inc. Methods and apparatus for decoding LDPC codes
US6938196B2 (en) * 2001-06-15 2005-08-30 Flarion Technologies, Inc. Node processors for use in parity check decoders
US6801919B2 (en) 2001-07-27 2004-10-05 Hewlett-Packard Development Company, L.P. Object oriented database interface encapsulation that allows for chronologically overlapping transactions in a multi-threaded environment
WO2003021440A1 (en) * 2001-09-01 2003-03-13 Bermai, Inc. Decoding architecture for low density parity check codes
JP2003269302A (ja) 2002-03-18 2003-09-25 Hitachi Ltd スタータ
US20040019845A1 (en) * 2002-07-26 2004-01-29 Hughes Electronics Method and system for generating low density parity check codes
US7178080B2 (en) * 2002-08-15 2007-02-13 Texas Instruments Incorporated Hardware-efficient low density parity check code for digital communications
US6961888B2 (en) 2002-08-20 2005-11-01 Flarion Technologies, Inc. Methods and apparatus for encoding LDPC codes
US6785863B2 (en) * 2002-09-18 2004-08-31 Motorola, Inc. Method and apparatus for generating parity-check bits from a symbol set
US6957375B2 (en) 2003-02-26 2005-10-18 Flarion Technologies, Inc. Method and apparatus for performing low-density parity-check (LDPC) code operations using a multi-level permutation

Also Published As

Publication number Publication date
EP2270990A3 (en) 2011-06-22
JP2004364233A (ja) 2004-12-24
USRE44420E1 (en) 2013-08-06
ES2426756T3 (es) 2013-10-25
KR20060007362A (ko) 2006-01-24
EP2270990B1 (en) 2013-07-10
US20050240853A1 (en) 2005-10-27
ES2401577T3 (es) 2013-04-22
EP1624581A1 (en) 2006-02-08
WO2004102811A1 (ja) 2004-11-25
EP2270990A2 (en) 2011-01-05
EP1624581B1 (en) 2013-01-02
EP2270989B1 (en) 2013-07-03
EP2270989A2 (en) 2011-01-05
KR101090001B1 (ko) 2011-12-05
US7299397B2 (en) 2007-11-20
JP4225163B2 (ja) 2009-02-18
EP1624581A4 (en) 2008-07-09
EP2270989A3 (en) 2011-06-22

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