ES2161918T3 - Mecanismo de configuracion. - Google Patents

Mecanismo de configuracion.

Info

Publication number
ES2161918T3
ES2161918T3 ES95941311T ES95941311T ES2161918T3 ES 2161918 T3 ES2161918 T3 ES 2161918T3 ES 95941311 T ES95941311 T ES 95941311T ES 95941311 T ES95941311 T ES 95941311T ES 2161918 T3 ES2161918 T3 ES 2161918T3
Authority
ES
Spain
Prior art keywords
processors
redundancy
load
processor
domain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95941311T
Other languages
English (en)
Inventor
Anna Naemi Ingeborg Holte-Rost
Sofia Birgitta Andersson
Ramon Alexander Larruy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Application granted granted Critical
Publication of ES2161918T3 publication Critical patent/ES2161918T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5083Techniques for rebalancing the load in a distributed system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/5019Workload prediction

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Lock And Its Accessories (AREA)
  • Surgical Instruments (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
  • Water Treatment By Sorption (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Paper (AREA)
  • Undergarments, Swaddling Clothes, Handkerchiefs Or Underwear Materials (AREA)
  • Switches With Compound Operations (AREA)
  • Computer And Data Communications (AREA)
  • Telephonic Communication Services (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

LA PRESENTE INVENCION SE REFIERE A UN METODO PARA CONFIGURAR UN SISTEMA INFORMATICO DISTRIBUIDO. EL METODO CONSISTE EN INTRODUCIR EN EL SISTEMA LA CAPACIDAD DE PROCESAMIENTO QUE REQUIERE CADA SUBFUNCION DE LA APLICACION QUE SE EJECUTA EN EL SISTEMA Y EN CUANTOS PROCESADORES SE TIENE QUE EJECUTAR CADA SUBFUNCION DE LA APLICACION. LOS PROCESADORES FORMAN UN DOMINIO DE REDUNDANCIA. TODOS LOS RECURSOS, AGRUPADOS JUNTOS EN UNIDADES DE DISTRIBUCION (UD), SE DISTRIBUYEN ENTRE LOS PROCESADORES DE DICHO DOMINIO DE REDUNDANCIA EN PROPORCION A LA CAPACIDAD DE LOS PROCESADORES Y TENIENDO EN CUENTA LA CARGA ESPERADA DE LOS PROCESADORES, PUDIENDOSE BASAR OPCIONALMENTE LA CARGA ESPERADA EN DATOS HISTORICOS DE LA CARGA DE LOS PROCESADORES. SE CREA UN PROGRAMA DE REASIGNACION DE REDUNDANCIA ASIGNANDO AL MENOS OTRO DE LOS PROCESADORES DE DICHO DOMINIO DE REDUNDANCIA A CADA UD, PARA EL CASO DE QUE SEA NECESARIO REASIGNAR UNA UD A OTROS PROCESADORES DEBIDO A DESEQUILIBRIOS DE CARGA O A OTROS FALLOS DE FUNCIONAMIENTO DEL SISTEMA.
ES95941311T 1994-12-09 1995-12-08 Mecanismo de configuracion. Expired - Lifetime ES2161918T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9404295A SE9404295D0 (sv) 1994-12-09 1994-12-09 Sätt och anordning vid telekommunikation

Publications (1)

Publication Number Publication Date
ES2161918T3 true ES2161918T3 (es) 2001-12-16

Family

ID=20396281

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95941311T Expired - Lifetime ES2161918T3 (es) 1994-12-09 1995-12-08 Mecanismo de configuracion.

Country Status (17)

Country Link
EP (1) EP0796463B1 (es)
JP (1) JPH10511785A (es)
KR (1) KR100331492B1 (es)
CN (1) CN1132097C (es)
AT (1) ATE202225T1 (es)
AU (1) AU716774B2 (es)
BR (1) BR9509895A (es)
CA (1) CA2206373A1 (es)
DE (1) DE69521337T2 (es)
DK (1) DK0796463T3 (es)
ES (1) ES2161918T3 (es)
FI (1) FI972407A (es)
GR (1) GR3036045T3 (es)
MX (1) MX9703872A (es)
NO (1) NO972597L (es)
SE (1) SE9404295D0 (es)
WO (1) WO1996018149A2 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2206737C (fr) * 1997-03-27 2000-12-05 Bull S.A. Architecture en reseau de machine informatique
US6038677A (en) * 1997-03-31 2000-03-14 International Business Machines Corporation Automatic resource group formation and maintenance in a high availability cluster configuration
FR2773239A1 (fr) * 1997-12-30 1999-07-02 Bull Sa Configuration d'un systeme informatique multinodal
DE60233172D1 (de) * 2002-06-28 2009-09-10 Nokia Corp Lastausgleicheinrichtung und verfahren dafür
AU2002357568A1 (en) * 2002-12-31 2004-07-22 Zte Corporation A method of standby and controlling load in distributed data processing system
US7574708B2 (en) * 2004-03-04 2009-08-11 International Business Machines Corporation Mechanism for enabling the distribution of operating system resources in a multi-node computer system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5165018A (en) * 1987-01-05 1992-11-17 Motorola, Inc. Self-configuration of nodes in a distributed message-based operating system
US5274838A (en) * 1987-06-03 1993-12-28 Ericsson Ge Mobile Communications Inc. Fail-soft architecture for public trunking system
CA1318409C (en) * 1988-10-27 1993-05-25 Dennis L. Debruler Multiprocessor load sharing arrangement
DE59310083D1 (de) * 1993-09-24 2000-09-07 Siemens Ag Verfahren zum Lastausgleich in einem Multiprozessorsystem

Also Published As

Publication number Publication date
CN1169191A (zh) 1997-12-31
KR100331492B1 (ko) 2002-08-22
WO1996018149A3 (en) 1996-08-15
CA2206373A1 (en) 1996-06-13
NO972597L (no) 1997-08-05
JPH10511785A (ja) 1998-11-10
GR3036045T3 (en) 2001-09-28
DE69521337D1 (de) 2001-07-19
AU716774B2 (en) 2000-03-09
FI972407A0 (fi) 1997-06-06
FI972407A (fi) 1997-06-06
DE69521337T2 (de) 2001-10-11
EP0796463A2 (en) 1997-09-24
ATE202225T1 (de) 2001-06-15
CN1132097C (zh) 2003-12-24
SE9404295D0 (sv) 1994-12-09
MX9703872A (es) 1997-08-30
DK0796463T3 (da) 2001-09-03
BR9509895A (pt) 1997-11-25
WO1996018149A2 (en) 1996-06-13
NO972597D0 (no) 1997-06-06
KR980700611A (ko) 1998-03-30
EP0796463B1 (en) 2001-06-13
AU4277196A (en) 1996-06-26

Similar Documents

Publication Publication Date Title
Huang et al. Performance evaluation of adaptive MPI
Martin et al. WARPED: A time warp simulation kernel for analysis and application development
EP0917057A3 (en) Multiprocessor computer architecture with multiple operating system instances and software controlled resource allocation
DE69033092D1 (de) Betriebssystemaufbau mit mehreren verarbeitungseinheiten
EP0213843A3 (en) Digital processor control
GB9909258D0 (en) Management of server connections
HU228286B1 (en) Method system and computer program for workload management in a computing environment
EP0917056A3 (en) A multi-processor computer system and a method of operating thereof
ATE468562T1 (de) Virtualisierung von e/a-adapterressourcen
DE3886756D1 (de) Betriebsmittelzugriff für Multiprozessorrechnersystem.
ES2161918T3 (es) Mecanismo de configuracion.
SE9502192D0 (sv) Arrangement and method relating to information maniging systems
ES2007233A6 (es) Una estructura de memoria de encauzamiento para un computador de alta velocidad, unidad de acoplamiento a memoria para la misma y metodo correspondiente para grabar y leer ionformacion de datos.
Hasan et al. A tunable hybrid memory allocator
Horst et al. An architecture for high volume transaction processing
Benoit et al. Models and complexity results for performance and energy optimization of concurrent streaming applications
JPS54139445A (en) Composite computer system
Gargaro et al. Adapting Ada distribution and fault tolerance
JPS5860366A (ja) 電子計算機システム
Mannai et al. Design and implementation of a distributed transaction processing system
KR970071261A (ko) 동적 재구성이 가능한 단일 프로세서 시스템의 스케쥴러
WILSON Analysis of Algorithmic Structures with Heterogeneous Tasks(Final Report)
PE20001250A1 (es) Metodo y sistema para el control de material devuelto
Wang et al. Duplex redundant fault-tolerant system
BRUNSTROM et al. Experimental evaluation of dynamic data allocation strategies in a distributed database with changing workloads(Final Report)

Legal Events

Date Code Title Description
FG2A Definitive protection

Ref document number: 796463

Country of ref document: ES