ES2154831T3 - Soporte para datos que incorpora circuitos integrados. - Google Patents

Soporte para datos que incorpora circuitos integrados.

Info

Publication number
ES2154831T3
ES2154831T3 ES96927555T ES96927555T ES2154831T3 ES 2154831 T3 ES2154831 T3 ES 2154831T3 ES 96927555 T ES96927555 T ES 96927555T ES 96927555 T ES96927555 T ES 96927555T ES 2154831 T3 ES2154831 T3 ES 2154831T3
Authority
ES
Spain
Prior art keywords
integrated circuits
data
support
includes integrated
communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96927555T
Other languages
English (en)
Inventor
Yahya Haghiri-Tehrani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Application granted granted Critical
Publication of ES2154831T3 publication Critical patent/ES2154831T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/072—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising a plurality of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Near-Field Transmission Systems (AREA)

Abstract

SE PRESENTA UN SOPORTE DE DATOS CON AL MENOS DOS CIRCUITOS INTEGRADOS INCORPORADOS, DISPUESTOS UNO SOBRE OTROS EN UN AREA PARCIAL DEL SOPORTE, EN QUE AL MENOS UNO DE LOS CIRCUITOS INTEGRADOS PUEDE COMUNICARSE CON APARATOS EXTERNOS MEDIANTE ELEMENTOS DE ACOPLAMIENTO. PARA ORGANIZAR CON LA MAXIMA SENCILLEZ POSIBLE LA COMUNICACION ENTRE LOS CIRCUITOS INTEGRADOS INCORPORADOS, ESTOS CUENTAN CON MEDIOS QUE PERMITEN UNA COMUNICACION ENTRE LOS CIRCUITOS INTEGRADOS MEDIANTE UN ACOPLAMIENTO NO GALVANICO, SIN CONTACTOS.
ES96927555T 1995-07-21 1996-07-19 Soporte para datos que incorpora circuitos integrados. Expired - Lifetime ES2154831T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19526672A DE19526672A1 (de) 1995-07-21 1995-07-21 Datenträger mit integriertem Schaltkreis

Publications (1)

Publication Number Publication Date
ES2154831T3 true ES2154831T3 (es) 2001-04-16

Family

ID=7767434

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96927555T Expired - Lifetime ES2154831T3 (es) 1995-07-21 1996-07-19 Soporte para datos que incorpora circuitos integrados.

Country Status (7)

Country Link
EP (1) EP0842494B1 (es)
AT (1) ATE199601T1 (es)
AU (1) AU6734996A (es)
DE (2) DE19526672A1 (es)
ES (1) ES2154831T3 (es)
RU (1) RU2160468C2 (es)
WO (1) WO1997004416A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19922473A1 (de) * 1999-05-19 2000-11-30 Giesecke & Devrient Gmbh Chipträgermodul
FR2797075B1 (fr) * 1999-07-26 2001-10-12 Gemplus Card Int Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard
EP1136941A1 (de) * 2000-03-24 2001-09-26 Infineon Technologies AG Tragbare Datenträgeranordnung
ATE474285T1 (de) 2000-05-05 2010-07-15 Infineon Technologies Ag Chipkarte
FR2831991B1 (fr) * 2001-11-07 2005-02-18 Gemplus Card Int Encapsulation localisee d'une connexion pour objet portable intelligent souple
DE102007017133A1 (de) * 2007-04-11 2008-10-16 Giesecke & Devrient Gmbh Verfahren zum Herstellen eines kartenförmigen Datenträgers und kartenförmiger Datenträger

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2511544A1 (fr) * 1981-08-14 1983-02-18 Dassault Electronique Module electronique pour carte de transactions automatiques et carte equipee d'un tel module
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
DE69020077T2 (de) * 1989-09-09 1995-11-09 Mitsubishi Electric Corp Integrierte Schaltungskarte.
JPH06122297A (ja) * 1992-08-31 1994-05-06 Sony Chem Corp Ｉｃカード及びその製造方法
DE4241482A1 (de) * 1992-12-09 1994-06-16 Siemens Ag Verfahren und Einrichtung zur Herstellung von IC-Karten
FR2706701B1 (fr) * 1993-06-14 1997-03-21 Apple Computer Dispositif d'isolation galvanique à optocoupleur, et modem l'incorporant.
FR2727227B1 (fr) * 1994-11-17 1996-12-20 Schlumberger Ind Sa Dispositif de securite actif a memoire electronique

Also Published As

Publication number Publication date
RU2160468C2 (ru) 2000-12-10
DE19526672A1 (de) 1997-01-23
EP0842494B1 (de) 2001-03-07
AU6734996A (en) 1997-02-18
EP0842494A1 (de) 1998-05-20
WO1997004416A1 (de) 1997-02-06
ATE199601T1 (de) 2001-03-15
DE59606555D1 (de) 2001-04-12

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