AU6734996A - Data medium incorporating integrated circuits - Google Patents

Data medium incorporating integrated circuits

Info

Publication number
AU6734996A
AU6734996A AU67349/96A AU6734996A AU6734996A AU 6734996 A AU6734996 A AU 6734996A AU 67349/96 A AU67349/96 A AU 67349/96A AU 6734996 A AU6734996 A AU 6734996A AU 6734996 A AU6734996 A AU 6734996A
Authority
AU
Australia
Prior art keywords
integrated circuits
data medium
medium incorporating
incorporating integrated
communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU67349/96A
Inventor
Yahya Haghiri-Tehrani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Publication of AU6734996A publication Critical patent/AU6734996A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/072—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising a plurality of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating

Abstract

Described is a data medium with at least two integrated circuits located in a zone one above the other, whereby at least one of the integrated circuits can communicate with external equipment via coupling elements. In order to ensure that communication between the integrated circuits is as simple as possible, the circuits are fitted with means which permit communication between them by non-conductive coupling involving no physical contact.
AU67349/96A 1995-07-21 1996-07-19 Data medium incorporating integrated circuits Abandoned AU6734996A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19526672A DE19526672A1 (en) 1995-07-21 1995-07-21 Data carrier with integrated circuit
DE19526672 1995-07-21
PCT/EP1996/003195 WO1997004416A1 (en) 1995-07-21 1996-07-19 Data medium incorporating integrated circuits

Publications (1)

Publication Number Publication Date
AU6734996A true AU6734996A (en) 1997-02-18

Family

ID=7767434

Family Applications (1)

Application Number Title Priority Date Filing Date
AU67349/96A Abandoned AU6734996A (en) 1995-07-21 1996-07-19 Data medium incorporating integrated circuits

Country Status (7)

Country Link
EP (1) EP0842494B1 (en)
AT (1) ATE199601T1 (en)
AU (1) AU6734996A (en)
DE (2) DE19526672A1 (en)
ES (1) ES2154831T3 (en)
RU (1) RU2160468C2 (en)
WO (1) WO1997004416A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19922473A1 (en) * 1999-05-19 2000-11-30 Giesecke & Devrient Gmbh Chip carrier module has cut-outs forming large-area setting material holders with boundary forming setting material flow barrier, bridges mechanically connecting adjacent contact areas
FR2797075B1 (en) * 1999-07-26 2001-10-12 Gemplus Card Int METHOD FOR MANUFACTURING A PORTABLE DEVICE WITH INTEGRATED CIRCUITS, OF THE SMART CARD TYPE OF REDUCED FORMAT IN RELATION TO THE STANDARD FORMAT
EP1136941A1 (en) * 2000-03-24 2001-09-26 Infineon Technologies AG Portable data carrier
DE50015958D1 (en) 2000-05-05 2010-08-26 Infineon Technologies Ag smart card
FR2831991B1 (en) * 2001-11-07 2005-02-18 Gemplus Card Int LOCALIZED ENCAPSULATION OF A CONNECTION FOR SMART INTELLIGENT PORTABLE OBJECT
DE102007017133A1 (en) * 2007-04-11 2008-10-16 Giesecke & Devrient Gmbh Card-shaped data carrier i.e. smart card, manufacturing method, involves producing card body with two dimensional recess, and applying label on card body in region of recess, where recess is hollowed during manufacturing of card body

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2511544A1 (en) * 1981-08-14 1983-02-18 Dassault Electronique ELECTRONIC MODULE FOR AUTOMATIC TRANSACTION CARD AND CARD COMPRISING SUCH A MODULE
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
DE69020077T2 (en) * 1989-09-09 1995-11-09 Mitsubishi Electric Corp Integrated circuit card.
JPH06122297A (en) * 1992-08-31 1994-05-06 Sony Chem Corp Ic card and manufacture thereof
DE4241482A1 (en) * 1992-12-09 1994-06-16 Siemens Ag Chip-carrying card mfr. - involves chip recess prodn. by forming blind hole and then embossing
FR2706701B1 (en) * 1993-06-14 1997-03-21 Apple Computer Galvanic isolation device with optocoupler, and modem incorporating it.
FR2727227B1 (en) * 1994-11-17 1996-12-20 Schlumberger Ind Sa ACTIVE SECURITY DEVICE WITH ELECTRONIC MEMORY

Also Published As

Publication number Publication date
WO1997004416A1 (en) 1997-02-06
ES2154831T3 (en) 2001-04-16
ATE199601T1 (en) 2001-03-15
EP0842494B1 (en) 2001-03-07
DE59606555D1 (en) 2001-04-12
RU2160468C2 (en) 2000-12-10
DE19526672A1 (en) 1997-01-23
EP0842494A1 (en) 1998-05-20

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