ES2111592T3 - Disposicion de circuito para la conversion de una señal de entrada simetrica de fase opuesta en una señal de salida asimetrica monofasica. - Google Patents
Disposicion de circuito para la conversion de una señal de entrada simetrica de fase opuesta en una señal de salida asimetrica monofasica.Info
- Publication number
- ES2111592T3 ES2111592T3 ES92115432T ES92115432T ES2111592T3 ES 2111592 T3 ES2111592 T3 ES 2111592T3 ES 92115432 T ES92115432 T ES 92115432T ES 92115432 T ES92115432 T ES 92115432T ES 2111592 T3 ES2111592 T3 ES 2111592T3
- Authority
- ES
- Spain
- Prior art keywords
- conversion
- output signal
- input signal
- circuit provision
- symmetrical input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
LA DISPOSICION DE CIRCUITO PREVE UN AMPLIFICADOR (DD) DE DIFERENCIA DOBLE CON DOS SALIDAS (3,4) DE CORRIENTE DE CONTRAINTERVALO DE CONTRAFASE, QUE ESTA CONECTADA DE FORMA RESPECTIVA EN UNA ENTRADA (5,6) DE UN CONVERTIDOR DE TENSION-CORRIENTE DE ADICION CON UN AMPLIFICADOR (OP) DE OPERACIONES CONECTADO. VENTAJA: BUENA EXCITACION EN TENSIONES DE ABASTECIMIENTO PEQUEÑAS Y COMPENSACION DE UNA MODULACION DE FACTOR DE AMPLIFICACION NO DESEADO EN DEPENDENCIA DE LA TENSION DE ABASTECIMIENTO.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19920115432 EP0586730B1 (de) | 1992-09-09 | 1992-09-09 | Schaltungsanordnung zum Umformen eines symmetrischen gegenphasigen Eingangssignales in ein unsymmetrisches einphasiges Ausgangssignal |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2111592T3 true ES2111592T3 (es) | 1998-03-16 |
Family
ID=8209985
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES92115432T Expired - Lifetime ES2111592T3 (es) | 1992-09-09 | 1992-09-09 | Disposicion de circuito para la conversion de una señal de entrada simetrica de fase opuesta en una señal de salida asimetrica monofasica. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0586730B1 (es) |
DE (1) | DE59209150D1 (es) |
ES (1) | ES2111592T3 (es) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3801923A (en) * | 1972-07-11 | 1974-04-02 | Motorola Inc | Transconductance reduction using multiple collector pnp transistors in an operational amplifier |
US4617523A (en) * | 1985-08-08 | 1986-10-14 | Tektronix, Inc. | Differential pair with compensation for effects of parasitic capacitance |
EP0459070A1 (en) * | 1990-05-31 | 1991-12-04 | STMicroelectronics S.r.l. | High slew-rate operational amplifier with bias controlled by the input differential signal |
-
1992
- 1992-09-09 DE DE59209150T patent/DE59209150D1/de not_active Expired - Lifetime
- 1992-09-09 EP EP19920115432 patent/EP0586730B1/de not_active Expired - Lifetime
- 1992-09-09 ES ES92115432T patent/ES2111592T3/es not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE59209150D1 (de) | 1998-02-26 |
EP0586730A1 (de) | 1994-03-16 |
EP0586730B1 (de) | 1998-01-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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