ES2064477T3 - ANALOGUE MACROCIRCUIT BUILT IN A NETWORK OF DIGITAL DOORS. - Google Patents

ANALOGUE MACROCIRCUIT BUILT IN A NETWORK OF DIGITAL DOORS.

Info

Publication number
ES2064477T3
ES2064477T3 ES89480033T ES89480033T ES2064477T3 ES 2064477 T3 ES2064477 T3 ES 2064477T3 ES 89480033 T ES89480033 T ES 89480033T ES 89480033 T ES89480033 T ES 89480033T ES 2064477 T3 ES2064477 T3 ES 2064477T3
Authority
ES
Spain
Prior art keywords
powered
signal
frequency
clock signal
macrocircuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89480033T
Other languages
Spanish (es)
Inventor
Joseph Michael Mosley
Allan Leslie Mullgrav Jr
Philip Krankie Noto
Clarence Ivan Peterson Jr
Edward Francis Culican Sr
John Donald Davis
John Farley Ewen
Scott Allan Mccabe
Philipp Edward Pritzlaff Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of ES2064477T3 publication Critical patent/ES2064477T3/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

SE DESCRIBE UN CHIP DE MATRIZ DE PUERTA LOGICA SIMPLE QUE TIENE UNA PRIMERA PORCION DEDICADA A LA GENERACION DE UNA O MAS SEÑALES DE RELOJ Y LA OTRA PARTE QUE QUEDA OCUPADA POR LOS CIRCUITOS LOGICOS. LA PRIMERA PORCION USA LA MISMA CELULA MATRIZ PUERTA DISEÑADA COMO PARTE INTEGRANTE EN LOS CIRCUITOS LOGICOS DE LA PORCION QUE QUEDA. AMBAS PORCIONES SE POTENCIAN MEDIANTE MODELOS METALIZADOS DE MATRICES PUERTA SIMILARES, AUNQUE ALGUNAS DE LAS CELULAS DE LAS FUENTES DE SEÑAL DE RELOJ SON DESCONECTADAS DESDE EL CHIP NORMAL QUE POTENCIA LOS BUSSES Y SE POTENCIA EN CAMBIO POR LOS RESPECTIVOS GENERADORES DE SEÑAL. CADA SEÑAL DE CONTROL REPRESENTA LA DIFERENCIA DE FRECUENCIA ENTRE UNA SEÑAL DE RELOJ DADA Y UNA SEÑAL DE REFERENCIA. LAS CELULAS QUE SE POTENCIAN MEDIANTE UNA SEÑAL DE CONTROL DADA INTRODUCEN UN RETRASO DE SEÑAL PROPORCIONAL PARA CONDUCIR LA FRECUENCIA DE LA SEÑAL DE RELOJ DENTRO DE UNA PREFIJADA RELACION CON LA FRECUENCIA DE LA SEÑAL DE REFERENCIA.A SIMPLE LOGIC DOOR MATRIX CHIP IS DESCRIBED WHICH HAS A FIRST PORTION DEDICATED TO THE GENERATION OF ONE OR MORE CLOCK SIGNALS AND THE OTHER PART THAT IS OCCUPIED BY LOGIC CIRCUITS. THE FIRST PORTION USES THE SAME DOOR MATRIX CELL DESIGNED AS AN INTEGRAL PART IN THE LOGICAL CIRCUITS OF THE LEFT PORTION. BOTH PORTIONS ARE POWERED THROUGH METALIZED MODELS OF SIMILAR DOOR MATRIXES, ALTHOUGH SOME OF THE CELLS OF THE CLOCK SIGNAL SOURCES ARE DISCONNECTED FROM THE NORMAL CHIP THAT POWER THE BUSSES AND ARE POWERED IN CHANGE BY THE RESPECTIVE GENERATORS. EACH CONTROL SIGNAL REPRESENTS THE FREQUENCY DIFFERENCE BETWEEN A GIVEN CLOCK SIGNAL AND A REFERENCE SIGNAL. CELLS THAT ARE POWERED BY A GIVEN CONTROL SIGNAL INTRODUCE A PROPORTIONAL SIGNAL DELAY TO DRIVE THE FREQUENCY OF THE CLOCK SIGNAL WITHIN A PREFIXED RELATION TO THE FREQUENCY OF THE REFERENCE SIGNAL.

ES89480033T 1988-03-25 1989-02-28 ANALOGUE MACROCIRCUIT BUILT IN A NETWORK OF DIGITAL DOORS. Expired - Lifetime ES2064477T3 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/173,517 US4833425A (en) 1988-03-25 1988-03-25 Analog macro embedded in a digital gate array

Publications (1)

Publication Number Publication Date
ES2064477T3 true ES2064477T3 (en) 1995-02-01

Family

ID=22632383

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89480033T Expired - Lifetime ES2064477T3 (en) 1988-03-25 1989-02-28 ANALOGUE MACROCIRCUIT BUILT IN A NETWORK OF DIGITAL DOORS.

Country Status (12)

Country Link
US (1) US4833425A (en)
EP (1) EP0334784B1 (en)
JP (1) JPH0770693B2 (en)
KR (1) KR920003451B1 (en)
CN (1) CN1031305C (en)
CA (1) CA1312929C (en)
DE (1) DE68919376T2 (en)
ES (1) ES2064477T3 (en)
GB (1) GB8906479D0 (en)
HK (1) HK90495A (en)
MY (1) MY103856A (en)
PH (1) PH31230A (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4943787A (en) 1989-09-05 1990-07-24 Motorola, Inc. Digital time base generator with adjustable delay between two outputs
US5241286A (en) * 1991-08-28 1993-08-31 Fred Mirow FET oscillator using voltage and temperature compensated amplifier
US5191301A (en) * 1992-05-12 1993-03-02 International Business Machines Corporation Integrated differential voltage controlled ring oscillator
US5337024A (en) * 1993-06-22 1994-08-09 Rockwell International Corporation Phase locked loop frequency modulator using fractional division
US5559842A (en) * 1994-03-30 1996-09-24 Lucent Technologies Inc. Network-controlled reference frequency generator
CN1050007C (en) * 1995-04-05 2000-03-01 盛群半导体股份有限公司 Layout method of integrated circuit
CN1075667C (en) * 1996-04-19 2001-11-28 松下电器产业株式会社 Semiconductor integrated circuit and system using said circuit
JP2000124802A (en) * 1998-10-20 2000-04-28 Mitsubishi Electric Corp Pll circuit
US6779125B1 (en) * 2000-06-09 2004-08-17 Cirrus Logic, Inc. Clock generator circuitry
US6441667B1 (en) * 2001-03-29 2002-08-27 International Business Machines Corporation Multiphase clock generator

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5135244A (en) * 1974-09-20 1976-03-25 Hitachi Ltd
US4069462A (en) * 1976-12-13 1978-01-17 Data General Corporation Phase-locked loops
US4227158A (en) * 1979-02-01 1980-10-07 The Singer Company Multifrequency control from a single crystal
US4388597A (en) * 1980-06-03 1983-06-14 Motorola Inc. Frequency synthesizer having plural phase locked loops
US4394769A (en) * 1981-06-15 1983-07-19 Hughes Aircraft Company Dual modulus counter having non-inverting feedback
GB8329511D0 (en) * 1983-11-04 1983-12-07 Inmos Ltd Timing apparatus
JPS6147660A (en) * 1984-08-13 1986-03-08 Hitachi Ltd Cmos integrated circuit device
US4594563A (en) * 1984-11-02 1986-06-10 Ampex Corporation Signal comparison circuit and phase-locked-loop using same
JPS61263241A (en) * 1985-05-17 1986-11-21 Matsushita Electronics Corp Gate array
JPS6376452A (en) * 1986-09-19 1988-04-06 Nec Corp Integrated circuit device

Also Published As

Publication number Publication date
CN1039329A (en) 1990-01-31
US4833425A (en) 1989-05-23
EP0334784A2 (en) 1989-09-27
KR890015419A (en) 1989-10-30
JPH0210768A (en) 1990-01-16
CN1031305C (en) 1996-03-13
DE68919376D1 (en) 1994-12-22
KR920003451B1 (en) 1992-05-01
GB8906479D0 (en) 1989-05-04
EP0334784A3 (en) 1990-11-28
DE68919376T2 (en) 1995-05-24
CA1312929C (en) 1993-01-19
HK90495A (en) 1995-06-16
MY103856A (en) 1993-09-30
EP0334784B1 (en) 1994-11-17
PH31230A (en) 1998-06-16
JPH0770693B2 (en) 1995-07-31

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