ES2063306T3 - Procedimiento para el borrado de los puntos de memoria dispositivo destinado a su puesta en marcha, y su utilizacion en un dispositivo de memoria no alimentada. - Google Patents

Procedimiento para el borrado de los puntos de memoria dispositivo destinado a su puesta en marcha, y su utilizacion en un dispositivo de memoria no alimentada.

Info

Publication number
ES2063306T3
ES2063306T3 ES90401531T ES90401531T ES2063306T3 ES 2063306 T3 ES2063306 T3 ES 2063306T3 ES 90401531 T ES90401531 T ES 90401531T ES 90401531 T ES90401531 T ES 90401531T ES 2063306 T3 ES2063306 T3 ES 2063306T3
Authority
ES
Spain
Prior art keywords
memory
clearing
procedure
cleared
cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90401531T
Other languages
English (en)
Inventor
Augustin Farrugia
Gerard Binguy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=9382422&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2063306(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Gemplus Card International SA filed Critical Gemplus Card International SA
Application granted granted Critical
Publication of ES2063306T3 publication Critical patent/ES2063306T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Credit Cards Or The Like (AREA)
  • Non-Volatile Memory (AREA)

Abstract

EL PROCEDIMIENTO DE BORRADO DE PUNTOS DE MEMORIA EEPROM SEGUN EL INVENTO CONSISTE, AL COMIENZO DE CADA OPERACION DE BORRADO, EN ABRIR UN CONTADOR EN UNA MEMORIA RAM, EN EFECTUAR UN CICLO DE BORRADO, COMO EL CREADO POR EL CONSTRUCTOR, DESPUES UN CICLO DE LECTURA Y DE COMPARACION DE LA TENSION LEIDA CON UNA TENSION ESPERADA CORRESPONDIENTE AL ESTADO "BORRADO" DEL PUNTO DE MEMORIA, DESPUES, SI LA TENSION LEIDA NO ES LA TENSION ESPERADA, EN INCREMENTAR EL CONTADOR Y EN CONTROLAR UN NUEVO CICLO DE BORRADO, LECTURA Y COMPARACION. CUANDO LA TENSION LEIDA ES LA TENSION ESPERADA, SE EMITE UN CODIGO DE RETORNO CARACTERISTICO DEL CONTENIDO DEL CONTADOR Y DEL NUMERO DE CICLOS DE BORRADO QUE HAN SIDO NECESARIOS PARA LA OPERACION DE BORRADO, CON DESTINO AL USUARIO. EL PROCEDIMIENTO SE APLICA, EN ESPECIAL, EN LOS DISPOSITIVOS DE MEMORIA EEPROM NO ALIMENTADOS DEL TIPO TARJETAS IMPRESAS.
ES90401531T 1989-06-06 1990-06-06 Procedimiento para el borrado de los puntos de memoria dispositivo destinado a su puesta en marcha, y su utilizacion en un dispositivo de memoria no alimentada. Expired - Lifetime ES2063306T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8907467A FR2647941B1 (fr) 1989-06-06 1989-06-06 Procede d'effacement de points memoire, dispositif destine a sa mise en oeuvre, et son utilisation dans un dispositif a memoire non alimente

Publications (1)

Publication Number Publication Date
ES2063306T3 true ES2063306T3 (es) 1995-01-01

Family

ID=9382422

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90401531T Expired - Lifetime ES2063306T3 (es) 1989-06-06 1990-06-06 Procedimiento para el borrado de los puntos de memoria dispositivo destinado a su puesta en marcha, y su utilizacion en un dispositivo de memoria no alimentada.

Country Status (6)

Country Link
US (1) US5138580A (es)
EP (1) EP0409672B1 (es)
JP (1) JP2641147B2 (es)
DE (1) DE69012017T2 (es)
ES (1) ES2063306T3 (es)
FR (1) FR2647941B1 (es)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5268319A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5270979A (en) * 1991-03-15 1993-12-14 Sundisk Corporation Method for optimum erasing of EEPROM
US6230233B1 (en) 1991-09-13 2001-05-08 Sandisk Corporation Wear leveling techniques for flash EEPROM systems
FR2682522B1 (fr) * 1991-10-11 1997-01-10 Sgs Thomson Microelectronics Procede pour verifier le contenu apres effacement d'une memoire permanente effacable, notamment de type eprom, dispositif pour sa mise en óoeuvre et memoire integrant ce dispositif.
JP2716906B2 (ja) * 1992-03-27 1998-02-18 株式会社東芝 不揮発性半導体記憶装置
JPH0750558B2 (ja) * 1992-09-22 1995-05-31 インターナショナル・ビジネス・マシーンズ・コーポレイション 一括消去型不揮発性メモリ
US5388083A (en) * 1993-03-26 1995-02-07 Cirrus Logic, Inc. Flash memory mass storage architecture
US5359558A (en) * 1993-08-23 1994-10-25 Advanced Micro Devices, Inc. Flash eeprom array with improved high endurance
GB2283342B (en) * 1993-10-26 1998-08-12 Intel Corp Programmable code store circuitry for a nonvolatile semiconductor memory device
US6728851B1 (en) 1995-07-31 2004-04-27 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6081878A (en) 1997-03-31 2000-06-27 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6757800B1 (en) 1995-07-31 2004-06-29 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6801979B1 (en) 1995-07-31 2004-10-05 Lexar Media, Inc. Method and apparatus for memory control circuit
US6411546B1 (en) 1997-03-31 2002-06-25 Lexar Media, Inc. Nonvolatile memory using flexible erasing methods and method and system for using same
US6064596A (en) * 1997-12-26 2000-05-16 Samsung Electronics Co., Ltd. Nonvolatile integrated circuit memory devices and methods of operating same
US6040997A (en) * 1998-03-25 2000-03-21 Lexar Media, Inc. Flash memory leveling architecture having no external latch
US6256755B1 (en) 1998-10-19 2001-07-03 International Business Machines Corporation Apparatus and method for detecting defective NVRAM cells
US6374337B1 (en) 1998-11-17 2002-04-16 Lexar Media, Inc. Data pipelining method and apparatus for memory control circuit
JP2002298590A (ja) * 2001-03-30 2002-10-11 Fujitsu Ltd 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の消去方法
US6837425B2 (en) 2002-09-13 2005-01-04 Visa U.S.A. Inc. Compact protocol and solution for substantially offline messaging between portable consumer device and based device
DE60316171T2 (de) * 2002-10-28 2008-05-29 SanDisk Corp., Milpitas Automatischer abnutzungsausgleich in einem nicht-flüchtigen speichersystem

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2828836C2 (de) * 1978-06-30 1983-01-05 Siemens AG, 1000 Berlin und 8000 München Wortweise elektrisch löschbarer, nichtflüchtiger Speicher
DE3315047A1 (de) * 1983-04-26 1984-10-31 Siemens AG, 1000 Berlin und 8000 München Integrierte schaltung mit einem als nichtfluechtiger schreib-lese-speicher ausgestalteten anwendungsspeicher
US4763305A (en) * 1985-11-27 1988-08-09 Motorola, Inc. Intelligent write in an EEPROM with data and erase check
JPS63106996A (ja) * 1986-10-24 1988-05-12 Hitachi Ltd 半導体集積回路装置
US4758986A (en) * 1987-02-20 1988-07-19 Motorola, Inc. Single transistor cell for electrically-erasable programmable read-only memory and array thereof

Also Published As

Publication number Publication date
JP2641147B2 (ja) 1997-08-13
DE69012017T2 (de) 1994-12-22
FR2647941B1 (fr) 1991-08-30
US5138580A (en) 1992-08-11
DE69012017D1 (de) 1994-10-06
JPH0395798A (ja) 1991-04-22
EP0409672A1 (fr) 1991-01-23
EP0409672B1 (fr) 1994-08-31
FR2647941A1 (fr) 1990-12-07

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