ES2057085T3 - Sistema de emision de bloques hdlc a traves de canal de tipo mic, con circuito hdlc unico y memoria intermedia de transposicion. - Google Patents

Sistema de emision de bloques hdlc a traves de canal de tipo mic, con circuito hdlc unico y memoria intermedia de transposicion.

Info

Publication number
ES2057085T3
ES2057085T3 ES89123956T ES89123956T ES2057085T3 ES 2057085 T3 ES2057085 T3 ES 2057085T3 ES 89123956 T ES89123956 T ES 89123956T ES 89123956 T ES89123956 T ES 89123956T ES 2057085 T3 ES2057085 T3 ES 2057085T3
Authority
ES
Spain
Prior art keywords
hdlc
memory
cim
unique
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89123956T
Other languages
English (en)
Inventor
Corre Noel Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Nokia Inc
Original Assignee
Alcatel CIT SA
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Nokia Inc filed Critical Alcatel CIT SA
Application granted granted Critical
Publication of ES2057085T3 publication Critical patent/ES2057085T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)

Abstract

EL CAMPO DEL INVENTO ES EL DE LA TRANSMISION DE DATOS, EN EL SECTOR DE LAS TELECOMUNICCIONES, SEGUN EL PROTOCOLO DE NORMALIZACION ISO, Y MAS CONCRETAMENTE SEGUN LOS NIVELES 1 Y 2 DE LA NORMAL ESENCIALMENTE PARA EL MULTIPLEXADO DE 32 VIAS HDLC EN UN ENLACE CIM MULTIVIA. EL OBJETIVO ES, PRINCIPALMENTE, EL DE PROPORCIONAR UN SISTEMA COMPACTO, ECONOMIZANDO EL NUMERO DE COMPONENTES, QUE PERMITA TRABAJAR A UNA VELOCIDAD ELEVADA SIN RIESGO DE ESCASEZ EN EL ENLACE CIM. ESTE OBJETIVO SE ALCANZA CON LA AYUDA DE UN SISTEMA QUE CONSTA DE UNA MEMORIA TAMPON UNICA DE TRANSPOSICION (71), CON CICLO DE LECTURA DISTINTO AL CICLO DE ESCRITURA, QUE COOPERA CON UN CIRCUITO UNICO MONOVIA (70) DE FORMATEO DE LAS TRAMAS HDLC, TENIENDOSE ACCESO A LA ESCRITURA EN DICHA MEMORIA (71) MEDIANTE DICHAS TRAMAS HDLC FORMATEADAS, Y TENIENDOSE ACCESO A LA LECTURA EN LA MISMA MEDIANTE EL CONTROL DE ELEMENTOS (78) DE MUESTREO SELECTIVO EN LA MEMORIA (71) DE LOS DATOS DE CONSTRUCCION DE LOS BLOQUES SUCESIVOS DE LAS VIAS ENTRELAZADAS DE LA TRAMA CIM.
ES89123956T 1988-12-30 1989-12-27 Sistema de emision de bloques hdlc a traves de canal de tipo mic, con circuito hdlc unico y memoria intermedia de transposicion. Expired - Lifetime ES2057085T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8817504A FR2642247B1 (fr) 1988-12-30 1988-12-30 Systeme d'emission de trames hdlc sur canal de type mic, a circuit hdlc unique et memoire tampon de transposition

Publications (1)

Publication Number Publication Date
ES2057085T3 true ES2057085T3 (es) 1994-10-16

Family

ID=9373641

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89123956T Expired - Lifetime ES2057085T3 (es) 1988-12-30 1989-12-27 Sistema de emision de bloques hdlc a traves de canal de tipo mic, con circuito hdlc unico y memoria intermedia de transposicion.

Country Status (9)

Country Link
US (1) US5056084A (es)
EP (1) EP0377204B1 (es)
JP (1) JP2922950B2 (es)
AT (1) ATE108049T1 (es)
AU (1) AU623207B2 (es)
CA (1) CA2006831C (es)
DE (1) DE68916528T2 (es)
ES (1) ES2057085T3 (es)
FR (1) FR2642247B1 (es)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2642245B1 (fr) * 1988-12-30 1991-04-05 Cit Alcatel Systeme de reception et de traitement de trames hdlc transmises sur liaison mic multivoies a multiplexage temporel, notamment pour commutateur de donnees
CH680101A5 (es) * 1989-12-19 1992-06-15 Alcatel Str Ag
US5189671A (en) * 1991-12-20 1993-02-23 Raynet Corporation Apparatus and method for formatting variable length data packets for a transmission network
US5251207A (en) * 1992-03-10 1993-10-05 International Business Machines Corporation Combined terminal adapter for SMDS and frame relay high speed data services
KR940012937A (ko) * 1992-11-26 1994-06-24 정용문 일차군 다중화장치의 시그날링 채널 데이터 송수신회로
US5459723A (en) * 1994-03-08 1995-10-17 Advanced Micro Devices Packet management device for fast-packet network
US5600684A (en) * 1994-09-13 1997-02-04 Kuzma; Andrew Automatic identification for digital conferencing
US5721737A (en) * 1995-05-09 1998-02-24 Smc Pneumatics, Inc. Serial transmission system for controlling a network of I/O devices
US5974052A (en) * 1996-05-10 1999-10-26 U.S.T.N. Services Frame relay access device and method for transporting SS7 information between signaling points
GB2316279A (en) * 1996-08-10 1998-02-18 Motorola Inc Control circuit for digital mobile TDMA telecommunications device
US5892768A (en) * 1996-09-12 1999-04-06 Etherwan System, Inc. 10/100-base ethernet to T1/E1 HDSL converter and method of operation
FR2767003B1 (fr) * 1997-07-31 1999-11-19 Sqware T Controleur de protocole de transmission de donnees numeriques hdlc
US6532239B1 (en) * 1997-12-27 2003-03-11 Hyundai Electronics Industries Co., Ltd. Transmission/reception concurrent matching apparatus for TDM channels and method thereof
CA2297334A1 (en) * 1999-01-28 2000-07-28 Nortel Networks Corporation System and method to efficiently transmit common channel signals in a switching network
US6973523B1 (en) 2000-03-27 2005-12-06 Interdigital Technology Corp. Code division multiple access modem interface
DE10232982B4 (de) * 2002-07-19 2005-11-10 Rohde & Schwarz Gmbh & Co. Kg Verfahren und Anordnung zum empfangsseitigen Erkennen der zusammengehörigen Datenkanäle von im Zeitmultiplex übertragenen Datensignalen
FR2877169B1 (fr) * 2004-10-27 2007-01-26 France Telecom Procede de synchronisation d'un recepteur radio, et recepteur adapte pour mettre en oeuvre un tel procede
CN118158300B (zh) * 2024-05-10 2024-08-02 成都天地一格科技有限公司 一种基于hdlc协议的通信方法及电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2516730A1 (fr) * 1981-11-13 1983-05-20 Thomson Csf Mat Tel Interface de passage d'une liaison en mode paquets a une liaison en mode mic
FR2526615A1 (fr) * 1982-05-10 1983-11-10 Bodros Christian Coupleur a haut debit entre un multiplex de voies mic et un commutateur de paquets
IT1155575B (it) * 1982-07-27 1987-01-28 Cselt Centro Studi Lab Telecom Interfaccia multipla di comunicazione tra elaboratore di processo e mezzo trasmissivo numerico
CA1229434A (en) * 1983-12-23 1987-11-17 Northern Telecom Limited Multiplexer for bit oriented protocol data link control
FR2608337B1 (fr) * 1986-12-15 1989-02-10 France Etat Equipements de multiplexage et demultiplexage numeriques de paquets de longueurs differentes
US4958342A (en) * 1987-03-11 1990-09-18 Aristacom International, Inc. Adaptive digital network interface
FR2642245B1 (fr) * 1988-12-30 1991-04-05 Cit Alcatel Systeme de reception et de traitement de trames hdlc transmises sur liaison mic multivoies a multiplexage temporel, notamment pour commutateur de donnees

Also Published As

Publication number Publication date
EP0377204A1 (fr) 1990-07-11
AU623207B2 (en) 1992-05-07
CA2006831A1 (fr) 1990-06-30
ATE108049T1 (de) 1994-07-15
CA2006831C (fr) 1999-11-16
JP2922950B2 (ja) 1999-07-26
FR2642247A1 (fr) 1990-07-27
AU4736189A (en) 1990-07-05
DE68916528T2 (de) 1994-10-13
US5056084A (en) 1991-10-08
DE68916528D1 (de) 1994-08-04
EP0377204B1 (fr) 1994-06-29
JPH02226926A (ja) 1990-09-10
FR2642247B1 (fr) 1991-04-05

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