Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/81—Bodies
  • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
  • H10H20/8506—Containers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
  • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W90/00—Package configurations
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/81—Bodies
  • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
  • H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/831—Electrodes characterised by their shape
  • H10H20/8312—Electrodes characterised by their shape extending at least partially through the bodies
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/832—Electrodes characterised by their material
  • H10H20/835—Reflective materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
  • H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors

Definitions

• An active region may be fabricated, for example, from silicon carbide, gallium nitride, gallium phosphide, aluminum nitride, and/or gallium arsenide-based materials and/or from organic semiconductor materials. Photons generated by the active region are initiated in all directions.
• the LED chip may further comprise a dielectric reflective layer on the active LED structure; and a metal reflective layer on the dielectric reflective layer and electrically coupled to the active LED structure through the dielectric reflective layer, wherein the dielectric structure comprises a same material as the dielectric reflective layer. In another embodiment, the dielectric structure comprises a different material than the dielectric reflector layer.
• the LED chip may further comprise an n-contact metal electrically coupled with the n-type layer, wherein a portion of the n-contact metal extends to a position that is beneath the contact and between the barrier layer and the carrier submount.
• the LED chip may further comprise a passivation layer that is between the barrier layer and the n-contact metal.
• the n- contact metal forms a contour shape beneath the contact, and the contour shape is defined by a shape of the dielectric structure.
• the dielectric structure forms a plurality of dielectric regions that are beneath the p- contact, and the barrier layer electrically connects with the p-contact between adjacent dielectric regions of the plurality of dielectric regions.
• the plurality of dielectric regions is arranged with a pitch in a range from 0.5 pm to less than or equal to 1 1 pm.
• the plurality of dielectric regions form a plurality of stripes beneath the p-contact.
• the plurality of dielectric regions form a plurality of islands beneath the p-contact.
• FIG. 5A is a cross-section of a portion of the LED chip of FIG. 1 illustrating voiding that may occur under the p-contact.
• FIG. 6 is a top view of a portion of an LED chip that is similar to the LED chip of FIG. 4.
• FIG. 7 is a top view of a portion of an LED chip that is similar to the LED chip of FIG. 6 where the dielectric structure is arranged with fewer stripes below the p-contact.
• FIG. 8 is a top view of a portion of an LED chip that is similar to the LED chip of FIG. 7 where the dielectric structure is arranged with an increased number of stripes below the p-contact.
• the active LED structure may be grown on a growth substrate that can include many materials, such as sapphire, SiC, aluminum nitride (AIN), GaN, with a suitable substrate being a 4H polytype of SiC, although other SiC polytypes can also be used including 3C, 6H, and 15R polytypes.
• SiC has certain advantages, such as a closer crystal lattice match to Group III nitrides than other substrates and results in Group III nitride films of high quality.
• SiC also has a very high thermal conductivity so that the total output power of Group III nitride devices on SiC is not limited by the thermal dissipation of the substrate.
• UV LEDs may also be provided with one or more lumiphoric materials to provide LED packages with aggregated emissions having a broad spectrum and improved color quality for visible light applications.
• Near-IR and/or IR wavelengths for LED structures of the present disclosure may have wavelengths above 700 nm, such as in a range from 750 nm to 1100 nm, or more.
• Light emitted by the active layer or region of an LED chip typically is initiated in multiple directions.
• internal mirrors or external reflective surfaces may be employed to redirect as much light as possible toward a desired emission direction.
• Internal mirrors may include single or multiple layers.
• Some multi-layer mirrors include a metal reflector layer and a dielectric reflector layer, wherein the dielectric reflector layer is arranged between the metal reflector layer and a plurality of semiconductor layers.
• a passivation layer is arranged between the metal reflector layer and first and second electrical contacts, wherein the first electrical contact is arranged in conductive electrical communication with a first semiconductor layer, and the second electrical contact is arranged in conductive electrical communication with a second semiconductor layer.
• some light may be absorbed by the mirror. Additionally, light that is redirected through the active LED structure may be absorbed by other layers or elements within the LED chip.
• silver (Ag) may be considered a reflective material (e.g., at least 80% reflective).
• appropriate materials may be selected to provide a desired, and in some embodiments high, reflectivity and/or a desired, and in some embodiments low, absorption.
• a “light- transmissive” material may be configured to transmit at least 50% of emitted radiation of a desired wavelength.
• the LED chip 10 may also comprise a barrier layer 34 on the second reflective layer 28 to prevent migration of material of the second reflective layer 28, such as Ag, to other layers. Preventing this migration helps the LED chip 10 maintain efficient operation throughout its lifetime.
• the barrier layer 34 may comprise an electrically conductive material, with suitable materials including but not limited Ti, Pt, Ni, Au, tungsten (W), and combinations or alloys thereof.
• the barrier layer 34 is arranged to laterally extend beyond portions of the active LED structure 12, or a peripheral border of the active LED structure 12 in order to provide an electrical connection with a p-contact 36.
• the passivation layer 38 extends along the first reflective layer 24 in the first opening 40 and is arranged on a surface of the n- type layer 18.
• the LED chip 10 further includes an n-contact metal layer 42 that is arranged on the passivation layer 38 and across the LED chip 10.
• the n-contact metal layer 42 extends into the first opening 40 to form an n-contact interconnect 44, which may be referred to as an n-contact via.
• the first opening 40 may be defined where portions of the n-contact metal layer 42, the n-contact interconnect 44, the passivation layer 38, and the first reflective layer 24 extend into the active LED structure 12.
• the n- contact metal layer 42 and the n-contact interconnect 44 may be integrally formed to provide an electrical connection to the n-type layer 18 through the first opening 40.
• the n-contact metal layer 42 and the n- contact interconnect 44 may be separately formed and may comprise the same or different materials.
• the n-contact metal layer 42 and the n-contact interconnect 44 comprise a single layer or a plurality of layers that include conductive metals, such as one or more of Al, Ti, and alloys thereof.
• FIG. 2 is a full topside view of the LED chip 10 of FIG. 1 according to principles of the present disclosure. As illustrated, the mesa sidewalls 12’ of the active LED structure 12 are just inset from peripheral edges of the carrier submount 14. Additionally, the mesa sidewalls 12’ follow a shape of the p- contacts 36 at corners of the LED chip 10. While the p-contacts 36 are illustrated in the corners in FIG.
• FIG. 5A is a cross-section of a portion of the LED chip 10 of FIG. 1 illustrating voiding 48 that may occur under the p-contact 36.
• FIG. 5B is a crosssection of a portion of the LED chip 52 of FIG. 5B where the dielectric structure 54 provides an internal topography that reduces voiding 48 in the bond metal layer 22. As illustrated in both FIGS. 5A and 5B, portions of the first reflective layer 24 are removed to allow the barrier layer 34 to electrically connect with the p-contact 36.
• a first width W1 corresponds with a region registered below the p-contact 36 that the bond metal layer 22 should fill. As illustrated, if the first width W1 is too large, such as greater than about 1 1 microns (pm), voiding 48 may occur in the bond metal layer 22.
• the presence of the dielectric structure 54 creates a topography below the p- contact 36 with regions of smaller volumes of space for the bond metal layer 22 to fill during bonding.
• FIG. 6 is a top view of a portion of an LED chip 56 that is similar to the LED chip 52 of FIG. 4. The view provided is from the perspective of a corner of the LED chip 56 at the p-contact 36 in a similar manner to what is illustrated in FIG. 2 for the LED chip 10.
• the dielectric structure 54 forms multiple rows of stripes beneath the p-contact 36 to reduce voiding as described above.
• the spacing or pitch of the stripes may be set as the second width W2 as described above for FIG. 5B.
• FIG. 8 is a top view of a portion of an LED chip 60 that is similar to the LED chip 58 of FIG. 7 where the dielectric structure 54 is arranged with an increased number of stripes below the p-contact 36. In this manner, increased numbers of the stripes may be provided with decreased values for the second width W2 that are less than or equal to 1 1 pm and as low as about 0.5 pm to reduce voiding.
• FIG. 9 is a top view of a portion of an LED chip 62 that is similar to the LED chip 56 of FIG. 6 where the dielectric structure 54 is arranged as an array of islands or dots below the p-contact 36. As illustrated, the array of islands may be provided with a pitch that corresponds with the second width W2 that is less than or equal to 1 1 pm for reduced voiding. By providing the array of islands, the p- contact 36 may be formed with increased surface area for electrical connections with the underlying barrier layer 34 of FIG. 4 while also providing suitable topography for reduced voiding.

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• 2023
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