EP4470030A1 - Procédé de fabrication d'une plaquette de p-sic non déformable - Google Patents

Procédé de fabrication d'une plaquette de p-sic non déformable

Info

Publication number
EP4470030A1
EP4470030A1 EP23706407.6A EP23706407A EP4470030A1 EP 4470030 A1 EP4470030 A1 EP 4470030A1 EP 23706407 A EP23706407 A EP 23706407A EP 4470030 A1 EP4470030 A1 EP 4470030A1
Authority
EP
European Patent Office
Prior art keywords
silicon carbide
polycrystalline silicon
heat treatment
plate
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP23706407.6A
Other languages
German (de)
English (en)
French (fr)
Inventor
Andrea QUINTERO-COLMENARES
Frédéric ALLIBERT
Alexis Drouin
Séverin ROUCHIER
Walter Schwarzenbach
Hugo BIARD
Loïc KABELAAN
Oleg Kononchuk
Sidoine ODOUL
Jérémy ROI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of EP4470030A1 publication Critical patent/EP4470030A1/fr
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • H10P90/123Preparing bulk and homogeneous wafers by grinding or lapping
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B28/00Production of homogeneous polycrystalline material with defined structure
    • C30B28/12Production of homogeneous polycrystalline material with defined structure directly from the gas state
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/36Carbides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02Heat treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2904Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3451Structure
    • H10P14/3452Microstructure
    • H10P14/3458Monocrystalline
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • H10P90/124Preparing bulk and homogeneous wafers by processing the backside of the wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • H10P90/18Preparing bulk and homogeneous wafers by shaping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering

Definitions

  • the field of the invention is that of the manufacture of polycrystalline silicon carbide wafers intended in particular to serve as supports for thin layers of monocrystalline silicon carbide.
  • SiC Silicon carbide
  • Monocrystalline SiC substrates intended for the microelectronics industry nevertheless remain expensive and difficult to supply in large sizes. It is therefore advantageous to use layer transfer solutions to produce composite structures typically comprising a thin monocrystalline SiC layer on a lower cost support substrate.
  • a well-known thin film transfer solution is the Smart CutTM process, based on light ion implantation and direct bonding assembly. Such a process makes it possible, for example, to manufacture a composite structure comprising a thin layer of monocrystalline SiC, taken from a donor substrate of monocrystalline SiC, in direct contact with a support substrate of polycrystalline SiC.
  • the object of the invention is to propose a technique for manufacturing a polycrystalline SiC wafer which makes it possible to limit or even eliminate the risk of deformation of the wafer during subsequent heat treatments.
  • the invention proposes a process for manufacturing a polycrystalline silicon carbide wafer, comprising the following steps:
  • thinning of the polycrystalline silicon carbide plate comprising a correction, by removal of material from the polycrystalline silicon carbide plate, of a deformation generated by the heat treatment.
  • the removal of material is carried out so that the wafer has front and rear faces that are flat and parallel to each other;
  • the thinning step comprises the removal, on at least one of the faces of the plate, of a thickness of material greater than or equal to 50 micrometers;
  • the heat treatment is carried out at a temperature between 1650° C. and 2000° C. for a period of more than 10 minutes;
  • the heat treatment comprises a stage at 1850° C.
  • the heat treatment comprises a stage and regulation of the temperature drop from the stage to a target temperature
  • the formation of the polycrystalline silicon carbide plate by depositing polycrystalline silicon carbide on a growth substrate followed by removal of the growth substrate;
  • the heat treatment is carried out at a temperature higher than a temperature of the deposition of the polycrystalline silicon carbide on the growth substrate.
  • the invention also extends to the manufacture of a composite structure by transferring a thin layer of monocrystalline silicon carbide from a monocrystalline silicon carbide substrate to a polycrystalline silicon carbide wafer manufactured in accordance with the invention.
  • This manufacture may further comprise the formation of electronic components in the thin layer transferred at a temperature lower than the temperature of the heat treatment applied during the manufacture of the wafer.
  • FIG. 1 is a diagram illustrating a polycrystalline silicon carbide plate after a surface smoothing step
  • - Figure 2 is a diagram illustrating the deformation of the polycrystalline silicon carbide plate generated by the heat treatment step
  • FIG. 3 is a diagram illustrating the correction, by shrinkage of material, of the deformation generated by the heat treatment
  • FIG. 4 is a diagram illustrating a polycrystalline silicon carbide wafer obtained by implementing the invention.
  • the invention relates to a method for manufacturing a polycrystalline silicon (p-SiC) wafer from a p-SiC wafer, the wafer having by definition a reduced thickness compared to that of the wafer.
  • p-SiC polycrystalline silicon
  • a deposition of p-SiC on a growth substrate for example a graphite substrate
  • a chemical vapor deposition at a temperature between 1200°C and 1400°C makes it possible to form a plate of p-SiC ( generally designated by the English term slab) relatively thick (for example 2 to 3 mm thick).
  • crystal forms also called polytypes
  • the polytype of the p-SiC plate thus formed is the 3C polytype, but all the polytypes can be envisaged to implement the present invention.
  • the p-SiC wafer is subjected to a process of formation of one or more wafers (process called wafering in English) which includes different stages of cleaning, etching, grinding and polishing and allows to obtaining one or more p-SiC wafers having a desired shape (in particular a bevelled edge) and a desired thickness.
  • wafering in English
  • a sawing can also be carried out during this process in particular when several wafers must be manufactured from the same plate.
  • the removal of the growth substrate, when the latter is made of graphite, is for example carried out by combustion of the graphite.
  • a heating step in the presence of oxygen for example at a combustion temperature greater than or equal to 800°C, is commonly achieved.
  • the combustion temperature is frequently less than or equal to 1000°C.
  • a heat treatment is inserted into this wafering process in order to prepare a wafer which will not be deformed during subsequent heat treatments, for example during the implementation of the Smart CutTM process or during the production of electronic components.
  • the wafering process is also adapted so that the wafer thus prepared is flat and has no curvature or warping.
  • the method according to the invention for manufacturing a p-SiC wafer thus comprises heat treatment of the wafer and thinning of the wafer.
  • the heat treatment step can be preceded by a step of smoothing the plate 1 of p-SiC.
  • This surface smoothing can be achieved by grinding, or by mechanical or mechanical-chemical polishing. It can also make it possible to remove the growth seed from the p-SiC crystal used during the formation of plate 1.
  • the heat treatment step is preceded by a step of cleaning the plate 1 of p-SiC.
  • the heat treatment is carried out at a temperature higher than a temperature of the deposition of the p-SiC on the growth substrate during the formation of the plate. This heat treatment is also carried out at a temperature higher than the highest temperature of the subsequent heat treatment(s), for example higher than the temperature of a subsequent heat treatment for manufacturing electronic components.
  • the heat treatment is preferably carried out at a temperature of between 1650° C. and 2000° C. for a period of more than 10 minutes.
  • This heat treatment can in particular be carried out at a temperature of at least 1700°C, for example at 1850°C, at 1900°C or even at 2000°C.
  • the heat treatment can include temperature rise/fall ramps of between 10° C./minute and 100° C./minute.
  • Heat treatment can be conducted at low pressure (typically less than
  • 100 mbar for example less than 50 mbar, in particular between 10 and 30 mbar), or else at a pressure greater than 100 mbar, or even at atmospheric pressure.
  • the heat treatment is typically carried out under a neutral atmosphere, for example under an argon or nitrogen atmosphere.
  • the heat treatment may include a stage. It can also be carried out with regulation of the temperature drop from the plateau to a target temperature.
  • the heat treatment comprises a stage at 1850° C. This stage can have a duration of 30 minutes.
  • the rise in temperature can take place with a ramp of 10°C/min.
  • the temperature drop can be regulated, for example up to 1000° C. with a ramp of 10° C./min.
  • the temperature drop from the target temperature to the ambient temperature then takes place by following the thermal inertia of the furnace used to carry out this heat treatment.
  • the heat treatment is likely to cause a deformation (curvature, warping) of the plate 1.
  • the thinning of the plate is then adapted to include (if necessary consist of) a correction, by shrinkage material of the polycrystalline silicon carbide plate, the deformation caused by the heat treatment.
  • the shrinkage of material is typically adapted locally so that the plate is not thinned in the same way at all points. This correction of the deformation results in a reduction in the value of curvature (bow) or buckling (warp) observed after the heat treatment.
  • Figure 3 illustrates a possible embodiment of this thinning, here carried out until reaching the parallel dotted lines.
  • Figure 4 illustrates the plate 2 obtained in accordance with the invention from the plate 1 of Figure 1.
  • the removal of material aimed at correcting the deformation generated by the heat treatment is carried out by grinding the p-SiC plate.
  • this removal of material is carried out by electroerosion.
  • the removal of material by spark erosion has the advantage over grinding of being able to be carried out without contact with the plate and without artificially correcting the deformation by elastic bending.
  • removal of material combines spark erosion and grinding. In the latter mode, EDM can achieve coarse thinning while grinding achieves finer thinning.
  • the thinning comprises in succession a very coarse thinning (by electroerosion or grinding) coming for example to remove a thickness of the order of 150 ⁇ m or more, a coarse grinding coming for example to remove a thickness of the order of 20 ⁇ m and fine grinding from, for example, removing a thickness of the order of 3 ⁇ m.
  • the various grindings are distinguished by the size of the grains of the grinding wheel used, these grains being smaller and smaller in the succession of grindings.
  • a polishing step mechanical or mechanical-chemical, is implemented after the last grinding step.
  • the thinning can be carried out both on the front face and on the rear face of the p-SiC plate. And as represented by FIGS. 3 and 4, this thinning is preferably carried out so that the front and rear faces of the wafer obtained at the end of the process are flat and parallel to each other. These front and rear faces of the wafer 2 are not necessarily parallel to the front and rear faces of the initial plate 1.
  • the thinning removes a thickness at least equal to the deformation value after the heat treatment minus 25 ⁇ m.
  • the thickness removed from each of the faces of the wafer during the thinning following the heat treatment is, for example, greater than or equal to 50 ⁇ m, in particular greater than or equal to 100 ⁇ m or even 150 ⁇ m.
  • the thinning is, in particular, such that it results in a self-supporting wafer, that is to say the thickness of which is such that it does not break or deform plastically under the effect of its own weight.
  • a thickness is, for example, greater than or equal to 200 ⁇ m, in particular greater than or equal to 300 ⁇ m.
  • a thickness of between 175 ⁇ m and 200 ⁇ m can be removed from each of the faces of the plate, for a thinning of 350 to 400 ⁇ m in total.
  • a wafer with a thickness of between 325 and 375 ⁇ m can thus be obtained from a plate having undergone a first thinning before the heat treatment bringing it to a thickness of 725 ⁇ m.
  • the thinning of the wafer can be followed by surface finishing steps of the wafer aimed in particular at making it smoother.
  • the invention also extends to a process for the manufacture of a composite structure, comprising the manufacture of a p-SiC wafer as previously explained and the transfer of a thin layer of monocrystalline silicon carbide from a substrate monocrystalline silicon carbide to the polycrystalline silicon carbide wafer.
  • This transfer can take place according to the Smart CutTM technology and thus include an implantation of ionic species in the monocrystalline silicon carbide substrate so as to form therein a weakening plane delimiting the thin layer to be transferred, the bonding of the monocrystalline silicon carbide with the polycrystalline silicon carbide wafer (if necessary via one or more bonding layers) then detachment (caused by heat treatment, mechanical action, or a combination of these means) of the monocrystalline silicon carbide substrate along the plane of embrittlement so as to transfer the thin active layer to the polycrystalline silicon carbide wafer.
  • the process for manufacturing the composite structure may also comprise the formation of electronic components, in particular power or radiofrequency components in the transferred thin layer.
  • the heat treatment does not induce any additional deformation of the plate which would be linked to the stresses exerted by the growth substrate on the plate during the heating of the plate. plate/substrate assembly. This further contributes to improving the flatness and stability of the final wafer.
  • the heat treatment step is common with the step of removal by combustion of the graphite support substrate.
  • this step it is the assembly formed by the plate 1 and the support substrate which is brought to a temperature greater than or equal to 1650° C. as mentioned above, in the presence of oxygen, so as to cause the combustion of the graphite while by heat treating the plate 1.
  • the steps of shrinkage by combustion and of heat treatment are implemented successively, preferably in this order, in the same oven. In this case, the furnace is first heated to 800° C. or more in the presence of oxygen, then heated above 1650° C., for example under a neutral atmosphere after the injected oxygen has been purged from the furnace.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Ceramic Products (AREA)
EP23706407.6A 2022-01-28 2023-01-27 Procédé de fabrication d'une plaquette de p-sic non déformable Pending EP4470030A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2200766A FR3132381B1 (fr) 2022-01-28 2022-01-28 Procédé de fabrication d’une plaquette de p-SiC non déformable
PCT/FR2023/050109 WO2023144493A1 (fr) 2022-01-28 2023-01-27 Procédé de fabrication d'une plaquette de p-sic non déformable

Publications (1)

Publication Number Publication Date
EP4470030A1 true EP4470030A1 (fr) 2024-12-04

Family

ID=80999400

Family Applications (1)

Application Number Title Priority Date Filing Date
EP23706407.6A Pending EP4470030A1 (fr) 2022-01-28 2023-01-27 Procédé de fabrication d'une plaquette de p-sic non déformable

Country Status (8)

Country Link
US (1) US20250125140A1 (https=)
EP (1) EP4470030A1 (https=)
JP (1) JP2025502947A (https=)
KR (1) KR20240141304A (https=)
CN (1) CN118575257A (https=)
FR (1) FR3132381B1 (https=)
TW (1) TW202340554A (https=)
WO (1) WO2023144493A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3160053A1 (fr) 2024-03-05 2025-09-12 Soitec Procede de preparation d’un substrat support en materiau polycristallin et procede de fabrication d’une structure composite incluant ledit substrat support
FR3160052A1 (fr) 2024-03-05 2025-09-12 Soitec Procede de preparation d’un substrat support en materiau polycristallin et procede de fabrication d’une structure composite incluant ledit substrat support
FR3165753A1 (fr) * 2024-08-21 2026-02-27 Soitec Procédé de fabrication d’une structure composite incluant une couche mince monocristalline transférée sur un substrat support

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014213403A (ja) * 2013-04-24 2014-11-17 住友金属鉱山株式会社 基板の反りの低減方法、基板の製造方法、サファイア基板
JP6572694B2 (ja) * 2015-09-11 2019-09-11 信越化学工業株式会社 SiC複合基板の製造方法及び半導体基板の製造方法
JP7255473B2 (ja) * 2019-12-13 2023-04-11 住友金属鉱山株式会社 炭化ケイ素多結晶基板の製造方法

Also Published As

Publication number Publication date
WO2023144493A1 (fr) 2023-08-03
FR3132381A1 (fr) 2023-08-04
KR20240141304A (ko) 2024-09-26
FR3132381B1 (fr) 2025-10-17
TW202340554A (zh) 2023-10-16
US20250125140A1 (en) 2025-04-17
JP2025502947A (ja) 2025-01-30
CN118575257A (zh) 2024-08-30

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