EP4460949A1 - Steuerungsanordnung für ein fahrzeug-bordnetz - Google Patents
Steuerungsanordnung für ein fahrzeug-bordnetzInfo
- Publication number
- EP4460949A1 EP4460949A1 EP22835427.0A EP22835427A EP4460949A1 EP 4460949 A1 EP4460949 A1 EP 4460949A1 EP 22835427 A EP22835427 A EP 22835427A EP 4460949 A1 EP4460949 A1 EP 4460949A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- input
- output
- memory
- peripheral
- actuator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40013—Details regarding a bus controller
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Definitions
- the present invention relates to a control arrangement for a vehicle electrical system and a method for controlling sensors and actuators in a vehicle electrical system.
- the invention relates to remote GPIO (“General Purpose Input Output”) modules for new vehicle electrical system architectures with virtualized control.
- the networking complexity is taking on such proportions that new vehicle electrical system architectures have to be introduced.
- the zonal vehicle electrical system 100 is under discussion here.
- the basic idea here is that functions should be integrated zonally, resulting in a reduction in complexity.
- the only problem is that the vast majority of functions in the vehicle are not of a zonal nature. Examples of this are the car access system, airbag and the functions of autonomous driving, which are each centrally networked with central control units for this function.
- a zonal control unit it is not possible for a zonal control unit to record a sensor signal at the front left, communicate this via a bus system to a zonal control unit at the rear and initiate an actuator signal there, at least for (real-time) controls with low latency requirements.
- the inventive solution is based on the idea of creating a new control arrangement for a vehicle electrical system.
- the GPIO is offloaded to remote GPIO modules that act as peripheral input-output entities, which are connected to a central computing platform via a peripheral component interconnect bus.
- the remote GPIOs can be distributed over the entire vehicle.
- Virtual control units can thus be distributed over the entire vehicle. Due to the latency in the nanosecond range of the peripheral component interface bus, sensors that are arranged, for example, at the front left (via remote GPIO at the front left) with actuators that are arranged at the rear (via remote GPIO at the back) in one function interact as if they were processed via a central domain controller (with many long line connections).
- p-processors do not have GPIO in the form of configurable input or output pins (Binary, ADC, PWM, TX, RX, UART, SPI).
- This can be an SOC (System on Chip) multi-processor platform, which has hitherto typically been used for ADAS (Advanced Driver Assistance Systems) applications.
- ADAS Advanced Driver Assistance Systems
- Two different operating systems can run on the multi-processor platform via a hypervisor.
- an RTOS Real Time Operating System
- the peripheral component interconnect bus data packets are mapped to the general purpose I/O pins of the remote GPIO module.
- the GPIO ASIC sets the outputs and reads in the inputs.
- the I/O information is reproduced in a memory table of the GPIO-ASIC (peripheral I/O state table or peripheral I/O state table).
- This memory table is cyclically updated by the central computing platform via direct memory access mechanisms or memory mapped I/O via the bus.
- the ASIC of the GPIO module allows no software to be implemented on the input-output entity.
- the SW including driver is implemented on the SOC processor of the central computing platform.
- the new control arrangement includes a central computing platform and multiple decentralized input-output entities corresponding to the remote GPIO modules.
- the remote GPIO according to the invention can replace previous (intelligent) power distributors and combine them with the I/O circuitry from control devices.
- the classic power distributors can thus be omitted.
- a control arrangement for a vehicle electrical system comprising a central computing platform and a plurality of decentralized input-output entities which communicate with the central computing platform via a serial communication bus are connected, each input-output entity comprising: a plurality of configurable input-output pins associated with at least one sensor and/or at least one actuator; an input-output interface; and a configuration memory for storing a configuration and physical states of the plurality of configurable input-output pins, wherein the input-output interface is configured, a sensor entry in the peripheral I/O memory based on a physical state of one of the at least one sensor associated input to generate output pins, wherein the input-output interface is also designed to control a physical state of an input-output pin assigned to the at least one actuator in accordance with an actuator entry for the at least one actuator (102) in the peripheral I/O memory ,
- the central computing platform being designed to read out the sensor entry in the peripheral I/
- Such a control arrangement offers the technical advantage that the central computing platform and the individual decentralized input/output entities or remote I/O modules can be attached flexibly at different points in the vehicle and reduce or even completely eliminate meshing in the vehicle electrical system can.
- the vehicle electrical system can thus be constructed with less or no meshing at all, which enables automated wiring harness production.
- the input-output entities can simultaneously act as power distributors and greatly simplify the complexity of the vehicle electrical system.
- a very low latency time i.e. in the nanosecond range, can be guaranteed in the communication between the various on-board network components, so that the on-board network is suitable for real-time control requirements such as those made in autonomous driving and other applications.
- the decentralized input-output entities can function as virtual control units distributed throughout the vehicle.
- the central computing platform has a DMA (“Direct Memory Access”) interface for direct memory access to the respective input/output entity.
- DMA Direct Memory Access
- the first I/O access concept is Port Mapped I/O.
- Drivers or other SW on the central computing platform can read or write the I/O contents of the peripheral I/O state tables via access commands. There is therefore direct access to the memory of the input/output entities by the SW of the central computing platform.
- the second I/O access concept is Memory Mapped I/O.
- I/O In the memory of the central computing platform there is an area for I/O and its control (central I/O State Table). Drivers or other SW on the computing platform can read or write the I/O content via simple memory access.
- the central I/O state table is a mirror of the peripheral state tables of the distributed I/O entities with GPIO functionality. The comparison of the central state table with the peripheral state tables takes place cyclically (in the nanosecond range).
- the central computing platform can access the states of the I/O state tables of the decentralized input/output entities directly, so that a virtual control concept can be implemented.
- the central computing platform has a central I/O memory that is designed to store sensor entries and actuator entries in the peripheral I/O state table of the plurality of decentralized input/output entities ; wherein the central computing platform is designed to align the central I/O state table with the peripheral I/O state tables of the plurality of decentralized input/output entities via a serial point-to-point interface and direct memory access mechanisms.
- peripheral I/O state table of the decentralized input/output entities can be mirrored in the central I/O memory, so that the same data in the decentralized input/output entities and of the central computing platform.
- the serial point-to-point communication is established via a peripheral component interconnect bus.
- This peripheral component interconnect bus can be PCI Express or, for example, a modified USB bus or another suitable bus.
- this Peripheral Component Interconnect Bus is not a bus for the addressed, high-level exchange of message packets between CPUs, but rather a serial interface for the point-to-point connection between a central Computing unit and peripheral GPIO devices to establish direct memory access.
- PCI Express Peripheral Component Interconnect Express
- PCIe PCI Express
- the plurality of decentralized input/output entities are connected to the central control device via an unshielded twisted pair cable or via two shielded twisted pair cables.
- the twisted-pair cables can be used to easily and flexibly connect the decentralized input-output entities, which can be located anywhere in the vehicle, to the central control unit.
- the input-output interface is designed to cyclically transfer memory states of the actuator entries present in the peripheral I/O state tables to the physical states of the input-output pins corresponding to the actuator entries.
- the plurality of configurable input-output pins are binary inputs/outputs, ADC (“Analog-Digital Converter”) inputs, DAC (“Digital-Analog Converter”) outputs, SPI (“ Serial Peripheral Interface”) inputs/outputs and/or RX/TX (“receive/transmit”) inputs/outputs configurable.
- the configuration of each individual pin is defined by an entry in the peripheral configuration memory of the decentralized input/output entity.
- the input-output interface is designed to convert the sensor data recorded by the input-output pin assigned to the at least one sensor into a digital value and to store the digital value as a sensor entry in the peripheral I/O memory .
- the analog values recorded by the sensors can be applied directly to the input/output pins and the conversion into digital values takes place via A/D converters, which are located in the decentralized input -Output entity, specifically the input-output interface.
- the sensors can thus have a simple design and do not need to include an A/D converter that converts the sensor signals into digital sensor data.
- the decentralized input-output entities or GPIO modules can contain an ASIC, which contains the peripheral I/O state table, the configuration memory and the GPIO for conversion into physical signals as well as the serial interface and can be located close to the sensor or even integrated into the sensor, so that the structure of the vehicle electrical system is greatly simplified.
- Input/output circuit parts such as smartfets, half-bridges, high-side drivers, CAN transceivers, Lin transceivers and sensors can be connected to the GPIO of the Asics.
- the wiring of the decentralized input-output entity is similar to that of classic body controllers, but without a processor and its own software.
- the computing power for (a large number of) peripheral I/O entities is held on the central computing platform.
- the input-output interface is designed to provide a dedicated pin as a binary output pin according to the entry in the configuration memory.
- the state present in the peripheral I/O memory (1 on/ 0 off) is converted into a physical state (3.2V on, 0V off) in the GPIO of the Asic.
- a smart-fet component is switched through as part of the wiring of the input/output entity, and the actuator is thus activated.
- the decentralized input/output entities can be located near the actuator or the GPIO ASIC can even be integrated into the actuator, so that the structure of the vehicle electrical system is greatly simplified.
- the configuration memory or the peripheral I/O memory also includes a memory area in which predetermined actuator entries for controlling a safe state of the at least one actuator are stored.
- the input-output interface is designed to provide a physical state of the input assigned to the at least one actuator based on the specified actuator entries in the configuration memory or peripheral I/O memory when the connection to the central computing platform is broken -Configure output pins that transfers the at least one actuator to a safe state.
- the actuators can be switched to a safe state.
- safety requirements for functional safety FlISI
- the control arrangement can thus meet the safety requirements that are placed on the vehicle electrical system architecture, for example, in autonomous driving applications.
- the input-output interface is designed to connect at least one of the input-output pins assigned to the at least one actuator and/or at least one of the input-output pins assigned to the at least one sensor to a battery terminal in order to connect the at least one Actuator and / or to supply at least one sensor with energy.
- the decentralized input-output entities are simultaneously set up to supply the actuators and sensors in the vehicle with electricity, so that the current distributors or intelligent current distributors previously provided in the vehicle can be omitted. This reduces the complexity of the vehicle electrical system and costs can be saved.
- the central computing platform is designed to transmit the actuator entry for a given actuator multiple times to the corresponding input/output entity and to store it in multiple memory locations of the configuration memory of the corresponding input/output entity; and the input-output interface is designed to configure the input-output pin associated with the specified actuator based on a majority decision on the actuator entries stored in the multiple memory locations.
- the signal transmission is designed in such a way that errors in the data transmission can be corrected. This is particularly suitable for the transmission of highly critical signals that must not occur in normal ferry operations, such as signals to deploy the airbag.
- the input-output interface is designed to control the input-output pin assigned to the specified actuator based on the actuator entry, which is present identically in most of the multiple memory locations.
- a first input-output entity and a sensor associated with the first input-output entity are arranged in a front part of the vehicle; and a second input-output entity and an actuator associated with the second input-output entity are arranged in a rear part of the vehicle.
- the sensors and actuators in the vehicle can be controlled by the input-output entities without the functionality of a dedicated control unit being required at the location of the respective component.
- the central computing platform together with a number of input/output entities, acts like a virtual control unit, which extends over the entire geometry of the vehicle and can provide local input/output interfaces everywhere with minimal cable lengths for connecting sensors/actuators.
- the software-side operation of a large number of functions takes place on the central computing platform.
- the central computing platform is designed to transmit the sensor entry and/or the actuator entry using a communication protocol that has error correction in a second communication layer.
- the object described above is achieved by a method for controlling sensors and actuators in a vehicle electrical system with a control arrangement, wherein the control arrangement comprises a central computing platform and a plurality of decentralized input-output entities that connected to the central computing platform via a serial communication bus, each input-output entity comprising: a plurality of configurable input-output pins associated with at least one sensor and/or at least one actuator; an input-output interface; and a peripheral I/O memory for storing a configuration and physical states of the plurality of configurable input-output pins, the method comprising: creating a sensor entry in the peripheral I/O memory based on a physical state of an input-output pin associated with the at least one sensor; Driving a physical state of an input/output pin assigned to the at least one actuator in accordance with an actuator entry present in the peripheral I/O memory for the at least one actuator (102); the central computing platform reading out the sensor entry of the peripheral I/O memory of the respective input-output
- the input-output entities can simultaneously act as power distributors and greatly simplify the complexity of the vehicle electrical system.
- a very low latency time i.e. in the nanosecond range, can be guaranteed in the communication between the various vehicle electrical system components, so that the vehicle electrical system is suitable for real-time control requirements such as those made in autonomous driving and other applications.
- 1 shows a schematic representation of the structure of a conventional vehicle electrical system 100 with zonal control units 11, 12; 2 shows a schematic representation of a control arrangement 200 according to the invention for a vehicle on-board network according to a first specific embodiment;
- FIG. 3 shows a schematic representation of a control arrangement 300 according to the invention for a vehicle on-board network according to a second specific embodiment
- FIG. 4 shows a schematic representation of a decentralized input/output entity 110 according to the invention of a control arrangement 200, 300 for a vehicle on-board network according to an embodiment
- FIG. 5 shows a schematic representation of a method 500 according to the invention for controlling sensors and actuators in a vehicle electrical system.
- FIG. 1 shows a schematic representation of the structure of a conventional vehicle electrical system 100 with zonal control units 11, 12 or zone integration modules 11, 12.
- the function to be controlled e.g. the central locking
- the connection of the sensors 101 and actuators 102 is to be as short as possible, then, for example, a sensor 101 is connected to the zone control device at the front 11 and an actuator 102 is connected to the zone control device at the rear 12 .
- FIG. 1 shows the path 10a of the signals through the layers of the communication stacks and operating system layers. The multiple pass through these layers comes at the expense of the realizable latency.
- Functions with real-time requirements will therefore continue to be centrally networked, as shown by way of example in signal path 10b.
- Functions such as central locking are therefore still implemented centrally in a control unit (here, for example, the front zone control unit 11) in so-called zonal on-board networks.
- FIG. 2 shows a schematic representation of a control arrangement 200 according to the invention for a vehicle on-board network according to a first specific embodiment.
- FIG. 2 shows the inventive solution, in which the software implementation of the function takes place on a central pP 130, also referred to as central computing platform 130 below.
- pprocessors have no GPIO.
- SOC here is a system-on-chip with multiple p-processors.
- GPIO General Purpose I/O
- the remote I/O modules 110, 120 are connected via a peripheral component interface bus (PCI Express) 150.
- PCI Express peripheral component interface bus
- the software drivers for the I/O hardware drivers are also located on the SOC control unit 130.
- the digital states as the output of the software driver are transferred to the state table output in the memory 121 of the remote I/O module 120 in a write cycle via PCI Express 150 . From there they are transmitted cyclically to the GPIO 122 and converted to physical states (on, off, analog value, Tx, Rx).
- sensor data is subjected to e.g. an ADC conversion via the GPIO 112 of the remote I/O module 110 and the result is stored in the StateTable Input 111 and read from there cyclically via PCIe 150 by the SOC 130.
- PCIe generation 3 with a data rate of up to 8Gbit/s, latency times in the nanosecond range can be implemented. These latency times are absolutely sufficient for functions with real-time requirements.
- the remote I/O module 110 is connected to a sensor 101 at the front and the remote I/O module 120 is connected to an actuator 120 at the rear.
- the remote I/O module at the front 110 can also be connected to one or more actuators and/or more sensors.
- the rear remote I/O module 120 which can also be connected to one or more sensors and/or more actuators.
- the remote I/O modules 110, 120 can now be optimally located in the vehicle; the controller 200, also referred to below as the control arrangement 200, can thus be viewed as a virtually distributed controller in the vehicle.
- the remote I/O modules 110, 120 can also assume the function of local power distributors, ie they also supply the sensors 101 and actuators 102 with secured terminal voltage. These two factors allow a significant reduction in complexity in the physical on-board network.
- serial PCI-Express connection 150 takes place, for example, via an unshielded twisted-pair cable for PCI-Express on HD-BaseT PHYs or via two shielded twisted-pair cables (one pair each for Rx, Tx) when transmitting the original PCIe via Retimer or Redriver Transceiver.
- Ethernet IP is therefore more suitable for the data backbone connection between computing platforms, while PCIe is suitable for the (real-time) connection of peripherals.
- Ethernet or USB bus systems can be used as an alternative to PCIe.
- PCIe Peripheral Component Interconnect Express
- the control arrangement 200 comprises a central computing platform 130 and a plurality of decentralized input/output entities 110, 120 which are connected to the central computing platform 130 via a serial communication bus 150.
- Each input-output entity 110, 120 includes: a plurality of configurable input-output pins 117, which are assigned to at least one sensor 101 and/or at least one actuator 102; an input-output interface 112; and a peripheral I/O memory 111 for storing a configuration and a physical state of the plurality of configurable input-output pins 117.
- the input/output interface 112 is designed to generate a sensor entry in the peripheral I/O memory 111 based on a physical state of an input/output pin 117a assigned to the at least one sensor 101 .
- the input/output interface 112 is also designed to control a physical state of an input/output pin assigned to the at least one actuator in accordance with an actuator entry present in the peripheral I/O memory for the at least one actuator.
- Rear I/O module 120 connected to an actuator 120.
- the decentralized input/output entity 110 can also be connected to one or more actuators and/or more sensors.
- the decentralized input/output entity 120 which can also be connected to one or more sensors and/or more actuators.
- the central computing platform 130 can read out the sensor entry in the peripheral I/O memory 111 of the respective input/output entity 110, 120 via the serial communication bus 150 and/or the actuator entry in the peripheral I/O memory 111 of the respective input-output entity 110, 120 write.
- the central computing platform 130 can have a DMA interface 133 for direct memory access to the peripheral I/O memory 111 of the respective input/output entity 110, 120, as shown in FIG.
- the serial communication bus 150 may include a PCI Express bus, as described above.
- the serial communication bus 150 can be provided for Ethernet or Ethernet over IP communication, or it can be in the form of a USB bus.
- the majority of the decentralized input/output entities 110, 120 can be connected to the central computing platform 130, for example, via an unshielded twisted pair cable or via two shielded twisted pair cables.
- the input/output interface 112 can be designed to cyclically transfer memory states of the actuator entries present in the peripheral I/O memory 111 to the physical states of the input/output pins 127a corresponding to the actuator entries.
- the majority of the configurable input/output pins 117 can be configured, for example, as binary inputs/outputs, ADC inputs, DAC outputs, SPI inputs/outputs and/or RX/TX inputs/outputs.
- the input/output interface 112 can convert the sensor data recorded by the input/output pin 117a assigned to the at least one sensor 101 into a digital value and store the digital value as a sensor entry in the peripheral I/O memory 111.
- the input-output interface 112 can be configured to configure a dedicated input-output pin 127a as a binary output pin according to the configuration present in the peripheral I/O memory 111 and to set a physical state of the dedicated input-output pin 127a according to the in to drive the actuator entry present in the peripheral I/O memory 111 .
- the peripheral I/O memory 111 can also include a memory area in which predetermined actuator entries for controlling a safe state of the at least one actuator 102 are stored. If the connection to the central computing platform 130 is interrupted, the input/output interface 112 can configure a physical state of the input/output pin 127a assigned to the at least one actuator 102 based on the specified actuator entries in the peripheral I/O memory 111 , which transfers the at least one actuator 102 to a safe state.
- the input/output interface 112 can connect at least one of the input/output pins 127a assigned to the at least one actuator 102 and/or at least one of the input/output pins 117a assigned to the at least one sensor 101 to a battery terminal 140 in order to connect the at least to supply an actuator 102 and/or the at least one sensor 101 with energy.
- the central computing platform 130 can be configured to transmit the actuator entry for a given actuator multiple times to the corresponding input-output entity 110, 120 and to multiple memory locations of the memory for I/O state tables 111 of the corresponding input -Put output entity 110, 120.
- the input/output interface 112 can be designed to control the input/output pin 127a assigned to the specified actuator 102 based on a majority decision on the actuator entries stored in the multiple memory locations.
- the input-output interface 112 can be configured to drive the input-output output 127a associated with the predetermined actuator 102 based on the actuator entry, which is present identically in most of the multiple memory locations.
- a first input/output entity 110 and a sensor 101 connected or associated with the first input/output entity 110 can be arranged, for example, in a front part of the vehicle.
- a second input-output entity 120 and an actuator 102 associated with the second input-output entity 120 may be located in a rear portion of the vehicle, for example.
- the central computing platform 130 can be configured to transmit the sensor entry and/or the actuator entry using a communication protocol that has error correction in a second communication layer.
- FIG. 3 shows a schematic representation of a control arrangement 300 according to the invention for a vehicle on-board network according to a second specific embodiment.
- the control arrangement 300 corresponds to the control arrangement 200 described above for FIG. 2, with the difference that memory for memory mapped I/O is provided in the central computing platform.
- the central computing platform 130 thus has a central memory with an I/O state table 111b, which is designed to store sensor entries and actuator entries in the I/O state tables 111 of the plurality of decentralized input/output entities 110, 120 to store.
- the central computing platform 130 is designed to cyclically adjust the central I/O state table 111b with the peripheral I/O state tables 111 of the plurality of decentralized input/output entities 110, 120 via the DMA interface 133.
- the I/O states of the decentralized input/output entities 110, 120 can thus be mirrored to the central computing platform 130, which has the advantage of additional failsafety.
- FIG. 4 shows a schematic representation of the ASIC of a decentralized input-output entity 110 according to the invention of a control arrangement 200, 300 for a vehicle on-board network according to one specific embodiment.
- FIG. 4 shows a detailed representation of the core component for the remote I/O modules 110, 120 according to FIGS. 2 and 3. It is an ASIC (“Application Specific Integrated Circuit”), which has a PCIe PHY 115 and a memory 111 for state tables (state tables).
- the central control SOC 130 as shown in Figures 2 and 3, is given direct read-write access to this memory 111 via the PCIe 118, which is connected to the PCIe bus 150. Starting from this memory 111, the states are cyclically transmitted to the GPIO 112 by the ASIC.
- the GPIO 112 is a GPIO known from classic automotive controllers.
- These include binary inputs/outputs, ADC inputs, DAC outputs, SPI, RX/TX, eg for local buses such as CAN or LIN or Ethernet 10BaseT.
- the configuration of the individual pins 117 is stored in a configuration table.
- Additional statuses can be stored in tables, such as safe statuses in the event of a communication abort.
- error correction takes place on data link 114 and PCI TLP level 113 (e.g. "Cyclic Redundancy Check” - CRC for short).
- Highly critical signals can also be received three times and stored in three tables for comparison.
- the GPIO 112 then implements the states that have been stored identically at least twice. Furthermore, functions for security can be implemented in this ASIC.
- the input/output entity 110, 120 comprises a plurality of configurable input/output connections 119, an input/output circuit 116 with hardware drivers or sensor interfaces which can be connected to at least one sensor 101 and/or at least one actuator 102, a configurable input-output GPIO 112; and a peripheral I/O memory 111 for storing a configuration and physical states of the plurality of configurable input-output pins 117.
- the input/output GPIO 112 is designed to configure an input/output pin 119 that can be connected to the input/output circuit 116, to acquire sensor data from the at least one sensor 101 and, based on the sensor data, to create a sensor entry in the peripheral I/O memory 111 to create.
- the input/output GPIO is also designed to configure the GPIO pin 119 based on an entry present in the peripheral I/O memory 111 (e.g. as a binary output) and for the at least one actuator 102 to set a physical state corresponding to the peripheral I/O state table 111.
- the central computing platform 130 is designed to read out the sensor entry in the peripheral I/O memory 111 of the respective input/output entity 110, 120 via the serial communication bus 150 and/or the actuator entry in the I/O state -Table 111 of the respective input-output entity 110, 120 to write.
- the central computing platform 130 can send the sensor entry in the peripheral I/O memory 111 of the respective Read input-output entity 110, 120 and/or write the actuator entry into the peripheral I/O memory 111 of the respective input-output entity 110, 120.
- FIG. 5 shows a schematic representation of a method 500 according to the invention for controlling sensors and actuators in a vehicle electrical system.
- Such a vehicle electrical system includes a control arrangement 200, 300, as described above for FIGS. That is, the control arrangement 200, 300 comprises a central computing platform 130 and a plurality of decentralized input/output entities 110, 120 which are connected to the central computing platform 130 via a serial communication bus 150.
- Each input-output entity 110, 120 comprises: a plurality of configurable input-output pins 119, which are assigned to at least one sensor 101 and/or at least one actuator 102 via an input-output circuit 116; a configurable GPIO input-output interface 112; and a peripheral I/O memory 111 for storing a configuration and physical states of the plurality of configurable input-output pins 119.
- the method 500 includes the following steps: Generating 501 a sensor entry in the peripheral I/O memory 111 based on a physical state of an input/output pin 117a assigned to the at least one sensor 101;
- Controlling 502 a physical state of an input/output pin 127a assigned to the at least one actuator 102 according to an actuator entry present in the peripheral I/O memory 111 for the at least one actuator 102;
- the configurable input-output interface 112 or GPIO 112 described above includes the following functionality:
- Pins of the GPIO can be configured (typically once during initialization). In the configuration it is selected whether the pin is a binary input (voltage there or not there), a binary output, an analog input (measure signal 0 to 3.2V e.g.) also ADC or an analog output DAC. Furthermore, the can also be configured as RX (receive) or Tx (send) of a serial bus such as CAN.
- the pin configured as an output will take on the physical states according to the I/O State Table.
- a pin configured as an input will convert the physical states that are present into digital information and write them to the I/O State Table.
- the GPIO does not directly control the sensors/actuators. In between there is a circuit with HW drivers or smart fets, sensor amplifiers, etc. Furthermore, a computer program with a program code for executing the method 500 on a control, for example the control arrangement described above, can be provided.
- 128 pins of the physical layer of the communication protocol e.g. PCI Express
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Abstract
Description
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102022100107.5A DE102022100107A1 (de) | 2022-01-04 | 2022-01-04 | Steuerungsanordnung für ein fahrzeug-bordnetz |
| PCT/EP2022/085884 WO2023131488A1 (de) | 2022-01-04 | 2022-12-14 | Steuerungsanordnung für ein fahrzeug-bordnetz |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP4460949A1 true EP4460949A1 (de) | 2024-11-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP22835427.0A Withdrawn EP4460949A1 (de) | 2022-01-04 | 2022-12-14 | Steuerungsanordnung für ein fahrzeug-bordnetz |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20240414023A1 (de) |
| EP (1) | EP4460949A1 (de) |
| CN (1) | CN118511485A (de) |
| DE (1) | DE102022100107A1 (de) |
| WO (1) | WO2023131488A1 (de) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4392671C2 (de) | 1992-06-10 | 2000-06-21 | Ford Werke Ag | Kommunikationssystem für Kraftfahrzeuge |
| US20030005154A1 (en) * | 2001-06-29 | 2003-01-02 | Thurman Robert W. | Shared routing in a measurement system |
| WO2013053978A1 (en) * | 2011-10-11 | 2013-04-18 | Sandvik Mining And Construction Oy | A method, system and a device for controlling a work machine |
| US20150347345A1 (en) * | 2014-04-30 | 2015-12-03 | Cirrascale Corporation | Gen3 pci-express riser |
| US10467154B2 (en) * | 2017-02-10 | 2019-11-05 | Qualcomm Incorporated | Multi-port multi-sideband-GPIO consolidation technique over a multi-drop serial bus |
| US10515044B2 (en) * | 2017-11-01 | 2019-12-24 | Qualcomm Incorporated | Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus |
| US11880314B1 (en) * | 2018-07-27 | 2024-01-23 | Dialog Semiconductor B.V. | Microcontroller for driving an external device |
| US11656081B2 (en) * | 2019-10-18 | 2023-05-23 | Anello Photonics, Inc. | Integrated photonics optical gyroscopes optimized for autonomous terrestrial and aerial vehicles |
| US11743155B2 (en) * | 2019-11-14 | 2023-08-29 | Trideum Corporation | Systems and methods of monitoring and controlling remote assets |
| US11513991B2 (en) * | 2020-10-01 | 2022-11-29 | Qualcomm Incorporated | Batch operation across an interface |
| US11794540B2 (en) * | 2020-10-27 | 2023-10-24 | Clarion Corporation of America | Technologies for a harness connector with integrated wireless transceiver |
-
2022
- 2022-01-04 DE DE102022100107.5A patent/DE102022100107A1/de active Pending
- 2022-12-14 WO PCT/EP2022/085884 patent/WO2023131488A1/de not_active Ceased
- 2022-12-14 CN CN202280087787.2A patent/CN118511485A/zh active Pending
- 2022-12-14 EP EP22835427.0A patent/EP4460949A1/de not_active Withdrawn
-
2024
- 2024-07-03 US US18/763,421 patent/US20240414023A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023131488A1 (de) | 2023-07-13 |
| DE102022100107A1 (de) | 2023-07-06 |
| CN118511485A (zh) | 2024-08-16 |
| US20240414023A1 (en) | 2024-12-12 |
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