EP4062531A1 - Vorrichtung und verfahren zur datenübertragung - Google Patents

Vorrichtung und verfahren zur datenübertragung

Info

Publication number
EP4062531A1
EP4062531A1 EP20803748.1A EP20803748A EP4062531A1 EP 4062531 A1 EP4062531 A1 EP 4062531A1 EP 20803748 A EP20803748 A EP 20803748A EP 4062531 A1 EP4062531 A1 EP 4062531A1
Authority
EP
European Patent Office
Prior art keywords
signal
locked loop
phase
frequency
compensation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20803748.1A
Other languages
German (de)
English (en)
French (fr)
Inventor
Andreas WANJEK
Mauricio Bucerius
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SEW Eurodrive GmbH and Co KG
Original Assignee
SEW Eurodrive GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SEW Eurodrive GmbH and Co KG filed Critical SEW Eurodrive GmbH and Co KG
Publication of EP4062531A1 publication Critical patent/EP4062531A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits
    • H04L27/142Compensating direct current components occurring during the demodulation and which are caused by mistuning
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/003Transmission of data between radar, sonar or lidar systems and remote stations
    • G01S7/006Transmission of data between radar, sonar or lidar systems and remote stations using shared front-end circuitry, e.g. antennas
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/12Modulator circuits; Transmitter circuits
    • H04L27/122Modulator circuits; Transmitter circuits using digital generation of carrier signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits
    • H04L27/144Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/152Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements

Definitions

  • the invention relates to a device for data transmission which comprises a transmitter for generating a frequency-modulated output signal.
  • the invention also relates to a method for data transmission by means of a device according to the invention.
  • Frequency modulation is known from the prior art for transmitting data. This is a modulation method in which a carrier frequency is changed by a signal to be transmitted. Compared to other modulation methods, for example amplitude modulation, frequency modulation enables a higher dynamic range of the information signal. Furthermore, the frequency modulation is less susceptible to interference.
  • a modulator for generating an output signal is known from the document "A 10 Mb / s Hybrid Two-Point Modulator with Front-End Phase Selection and Dual-Path DCO Modulation”.
  • the modulator has a phase-locked loop, which is also referred to as a "phase-locked loop” (PLL), with a voltage-controlled oscillator which is also referred to as a “voltage controlled oscillator” (VCO).
  • PLL phase-locked loop
  • VCO voltage-controlled oscillator
  • a low power transmitter for phase-shift keying modulation schemes discloses a modulation system for generating an output signal.
  • the modulation system also has a phase locked loop with a voltage controlled oscillator.
  • a phase-locked loop with a tracking oscillator is known from the document EP 1 318598 A1.
  • An output signal of the tracking oscillator is compared with a reference signal.
  • a compensation unit supplies a loop filter with a compensation signal, whereby signal shifts can be compensated.
  • a control signal is applied to the input of the voltage-controlled oscillator.
  • the control signal includes a DC component on which an offset is superimposed.
  • the offset depends on the bit pattern of a data stream to be transmitted. If the offset by the bit pattern persists, so that the output signal has a changed, in particular increased, output frequency compared to the carrier frequency, then the phase-locked loop regulates back to the original carrier frequency over time. In this case, correct demodulation of the output signal is not possible for a receiver of the output signal as the counterpart to the communication.
  • the invention is therefore based on the object of developing a device and a method for data transmission by means of frequency modulation.
  • data transmission with a relatively high bandwidth should be made possible, with a required deviation of the output frequency of the output signal from the carrier frequency being retained during the data transmission.
  • the object is achieved by a device for data transmission having the features specified in claim 1.
  • Advantageous refinements and developments are the subject of the subclaims.
  • the object is also achieved by a method for data transmission having the features specified in claim 7.
  • Advantageous refinements and developments are the subject of the subclaims.
  • a generic device for data transmission comprises a transmitter for generating a frequency-modulated output signal.
  • the frequency-modulated output signal has, in particular, a time sequence of signal sections which each have an at least approximately constant signal frequency. At least one signal frequency is different from a carrier frequency.
  • the transmitter has a phase-locked loop for regulating an output frequency of the output signal to a carrier frequency.
  • the transmitter also has a coupling circuit for coupling a data stream into the phase-locked loop. There If the output signal frequency-modulated with the coupled-in data stream has an output frequency that is variable over time.
  • the coupling circuit includes a compensation unit which couples a compensation signal into the phase locked loop. The compensation signal at least approximately compensates for a regulation of the output frequency carried out by the phase-locked loop to the carrier frequency.
  • the output frequency of the output signal generated by the transmitter can be set to a plurality of signal frequencies as a function of the coupled-in data stream, at least one signal frequency being different from the carrier frequency.
  • a modulation method with exactly two signal frequencies is also referred to as “Frequency Shift Keying” (FSK).
  • FSK Frequency Shift Keying
  • MFSK Multi Frequency Shift Keying
  • the coupling in of the compensation signal advantageously prevents the output frequency set to a signal frequency from drifting towards the carrier frequency. The required deviation of the output frequency from the carrier frequency is therefore retained during the data transmission.
  • the coupling circuit of the transmitter has an addition point for adding the data stream to be coupled in and the compensation signal to form a correction signal.
  • the coupling circuit couples the correction signal into the phase locked loop. It is therefore only necessary to couple a signal, namely the correction signal, into the phase-locked loop.
  • Such an addition point is relatively easy to implement in terms of circuitry.
  • the phase-locked loop has a voltage-controlled oscillator for generating the output signal, a controller for generating an actuating signal and a summation point for summing the actuating signal and a correction signal to form a control signal.
  • the control signal is applied to the oscillator.
  • the output frequency of the output signal is at least approximately proportional to a voltage of the control signal.
  • the correction signal is coupled into the phase-locked loop in particular by the coupling circuit.
  • the phase-locked loop of the transmitter is designed, for example, as a radar transmitter for performing a radar measurement.
  • An existing radar transmitter can thus be used for data transmission by means of frequency modulation.
  • An additional separate circuit it is therefore not necessary to generate the frequency-modulated output signal. Relatively quick changes in the output frequency from one signal frequency to another signal frequency are possible.
  • the regulation of the output frequency towards the carrier frequency carried out in the phase-locked loop is relatively slow, in particular if the controller of the phase-locked loop has a PT1 behavior or a PT2 behavior. This relatively slow regulation in the phase locked loop is at least approximately compensated by the compensation signal generated by the compensation unit.
  • the compensation unit has a compensation input to which a control signal is applied.
  • the control signal is generated in particular by the controller of the phase locked loop.
  • the compensation unit also advantageously has a compensation output for generating the compensation signal.
  • the coupling circuit has a switching unit, by means of which the coupling circuit can be switched into a data transmission mode and into a radar mode.
  • the data transmission mode the data stream and the compensation signal are coupled into the phase-locked loop.
  • the radar mode the data stream and the compensation signal are not coupled into the phase-locked loop.
  • the phase-locked loop of the transmitter is a radar transmitter, the transmitter can, for example, be used alternately for data transmission and for performing a radar measurement.
  • the transmitter According to a method according to the invention for data transmission by means of a device according to the invention for data transmission, the transmitter generates a frequency-modulated output signal.
  • a data stream is coupled into the phase-locked loop by the coupling circuit, so that the output signal frequency-modulated with the coupled-in data stream has an output frequency that is variable over time.
  • a compensation signal is coupled into the phase-locked loop by the compensation unit, by means of which a regulation of the output frequency carried out by the phase-locked loop to the carrier frequency is at least approximately compensated.
  • the output frequency of the output signal generated by the transmitter is set to a plurality of signal frequencies as a function of the coupled-in data stream, at least one signal frequency being different from the carrier frequency.
  • the coupling in of the compensation signal advantageously prevents the output frequency set to a signal frequency from drifting towards the carrier frequency. The required deviation of the output frequency from the carrier frequency is therefore retained during the data transmission.
  • the data stream and the compensation signal are added to a correction signal at an addition point of the coupling circuit.
  • the correction signal is coupled into the phase-locked loop by the coupling circuit.
  • only one signal, namely the correction signal is coupled into the phase-locked loop.
  • Such an addition of signals at an addition point is relatively easy to implement in terms of circuitry.
  • the output signal is generated by a voltage-controlled oscillator of the phase-locked loop. Furthermore, a control signal is generated by a controller of the phase-locked loop. At a summation point of the phase locked loop, the control signal and a correction signal are summed to form a control signal. The control signal is applied to the oscillator. The output frequency of the output signal is at least approximately proportional to a voltage of the control signal. The correction signal is coupled into the phase-locked loop in particular by the coupling circuit.
  • the phase-locked loop of the transmitter is designed, for example, as a radar transmitter for performing a radar measurement.
  • An existing radar transmitter is thus used for data transmission by means of frequency modulation.
  • An additional separate circuit for generating the frequency-modulated output signal is therefore not required.
  • Relatively quick changes in the output frequency from one signal frequency to another signal frequency are possible.
  • the regulation of the output frequency towards the carrier frequency carried out in the phase-locked loop is relatively slow, in particular if the controller of the phase-locked loop has a PT1 behavior or a PT2 behavior. This relatively slow regulation in the phase locked loop is at least approximately compensated by the compensation signal generated by the compensation unit.
  • a control signal is applied to a compensation input of the compensation unit.
  • the control signal is in particular from generated by the controller of the phase locked loop.
  • the compensation signal is generated by a compensation output of the compensation unit.
  • the coupling circuit is switched in a time sequence in a data transmission mode and in a radar mode by means of a switching unit.
  • the data transmission mode the data stream and the compensation signal are coupled into the phase-locked loop.
  • the radar mode the data stream and the compensation signal are not coupled into the phase-locked loop. If the phase-locked loop of the transmitter is a radar transmitter, the transmitter is used alternately for data transmission and for performing a radar measurement, for example.
  • Figure 1 a schematic representation of a transmitter
  • Figure 2 a time course of a data stream
  • Figure 3 a time course of a compensation signal
  • Figure 4 a time course of a correction signal
  • FIG. 5 a time profile of an actuating signal
  • Figure 6 a time profile of a control signal
  • FIG. 7 a time profile of a control signal without compensation
  • FIG. 8 a time profile of an output frequency of an output signal
  • FIG. 9 a time profile of an output frequency of an output signal without compensation.
  • FIG. 1 shows a schematic representation of a transmitter 10 of a device for data transmission.
  • the transmitter 10 is used to generate a frequency-modulated output signal S5.
  • the transmitter 10 comprises a phase-locked loop 30 and a coupling circuit 20.
  • the phase-locked loop 30 is in the present case a radar transmitter and is used to carry out a radar measurement.
  • the phase-locked loop 30 comprises a voltage-controlled oscillator 32, from which the output signal S5 is generated with a variable output frequency.
  • the phase-locked loop 30 further comprises an amplifier 38, by which said output signal S5 is amplified to form an amplified output signal S7 with the same variable output frequency.
  • the phase-locked loop 30 comprises a frequency divider 40, to which the output signal S5 generated by the voltage-controlled oscillator 32 is fed.
  • the frequency divider 40 has an integer division ratio in the present case.
  • the frequency divider 40 generates an input signal S8, the input frequency of which corresponds to the output frequency of the output signal S5 divided by the division ratio.
  • the phase locked loop 30 comprises a detector 42, to which a reference signal S10 with a reference frequency is fed.
  • the input signal S8 generated by the frequency divider 40 with the input frequency is also fed to the detector 42.
  • the detector 42 compares the reference frequency of the reference signal S10 with the input frequency of the input signal S8.
  • the detector 42 outputs an error signal S9.
  • the detector 42 includes, among other things, a charge pump for outputting the error signal S9.
  • the error signal S9 is dependent on the reference frequency of the reference signal S10 and on a difference between the reference signal S10 and the input signal S8.
  • the phase locked loop 30 includes a controller 34 to which the error signal S9 is fed.
  • a control signal S4 is generated by the controller 34.
  • the controller 34 has a PT1 behavior or a PT2 behavior.
  • the control signal S4 is an analog signal, the voltage of which is a measure of the output frequency to be regulated of the output signal S5 generated by the oscillator 32.
  • the phase locked loop 30 comprises a summation point 36. At the summation point 36, the control signal S4 and a correction signal S3 are summed to form a control signal S6.
  • the control signal S6 is applied to the oscillator 32.
  • the output frequency of the output signal S5 generated by the oscillator 32 is proportional to a voltage of the control signal S6.
  • the coupling circuit 20 has a switching unit 28. By means of the switching unit 28, the coupling circuit 20 can be switched into a data transmission mode and into a radar mode.
  • the switching unit 28 generates a binary switching signal S11, for example.
  • the mode in which the coupling circuit 20 is switched is coded in the switching signal S11.
  • the coupling circuit 20 comprises a compensation unit 22 to which the switching signal S11 is fed.
  • the compensation unit 22 has a compensation input 25, which in the present case comprises an analog-to-digital converter.
  • the control signal S4 is fed to the compensation input 25.
  • the compensation unit 22 also has a compensation output 26, which in the present case comprises a digital-to-analog converter.
  • a compensation signal S2 is generated by the compensation output 26.
  • the switching unit 28 is supplied with an input data stream SO.
  • the switching unit 28 When the coupling circuit 20 is switched to the data transmission mode, the switching unit 28 generates a data stream S1 which corresponds to the input data stream SO. If necessary, the switching unit 28 carries out a level adjustment or a modulation of the input data stream SO.
  • the data stream S1 is a binary signal and has either the state “0” or the state “1”.
  • the coupling circuit 20 has an addition point 24. At the addition point 24, the data stream S1 and the compensation signal S2 are added to the correction signal S3.
  • the correction signal S3 is coupled into the phase locked loop 30. In particular, the correction signal S3 is fed to the summation point 36.
  • FIG. 2 shows, by way of example, a time profile of a data stream S1, which in the present case is a binary signal.
  • the time t is plotted on the abscissa
  • the voltage V of the data stream S1 is plotted on the ordinate.
  • the voltage V of the data stream S1 initially has a voltage value which corresponds to the "0" state.
  • the data stream S1 changes its state and its voltage V now jumps to a voltage value which corresponds to the state “1”.
  • the voltage value assigned to the “0” state is presently greater than the voltage value assigned to the “1” state.
  • FIG. 3 shows, by way of example, a time profile of a compensation signal S2.
  • the time t is plotted on the abscissa, and the voltage V of the compensation signal S2 is plotted on the ordinate.
  • the voltage value of the compensation signal S2 is constant. From the point in time t0, the voltage value of the compensation signal S2 rises continuously.
  • FIG. 4 shows, by way of example, a time profile of a correction signal S3.
  • the time t is plotted on the abscissa and the voltage V of the correction signal S3 is plotted on the ordinate.
  • the voltage value of the correction signal S3 is constant.
  • the voltage V of the correction signal S3 jumps to a higher voltage value.
  • the voltage value of the correction signal S3 rises continuously.
  • the voltage value of the correction signal S3 corresponds to the sum of the voltage values of the data stream S1 and the compensation signal S2.
  • FIG. 5 shows an example of a time profile of an actuating signal S4.
  • the time t is plotted on the abscissa, the voltage V of the control signal S4 is plotted on the ordinate.
  • the voltage value of the control signal S4 is constant. From the point in time t0, the voltage value of the control signal S4 drops continuously.
  • the compensation signal S2 is complementary to the control signal S4 in particular from the point in time t0. The decrease in the control signal S4 is thus compensated for by the increase in the compensation signal S2.
  • FIG. 6 shows, by way of example, a time profile of a control signal S6.
  • the time t is plotted on the abscissa, the voltage V of the control signal S6 is plotted on the ordinate.
  • the voltage value of the control signal S6 is constant.
  • the voltage V of the control signal S6 jumps to a higher voltage value.
  • the voltage value of the control signal S6 corresponds to the sum of the voltage values of the correction signal S3 and the control signal S4.
  • FIG. 7 shows a time profile of a control signal S6 without compensation, that is to say without generating the compensation signal S2.
  • the time t is plotted on the abscissa, the voltage V of the control signal S6 is plotted on the ordinate.
  • the voltage value of the control signal S6 is constant.
  • the voltage V of the control signal S6 jumps to a higher voltage value.
  • the voltage value of the control signal S6 drops continuously.
  • the voltage value of the control signal S6 corresponds to the sum of the voltage values of the data stream S1 and the control signal S4.
  • FIG. 8 shows, by way of example, a time profile of an output frequency of an output signal S5.
  • the time t is plotted on the abscissa and the frequency f is plotted on the ordinate.
  • the output frequency of the output signal S5 initially has a first signal frequency.
  • the output frequency of the output signal S5 jumps to a second signal frequency.
  • the second signal frequency is higher than the first signal frequency.
  • the output frequency of the output signal S5 correlates with the voltage value of the data stream S1.
  • the output frequency of the output signal S5 has the first signal frequency when the voltage value of the data stream S1 corresponds to the "0" state.
  • the output frequency of the output signal S5 has the second signal frequency when the voltage value of the data stream S1 corresponds to the state "1".
  • FIG. 9 shows a time profile of an output frequency of an output signal S5 without compensation, that is to say without generating the compensation signal S2.
  • the time t is plotted on the abscissa and the frequency f is plotted on the ordinate.
  • the output frequency of the output signal S5 initially has the first signal frequency.
  • the output frequency of the output signal S5 jumps to the second signal frequency.
  • the output frequency of the output signal S5 drops continuously.
  • the first signal frequency corresponds to a carrier frequency
  • the second signal frequency is different from the carrier frequency.
  • the phase-locked loop 30 regulates the output frequency of the output signal S5 towards the carrier frequency.
  • the course of the output frequency of the output signal S5 from the time t0 is determined in particular by the behavior of the controller 34.
  • the controller 34 has a PT1 behavior or a PT2 behavior.
  • the output frequency of the output signal S5 therefore approaches the carrier frequency asymptotically.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
EP20803748.1A 2019-11-20 2020-11-03 Vorrichtung und verfahren zur datenübertragung Pending EP4062531A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102019008055 2019-11-20
PCT/EP2020/025488 WO2021098981A1 (de) 2019-11-20 2020-11-03 Vorrichtung und verfahren zur datenübertragung

Publications (1)

Publication Number Publication Date
EP4062531A1 true EP4062531A1 (de) 2022-09-28

Family

ID=73198255

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20803748.1A Pending EP4062531A1 (de) 2019-11-20 2020-11-03 Vorrichtung und verfahren zur datenübertragung

Country Status (5)

Country Link
US (1) US20220400039A1 (zh)
EP (1) EP4062531A1 (zh)
CN (1) CN114731137A (zh)
DE (1) DE102020006742A1 (zh)
WO (1) WO2021098981A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102024104867A1 (de) 2023-03-29 2024-10-02 Sew-Eurodrive Gmbh & Co Kg Verfahren zum Betreiben eines Radarsensors und Radarsensor

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5920A (en) 1848-11-14 Uthographer
US556A (en) 1838-01-09 Machine foe
GB2313001B (en) * 1996-05-07 2000-11-01 Nokia Mobile Phones Ltd Frequency modulation using a phase-locked loop
DE69826835T2 (de) 1998-05-29 2006-02-23 Motorola Semiconducteurs S.A. Frequenzsynthetisierer
ES2219490T3 (es) 2001-12-07 2004-12-01 Aastra Technologies Limited Modulador que utiliza un circuito regulador de fases, y procedimiento.
US8441323B2 (en) * 2008-09-16 2013-05-14 Nxp B.V. Signal processing using timing comparison
EP3267578B1 (en) * 2016-07-08 2023-04-19 IMEC vzw Polar transmitter and method for generating a transmit signal using a polar transmitter
KR101809371B1 (ko) * 2016-07-29 2017-12-14 전자부품연구원 고속 첩 신호를 이용한 차량용 RadCom 시스템 및 방법
US10718860B2 (en) * 2018-01-11 2020-07-21 Infineon Technologies Ag System and method to improve range accuracy in FMCW radar using FSK modulated chirps

Also Published As

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US20220400039A1 (en) 2022-12-15
CN114731137A (zh) 2022-07-08
WO2021098981A1 (de) 2021-05-27
DE102020006742A1 (de) 2021-05-20

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