EP4060650A1 - Led-emissionsanzeigevorrichtung - Google Patents

Led-emissionsanzeigevorrichtung Download PDF

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Publication number
EP4060650A1
EP4060650A1 EP22162187.3A EP22162187A EP4060650A1 EP 4060650 A1 EP4060650 A1 EP 4060650A1 EP 22162187 A EP22162187 A EP 22162187A EP 4060650 A1 EP4060650 A1 EP 4060650A1
Authority
EP
European Patent Office
Prior art keywords
leds
module
led
bias
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP22162187.3A
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English (en)
French (fr)
Inventor
Margaux VIGIER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Publication of EP4060650A1 publication Critical patent/EP4060650A1/de
Pending legal-status Critical Current

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
    • G—PHYSICS
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/06—Passive matrix structure, i.e. with direct application of both column and row voltages to the light emitting or modulating elements, other than LCD or OLED
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness

Definitions

  • the present description relates to the production of an emissive image display device using light-emitting diodes (LEDs), for example a television, computer, smartphone, digital tablet, etc. screen. It relates more particularly to the production of an elementary module of such a device.
  • LEDs light-emitting diodes
  • an image display device comprising a plurality of elementary electronic chips, which will be referred to hereinafter as elementary modules, arranged in a matrix on the same transfer substrate.
  • the modules are mounted integral with the transfer substrate and connected to electrical connection elements of the transfer substrate for their control.
  • Each module comprises one or more LEDs and a control circuit for said one or more LEDs and corresponds to a pixel of the device. More particularly, each module comprises a first chip called LED chip integrating said one or more LEDs of the module, and a second chip called control chip comprising the control circuit of said one or more LEDs of the module.
  • the LED chip and the control chip are attached and electrically connected to each other, the assembly forming a so-called monolithic module, in other words a compact assembly, comprising connection terminals intended to be connected to connection terminals corresponding to the transfer substrate.
  • the module forms a compact assembly of one or more electronic chips, the module comprising a connection face comprising connection pads intended to be fixed and electrically connected to corresponding connection pads of a substrate of report.
  • each of the M groups comprises the same number L of LEDs, with L being an integer greater than or equal to 2.
  • the bias circuits are configured so that, in each group, for each LED of the group, an emission period of the LED is concomitant with an emission period of a corresponding LED of each other group .
  • control circuit is configured to, during a period T_TRAME, individually adjust the respective transmission powers of the N LEDs.
  • the period T_TRAME is divided into L successive periods Tj, with integer j ranging from 1 to L, each period Tj comprising an initialization period T_INIT followed by a transmission period T_E, the control circuit being configured to, at each period Tj, during the initialization period T_INIT, successively apply to the M bias circuits a signal for individual adjustment of the desired transmission power of the row j LED of the group of LEDs G(i) corresponding, then, during the transmission period, simultaneously control transmission of the M LEDs of row j according to said individual adjustment signals.
  • the module comprises at least one terminal for connection to an external device, said terminal being intended to receive individual adjustment signals for the transmission powers of the N LEDs of the chip, time multiplexed.
  • each bias circuit comprises a switch connecting said terminal to a light power adjustment node, and a set of switches, respectively connecting the LEDs of the group corresponding to a node for supplying a bias current .
  • each bias circuit comprises an intensity-adjustable bias current source, the emission power of each of the LEDs of the corresponding group being adjusted by varying the current delivered by said current source.
  • each bias circuit comprises a fixed bias voltage source, the emission power of each of the LEDs of the corresponding group being adjusted by modulation of the emission time of the LED, for example according to a modulation at binary coding.
  • each bias circuit comprises an intensity-adjustable bias current source, the emission power of each of the LEDs of the corresponding group being adjusted by varying the current delivered by said current source and by modulation of the LED emission time, for example according to a binary coded modulation.
  • the N LEDs of the first set are of the same first color
  • the module further comprising a second set of N LEDs of the same second color divided into M groups, at least one of the M groups comprising at least two LEDs, and a third set of N LEDs of the same third color divided into M groups, at least one of the M groups comprising at least two LEDs.
  • the first set of LEDs forms an LED chip and the control circuit is a CMOS type integrated circuit forming a control chip attached to one face of the LED chip.
  • the module is configured to display a single pixel of the same spatial coordinate for a set of N images of the same dimensions, the N LEDs of the module corresponding to N sub-pixels of the same pixel, each sub-pixel making it possible to display a pixel of one of the N images corresponding respectively to N viewing angles of a multi-view display device.
  • Another embodiment provides a display device comprising a transfer substrate and a plurality of modules as defined above arranged in a matrix on the transfer substrate, the modules being mounted integral with the transfer substrate and connected to elements electrical connection of the transfer substrate, intended to bring power and control signals from the modules.
  • Each elementary module is intended to be mounted integral with a transfer substrate and connected to electrical connection elements of the transfer substrate for its control.
  • Each elementary module comprises a monolithic chip or an assembly of several electrically connected monolithic chips.
  • an elementary module is a compact assembly of one or more electronic chips advantageously obtained according to methods of manufacturing microelectronic components.
  • a plurality of modules for example identical or similar, can be mounted on the same transfer substrate, each module corresponding for example to a pixel of the display device.
  • the elementary modules of the display devices described each comprise a plurality of LEDs and a control circuit based on transistors, and can be manufactured according to processes identical or similar to those described in the patent application WO2017089676 aforementioned.
  • the figure 1 is an electrical circuit diagram of an example of a pixel 100 of a display device according to one embodiment.
  • the module 100 is a monolithic module constituted by an assembly of a control chip and an LED chip.
  • the LED chip is for example arranged on and in contact with the control chip.
  • the LED chip comprises, on the side of its lower face, electrical connection terminals electrically connected to electrical connection terminals arranged on the side of the upper face of the control chip.
  • the realization of a so-called multi-view display device that is to say in which the image to be displayed is divided into pixels each comprising a plurality of corresponding sub-pixels different views of the scene you want to reproduce.
  • the different sub-pixels of the same pixel correspond respectively to the same pixel of different images of the same scene, taken from different angles of view.
  • a multi-view display device can for example be used in applications in which it is desired to give the user an impression of viewing in three dimensions.
  • the display device is a monochromatic device.
  • Each module 100 comprises a set of N elementary LEDs 101 likewise color, that is to say having the same central emission wavelength, with N integer, preferably greater than or equal to 4, forming the LED chip of the module.
  • the N LEDs 101 are for example identical except for manufacturing dispersions.
  • the N LEDs of the module are individually controllable and correspond respectively to N sub-pixels of a multi-view pixel.
  • Each module further comprises, attached and electrically connected to the LED chip, an integrated circuit for controlling the N LEDs, for example a CMOS (Complementary Metal Oxide Semiconductor) circuit, forming the module control chip.
  • CMOS Complementary Metal Oxide Semiconductor
  • a display device can comprise a plurality of elementary modules 100, which are identical or similar, arranged on the same transfer substrate, for example according to a matrix arrangement.
  • the transfer substrate is for example a passive transfer substrate, comprising electrical connection elements for supplying and controlling the modules.
  • the N LEDs 101 of the module 100 are divided into M groups G(1),..., G(M) of L LEDs each, with M and L being integers greater than or equal to 2.
  • 101(i,j) the LED 101 of rank j of the group G(i), with i integer going from 1 to M and j integer going from 1 to L.
  • the control circuit of the module 100 comprises M bias circuits 103(1),..., 103(M) respectively associated with the M groups of LEDs G(1),..., G(M).
  • the control circuit of the module 100 further comprises a circuit 105 for controlling the M bias circuits 103(i).
  • the M bias circuits 103(1),..., 103(M) are for example identical, except for manufacturing dispersions.
  • Each bias circuit 103(i) comprises L output nodes S(1),..., S(L) connected, preferably connected, respectively to the anodes of the L LEDs 101(i,1),..., 101 (i,L) of the corresponding group G(i).
  • the cathodes of the LEDs are connected, preferably connected, to the same node for applying a fixed reference potential GNDLED of the module, for example ground.
  • the orientations of the LEDs can be reversed.
  • each LED 101(i,j) can have its cathode connected, for example connected, to the corresponding output node S(j) of the bias circuit 103(i), and its anode connected, for example connected, to a terminal for applying a reference potential.
  • the bias circuit 103 can then be a CMOS circuit complementary to that described previously.
  • each bias circuit 103(i) comprises a bias current source 107 common to the L LEDs 101(j) of the corresponding group G(i).
  • the bias current source 107 comprises an input node d_in intended to receive a bias current adjustment setpoint signal delivered by the source 107.
  • the bias source 107 further comprises an output node out intended to supply a bias current ib as a function of the value of the setpoint signal applied to the node d_in.
  • each bias circuit 103(i) further comprises L individually controllable switches k(1),...,k(L), respectively connecting the L output nodes S(1),...,S (L) of circuit 103(i) to the output node out of bias current source 107 of circuit 103(i).
  • Each switch K(j) has a first conduction node connected, for example connected, to node out of bias current source 107 of circuit 103(i), and a second conduction node connected, for example connected, to the output node S(j) of the same rank j of the circuit 103(i).
  • each bias circuit 103(i) further comprises a switch SW.
  • the switch SW connects the control node d_in of the current source 107 to a terminal DATA for applying a control signal of the module 100. More particularly, the switch SW has a first conduction node connected, for example connected to the terminal DATA, and a second conduction node connected, for example connected, to the node d_in.
  • the DATA input terminal is common to all the LEDs of the module 100.
  • the individual brightness adjustment signals of the M*L LEDs 101 are time multiplexed on the DATA terminal.
  • the M switches SW and the M*L switches K(j) of the module make it possible to demultiplex the brightness adjustment signals so as to individually control the M*L LEDs 101.
  • the control circuit 105 makes it possible to control the M switches SW and the M*L switches K(j). More particularly, in this example, the control circuit 105 generates a control signal W_EN on M bits to respectively control the M switches SW. In this example, the signal W_EN is provided on a parallel port of M output nodes of circuit 105, respectively connected to the control nodes of the M switches SW. The control circuit 105 also generates a control signal LED_EN on L bits to respectively control the L switches K(j) of each bias circuit 103(i). In this example, the same control signal LED_EN is applied in parallel to the M bias circuits 103(i).
  • the LED_EN signal is provided on a parallel port of L output nodes of circuit 105, respectively connected to the control nodes of the L switches K(j) of each of the M bias circuits 103(i).
  • each bit LED_EN ⁇ j> of the signal LED_EN is applied simultaneously to the control nodes of the M switches K(j) of the same rank j of the control circuit.
  • the M switches K(j) of the same row j are all controlled simultaneously in the same state.
  • the M LEDs 101(i,j) of the same row j are all simultaneously activated in transmission or are all simultaneously deactivated.
  • the picture 2 is a timing diagram illustrating an example of operation of module 100 of the figure 1 .
  • a period T_TRAME is defined below corresponding to the time available to individually control the M*L LEDs 101 of the module 100 according respectively to M*L specific luminosity levels. At each new period T_TRAME, the brightness levels of the M*L LEDs 101 can be modified.
  • the period T_TRAME is divided into L successive periods T1, T2, ... TL, for example substantially of the same duration, for example substantially equal to T_TRAME/L.
  • the M LEDs 101(1,j),...101(M,j) of the same rank j of the module are controlled simultaneously in transmission.
  • the other LEDs 101 are deactivated.
  • each period Tj is divided into two successive periods T_INIT and T_E.
  • the period T_INIT is an initialization period and the period T_E is a transmission period.
  • the adjustment signals of the M LEDs 101(1,j),..., 101(M,j), received sequentially on the module's DATA input terminal are successively applied to the terminals of input d_in of the respective bias current sources 107 of the M bias circuits 103(i). More particularly, in this example, the period T_INIT is divided into M successive periods t1,..., tM, for example substantially of the same duration, for example substantially equal to T_INIT/M. At each period ti, with i ranging from 1 to M, the switch SW of the bias circuit 103(i) is controlled in the closed (on) state, the other switches SW being kept open (blocked).
  • bias current sources 107 of the M bias circuits 103(i) are successively set to current values corresponding to the desired respective brightness levels of the LEDs 101(1,j), ..., 101(M, j).
  • the switches K(j) of the M bias circuits 103(i) are simultaneously closed, while the other switches K are all kept open.
  • the LEDs 101(1,j), ..., 101(M,j) emit simultaneously at brightness levels set individually during the period T_INIT.
  • the other LEDs 101 remain inactive.
  • the M switches SW can all be controlled simultaneously in the open state.
  • a new period Tj+1 begins, during which the LEDs 101(1,j+1), ..., 101(M,j+1) are set individually then controlled simultaneously in transmission.
  • control circuit 105 can comprise two shift registers, not detailed in the figure, of respectively L bits and M bits, to respectively generate the signals LED_EN and W_EN.
  • connection terminals outside the module 100 is also relatively low due to the time-division multiplexing of the data signals on a single DATA terminal.
  • the module 100 can comprise a VDD terminal for connection to a high supply potential and a GND terminal for connection to a low supply potential.
  • Each bias current source 107 can have a supply node connected, for example connected, to the VDD terminal (connections not detailed on the figure 1 ).
  • the GND terminal can be connected, for example connected, to the GNDLED node (connection not detailed on the figure 1 ).
  • the module 100 may further comprise one or more control signal application terminals.
  • the module 100 can include a port CT_W made up of three terminals (not detailed on the figure 1 ) for applying control signals to the shift register generating the signal W_EN, and a port CT_LED made up of three terminals (not detailed on the figure 1 ) applying shift register control signals generating the LED_EN signal.
  • the port CT_W comprises for example a first terminal for applying a clock signal to the shift register generating the signal W_EN, a second terminal for applying a reset signal to the shift register generating the signal W_EN, and a third terminal for applying an initialization signal of the shift register generating the signal W_EN.
  • the port CT_LED comprises for example a first terminal for applying a clock signal from the shift register generating the signal LED_EN, a second terminal for applying a reset signal from the shift register generating the signal LED_EN, and a third terminal for applying an initialization signal to the shift register generating the signal LED_EN.
  • the module 100 has, in addition to the internal electrical connections between the LED chip and the control chip, 9 electrical connection terminals, intended to be connected respectively to corresponding connection terminals of the transfer substrate.
  • the picture 3 is a simplified schematic representation of another example of a module 300 of a display device according to one embodiment.
  • the 300 module of the picture 3 differs from module 100 of the figure 1 mainly in that, in the module 300, the LED chip comprises LEDs of several colors, that is to say having distinct emission center wavelengths.
  • the LED chip of the module 300 comprises LEDs of three distinct colors, for example first adapted to mainly emit red light, second adapted to mainly emit green light, and third LED adapted to mainly emit red light. blue light.
  • the module 300 comprises, attached and electrically connected to the LED chip, a control adapted to individually control the LEDs of the LED chip.
  • the assembly comprising the M*L elementary LEDs 101, the M bias circuits 103(i) and the data input terminal DATA of the module of the figure 1 is replicated three times (once per color), with three types of elementary LEDs of different colors respectively.
  • the M bias circuits 103(i) may optionally be adapted to supply different average currents depending on whether they are connected to the red, blue or green LEDs, but their structure remains unchanged.
  • the data input terminals corresponding to the three emission colors are designated respectively by the references DATA_R, DATA_G and DATA_B.
  • the reference 301R denotes the set of M*L LEDs 101 red and the corresponding bias circuits 103(i)
  • the reference 301G denotes the set of M*L LEDs 101 green and the bias circuits 103 (i) corresponding
  • the reference 301B all of the M*L blue LEDs 101 and the corresponding bias circuits 103(i).
  • control circuit 105 is shared by the three colors. This circuit and its operation are for example identical or similar to what has been described in relation to the figures 1 and 2 .
  • the M LEDs 101 of the same rank j of the set 301R, the M LEDs 101 of the same rank j of the set 301G and the M LEDs 101 of the same rank j of the set 301B are controlled simultaneously in transmission, the other LEDs 101 being deactivated.
  • the adjustment signals of the M LEDs 101(1,j),..., 101(M,j) of the assembly 301R, received sequentially on the terminal input terminals DATA_R of the module, are successively applied to the input terminals d_in of the respective bias current sources 107 of the M bias circuits 103(i) of the assembly 301R, in an identical or similar manner to what has been described above.
  • the adjustment signals of the M LEDs 101(1,j),..., 101(M,j) of the assembly 301G, received sequentially on the module's DATA_G input terminal are successively applied to the input terminals d_in of the respective bias current sources 107 of the M bias circuits 103(i) of the assembly 301G
  • the adjustment signals of the M LEDs 101(1,j),.. ., 101(M,j) of the assembly 301B, received sequentially on the DATA_B input terminal of the module are successively applied to the d_in input terminals of the respective bias current sources 107 of the M bias circuits 103 (i) set 301B.
  • the switch SW of the bias circuit 103(i) is controlled at l closed state (on), the other switches SW being kept open (blocked).
  • the adjustment signal applied to terminal DATA_R, respectively DATA_G, respectively DATA_B, is thus transmitted to input terminal d_in of bias source 107 of bias circuit 103(i) of assembly 301R, respectively 301G, respectively 301B.
  • the bias current sources 107 of the M bias circuits 103(i) are successively set to values current corresponding to the desired respective brightness levels of the LEDs 101 (1, j), ..., 101 (M, j) of the assembly.
  • the switches K(j) of the M bias circuits 103(i) are simultaneously closed, while the other switches K are all kept open.
  • the LEDs 101(1,j), ..., 101(M,j) of the set emit simultaneously at brightness levels set individually during the period T_INIT.
  • the other LEDs 101 remain inactive.
  • the M switches SW can all be controlled simultaneously in the open state.
  • the module 300 has, in addition to the internal electrical connections between the LED chip and the control chip, 11 electrical connection terminals, intended to be connected respectively to corresponding connection terminals of the transfer substrate.
  • the figure 4 illustrates in more detail an example of a control circuit of a module according to one embodiment.
  • the figure 4 more particularly illustrates an embodiment of a bias circuit 103(i) of the module 100 of the figure 1 .
  • the bias circuit 103(i) comprises two transistors M1 and M2 forming a cascoded current source.
  • transistors M1 and M2 are P-channel MOS transistors.
  • Transistor M1 has its source connected, for example connected, to node VDD and its drain connected, for example connected, to an intermediate node n1.
  • Transistor M2 has its source connected, for example connected, to node n1 and its drain connected, for example connected, to node out.
  • the gate of transistor M1 is connected, for example connected, to node d_in.
  • the gate of transistor M2 is connected, for example connected, to an application node of a fixed voltage Vcasc.
  • each bias circuit 103(i) further comprises a switch SW' connecting the output node out of the current source 107 to the terminal DATA.
  • the switch SW' has a first conduction node connected, for example connected, to the terminal DATA, and a second conduction node connected, for example connected, to the node out.
  • the switch SW' has a control node connected, for example connected, to the node W_EN ⁇ i>.
  • the switches SW and SW' of the bias circuit are for example controlled simultaneously in the same state. When switches SW and SW' are in the closed state, the drain of transistor M2 is connected, for example connected, to the gate of transistor M1.
  • the potential difference applied between the nodes d_in and VDD defines the intensity of the bias current ib delivered by the current source 107 on its output node out, and therefore the luminous intensity of emission of the LED 101(i, j) to which current ib is applied.
  • the gate-source capacitance of transistor M1 (not detailed in the figure) makes it possible to maintain the voltage between the nodes d_in and VDD substantially constant throughout the duration of emission of the LED.
  • the cascode assembly can be replaced by a simple transistor.
  • transistor M2 is omitted, the drain of transistor M1 then being directly connected, for example connected, to node out. More generally, the person skilled in the art will know how to provide other implementations of the current source 107.
  • a voltage control can be provided. In this case, transistor M2 can be omitted and transistor M1 can be replaced by an N-channel MOS transistor acting as a voltage follower.
  • the control signal W_EN ⁇ i> directly controls the switch SW connecting the input node d_in of current source 107 to terminal DATA and switch SW' connecting output node out of current source 107 to terminal DATA.
  • the switches K(1), ..., K(L) are controlled not directly by the signal LED_EN ⁇ 1:L> but by a combination of the signal LED_EN ⁇ 1:L> and the signal W_EN(i) complemented.
  • each switch K(j) is controlled in the closed (on) state only when the signal LED_EN ⁇ j> is in the high state and the signal W_EN ⁇ i> is in the low state (switch SW circuit 103(i) open).
  • the emission time T_E of each LED is substantially equal to T_TRAME/L.
  • the intensity of the bias current ib must be multiplied by L to obtain a level of equivalent brightness.
  • EQE external quantum efficiency
  • the number M of bias circuits 103(i) and consequently the number L of elementary LEDs addressed by each bias circuit 103(i) can be chosen so as to maximize the external quantum efficiency.
  • the figure 5 is a diagram representing schematically the evolution of the external quantum efficiency EQE (on the ordinate) of an LED as a function of the density I (on the abscissa) of bias current applied to the LED.
  • the external quantum efficiency presents a bell shape with a maximum for a current value IMAX.
  • I0 the average intensity of the range P1 in which we would like to polarize the LEDs in the case of continuous transmission throughout the duration T_TRAME (ie in a non-multiplexed device).
  • the I0 value is less than the IMAX value.
  • the IMAX/I0 ratio is less than N-1, N being the number of sub-pixels, corresponding to the number of different views, of the multi-view pixel, we will preferably choose L equal to E[IMAX/I0]+ 1, where E[IMAX/I0] denotes the integer part of IMAX/I0, and M equal to E[(N-1)/L]+1.
  • E[IMAX/I0] denotes the integer part of IMAX/I0
  • M equal to E[(N-1)/L]+1.
  • T_TRAME/L an emission time per LED substantially equal to T_TRAME/L and consequently an average bias current ILED of each LED substantially equal to I0*L, that is to say substantially equal to I0*(E[IMAX/ I0]+1).
  • the current ILED approaches the current IMAX by higher value. This maximizes the external quantum efficiency of LEDs.
  • each LED is preferable for the emission time of each LED to be less than T_TRAME/L in order to have an average bias current I0 approaching the current IMAX.
  • Each period Tj of the period T_TRAME can then include a period of extinction of the LED. In other words, each LED emits for only part of the period T_E allocated for the emission.
  • the figure 8 illustrates in more detail another example of a control circuit of a module according to one embodiment.
  • the figure 8 more particularly illustrates a variant embodiment of a bias circuit 103(i) of the module 100 of the figure 1 . In the rest of the description, only the differences with respect to the bias circuit 103(i) of the figure 1 will be highlighted.
  • circuit 103(i) is a time bias circuit.
  • the bias voltage applied to the LEDs has a fixed value.
  • the individual LED brightness levels are controlled by modulating the emission time of each LED.
  • the retinal persistence makes it possible to average the perceived luminance originating from each LED during each period T_TRAME.
  • the modulation of the emission times of each LED is a binary coded modulation, for example a BCM (Binary Code Modulation) type modulation.
  • L_PERCUE the perceived luminance
  • L0 the fixed luminance defined by the fixed bias voltage VREF applied to the LEDs
  • n the number of bits on which the luminosity information is coded
  • bk the bit of weight k of the coding, with k integer ranging from 1 to n
  • the current source 107 is omitted, and the switches K(1), ... K(L) connect the respective anodes of the LEDs 101(i,1),...101(i,L) directly to the same node for applying a fixed bias potential VREF.
  • the luminosity information is stored in binary form in a memory circuit or a register 801 (MEM) of the circuit 103(i), during the period ti of the phase T_INIT of each period Tj of the period T_TRAME.
  • MEM memory circuit or a register 801
  • Switch SW connects terminal DATA to an input node d_in of memory circuit 801.
  • switch K(j) corresponding that is to say of the same rank j
  • switch K(j) is controlled alternately in the closed state and in the open state according to a modulation pattern fixed by the n-bit digital code stored in the memory circuit 801.
  • the other switches K(j) are kept open.
  • the bias circuit 103(i) comprises L switches K′ ⁇ 1>, ... K′ ⁇ L>.
  • Each switch K′ ⁇ j> has a first conduction node connected, for example connected, to an output node out of the memory circuit 801, and a second conduction node connected, for example connected, to a control node of the switch K(j) of the same rank j.
  • the corresponding switch K'(j) is kept closed, the other switches K' of the circuit 103(i) being kept open.
  • the n bits of the luminosity code are successively applied to the control node of the switch K(j), which makes it possible to control the average luminous power emitted by the LED 101(i,j).
  • the control signal W_EN ⁇ i> directly controls the switch SW connecting the terminal DATA to the input node d_in of the memory circuit 801. Furthermore, in this example, the switches K'(1), ..., K '(L) are controlled not directly by the signal LED_EN ⁇ 1:L> but by a combination of the LED_EN ⁇ 1:L> signal and the complemented W_EN(i) signal. In other words, each switch K' (j) is controlled in the closed (on) state only when the signal LED_EN ⁇ j> is in the high state and the signal W_EN ⁇ i> is in the low state (switch SW of circuit 103(i) open).
  • the figure 9 illustrates in more detail another example of a control circuit of a module according to one embodiment.
  • the figure 9 more particularly illustrates a variant embodiment of a bias circuit 103(i) of the module 100 of the figure 1 . In the rest of the description, only the differences with respect to the bias circuit 103(i) of the figure 1 will be highlighted.
  • circuit 103(i) combines brightness control by adjusting the intensity of the LED bias current, as described in connection with figure 1 and 4 , and by temporal modulation, as described in connection with the figure 8 .
  • the circuit 103(i) comprises the same elements as in the example of the figure 8 , arranged substantially in the same way, and further comprises an adjustable current source 107 identical or similar to what has been described in relation to the figure 1 and 4 .
  • the output node out of the current source is connected, for example connected, to the ends of the switches K(1),...K(L) opposite the LEDs 101.
  • the circuit 103(i) further comprises a switch SW ' connecting the input node d_in of the current source 107 to a terminal additional data input BIAS_DATA of the module, and a switch SW" connecting the output node out of the current source 107 to the BIAS_DATA terminal.
  • the switches SW' and SW" of the M circuits 103(i) are controlled by a signal WBIAS_EN on M bits, for example identical to the signal W_EN.
  • the switches SW' and SW" are for example controlled simultaneously in the same state by the WBIAS_EN ⁇ i> signal.
  • a logic circuit 901 has also been shown, integrating in particular the switches K′ ⁇ j> of the figure 8 .
  • the logic circuit 901 receives the control signal LED_EN (on L bits) and the binary modulation codes provided on the output node out of the memory circuit 801, and generates the control signals for the switches K(j).
  • the logic circuit 901 makes it possible in particular to select the emitting LED, in a manner similar to what has been described in relation to the figure 8 .
  • the current bias makes it possible to adjust individually, for each LED, an average luminance point L0, for example identical for all the LEDs. This makes it possible, for example, to compensate for any manufacturing dispersions between the LEDs.
  • the adjustment value applied to the BIAS_DATA terminal is coded on 5 bits, which gives 32 possible values of intensity of the bias current ib.
  • the temporal modulation controlled via the DATA terminal makes it possible to adjust the desired gray levels for each elementary LED of the module.
  • each set of N LEDs divided into M groups G(i) comprises only LEDs of the same color.
  • each set of N LEDs and/or each group G(i) can comprise LEDs of different colors.
  • the embodiments described are not limited to the preferred examples described above in which a set of N LEDs is divided into M groups each comprising the same number L of LEDs. Alternatively, different groups may contain different numbers of LEDs, at least one group comprising at least two LEDs.
  • One bias circuit 103(i) is then provided per group of LEDs (ie M bias circuits), similarly to what has been described above.
  • the bias circuits 103(i) and their operation are the same or similar to what was previously described, except that in groups comprising fewer LEDs, the missing LEDs are not addressed.
  • the number of switches K(j) or K'(j) can be different in the different bias circuits 103(i).
  • the number of LEDs of each color is identical.
  • the number of LEDs may vary from one color to another.
  • a person skilled in the art will know how to adapt the control circuit 105 accordingly.
  • pixel is meant a pixel of the image which it is desired to display.
  • each sub-pixel corresponds to a pixel of one of the N images which it is desired to restore (with N different viewing angles).
  • an image consists of a matrix of X*Y pixels, then the i-th sub-pixel associated with a given pixel corresponds to a pixel with the same coordinate (x,y) in the i-th image.
  • an elementary module within the meaning of the present application can integrate several pixels of the same image to be displayed.
  • the modules can be spaced from each other on the transfer substrate.
  • the area of the control chip of each module can then be greater than the area of the LED chip of the module. This saves the area of LED material compared to the silicon area of the control chip.
  • provision can be made to join laterally several elementary modules to constitute a display screen of larger dimensions.
  • the control chip of each module will then preferably have substantially the same lateral dimensions as the LED chip of the module.
  • control chip of each module may have a surface area smaller than the surface area of the LED chip, although this variant is unlikely given that the surface of the control chip is generally constrained, in particular when the control chip has a single semiconductor layer and not a "3D" circuit.
  • each chip comprises semiconductor components formed in and/or on a layer of semiconductor material.
  • the control chip comprises, among other things, transistors, for example of the MOS type, comprising, as is well known, portions formed in a semiconductor layer (for example silicon) and portions (for example metal, insulating) formed above the semiconductor layer, and covered with dielectric materials in which metallic connection lines between components are formed.
  • the LED chip comprises light-emitting diodes formed at least in part in one or more superposed semiconductor layers.
  • the LED chip can further comprise a set of other layers to form color filters for example, or light conversion elements.
  • Control and LED chips can be made separately and then glued together. Alternatively, one of the chips can be built directly on the other chip in a sequential manufacturing process.
  • a chip in particular the control chip, can in practice consist of several “stages” or in other words of several superposed chips to form a “3D” circuit.
  • the English word “tier” is often used to designate the different stages, each comprising a semiconductor layer with components (transistors, resistors, etc.), also called “front-end” in English, and alternating dielectric and conductive layers. to form a network electrical interconnection, also called “back-end” in English.

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  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
EP22162187.3A 2021-03-18 2022-03-15 Led-emissionsanzeigevorrichtung Pending EP4060650A1 (de)

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US20240054937A1 (en) * 2022-08-03 2024-02-15 Himax Technologies Limited Gate driving device and operating method for gate driving device

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US20180247586A1 (en) * 2015-09-25 2018-08-30 Apple Inc. Hybrid micro-driver architectures having time multiplexing for driving displays
WO2017089676A1 (fr) 2015-11-26 2017-06-01 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dalle lumineuse et procédé de fabrication d'une telle dalle lumineuse
WO2018185433A1 (fr) 2017-04-05 2018-10-11 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif d'affichage d'images emissif a led
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FR3076396A1 (fr) 2017-12-28 2019-07-05 Aledia Ecran d'affichage a diodes electroluminescentes

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US11462155B1 (en) 2022-10-04
FR3120988B1 (fr) 2023-03-24

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