EP3724962B1 - Batterie mit geschalteten akkumulatoren - Google Patents

Batterie mit geschalteten akkumulatoren Download PDF

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Publication number
EP3724962B1
EP3724962B1 EP18833268.8A EP18833268A EP3724962B1 EP 3724962 B1 EP3724962 B1 EP 3724962B1 EP 18833268 A EP18833268 A EP 18833268A EP 3724962 B1 EP3724962 B1 EP 3724962B1
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EP
European Patent Office
Prior art keywords
unit
acc
diode
accumulator
anode
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EP18833268.8A
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English (en)
French (fr)
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EP3724962A1 (de
Inventor
Yan LOPEZ
Eric Fernandez
Sylvain Bacquet
Leandro Cassarino
Ghislain Despesse
Remy Thomas
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0024—Parallel/serial switching of connection of batteries to charge or load circuit
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/00714—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery charging or discharging current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
    • H02J7/04—Regulation of charging current or voltage
    • H02J7/06—Regulation of charging current or voltage using discharge tubes or semiconductor devices

Definitions

  • the present application relates to the field of batteries with switched accumulators.
  • a switched accumulator battery is a battery comprising a plurality of generally identical modules connected in series and / or in parallel, the number of which depends on the desired voltage at the terminals of the battery.
  • Each module comprises a plurality of electric accumulators. Switches connected in series and in parallel with the accumulators make it possible to connect, or not, in series each accumulator between output nodes of the module, so as to choose the output voltage from among the various combinations of voltages supplied by the accumulators.
  • An example of such a switched battery can be found in the document EP 2,584,689 .
  • Each battery module includes a switch control circuit.
  • the control circuit is suitable for selecting the accumulators to be connected between the output nodes as a function of various criteria, for example the desired output voltage or the charge level of each accumulator.
  • the control circuit is supplied by a supply voltage which is preferably referenced to the ground of the module.
  • the control circuit is therefore generally supplied by an accumulator of the module connected to ground.
  • a drawback of such a battery is that if the accumulator supplying the control circuit is discharged or if it suffers a failure causing a significant drop in the voltage which it supplies, the control circuit is no longer supplied with power and the accumulators can no longer be switched.
  • an object of an embodiment is to at least partially overcome the drawbacks of the batteries with switched accumulators described above.
  • a switched accumulator battery comprising: a first unit; a plurality of second units connected in series with the first unit, each first and second unit comprising: an electric accumulator connected in series, through the cathode, with a first switch, a second switch connected in parallel with the accumulator and the first switch , and a first diode, the anode of the first diode being connected to the cathode of the accumulator, the cathodes of the first diodes being connected to an output node, the anode of the accumulator of the first unit being connected to the ground, the anode of the first diode of each second unit being connected to the cathode of the accumulator by at least a third switch; and a control circuit adapted to measure characteristics of at least some accumulators and to control the first, second and third switches according to the characteristics.
  • the cathode of the accumulator of each second unit is connected to the anode of the first diode of the second unit considered by as many third switches as there are first and second units located between the second. considered unit and mass.
  • the cathode of the accumulator of the first unit is connected to the anode of the corresponding first diode via a fourth switch.
  • each of the third switches has the same state, on or off, as one of the second switches.
  • the states of the third switches are independent of the states of the first and second switches.
  • the state of the first switch and the state of the second switch of each first or second unit are opposed.
  • the anode of the accumulator of each second unit is connected to the cathode of a second diode, the anode of said second diode being connected to ground by a resistor.
  • a method of using a battery as described above comprises the following steps: detecting the failure of an accumulator of one unit among the first unit or one of the second units; turning on the second switch of said unit and blocking the first switch of said unit; and turning on at least a third switch of another one of the first unit or one of the second units.
  • the expression “substantially” means within 10%, preferably within 5%.
  • Each cell of the switched cell system can correspond to an electrical charge storage element or to an electrical generator.
  • An example of an electric charge storage element is for example an electric accumulator or a capacitor.
  • An example of an electric generator is for example a fuel cell, a zinc-air cell, a photovoltaic cell or an energy recovery system, in particular a mini-wind turbine or a mini-turbine.
  • the switched cell system may include only electrical charge storage elements, only electrical generators, or both electrical charge storage elements and electrical generators.
  • the switched cell system only comprises electric generators
  • the use is theoretically only in discharge mode. Nevertheless, in the event of reactive power, for brief passages through negative power at each period, the inertia of the generator may be sufficient to smooth the power, for example due to the rotational inertia and parasitic capacitances.
  • each generator can be connected in parallel with a resistive element, in order to accept negative powers, by dissipating this energy.
  • the system is intended to be connected to a device which absorbs or supplies power depending on the envisaged application.
  • this device corresponds to an electrical machine, for example to an electric motor, or to the electrical distribution network.
  • the figure 1 schematically represents a battery module 10 with switched accumulators.
  • each module of such a battery comprises N units Ce i , N being an integer and i varying from 1 to N.
  • N is equal to 4.
  • Each unit Ce i comprises nodes m i and n i .
  • Node n i of unit Ce i is connected to node m i of unit Ce i + 1 , for i varying from 1 to N-1.
  • the node m 1 of unit Ce 1 is connected to ground.
  • Each unit Ce i comprises an accumulator Acc i connected in series via the cathode with a transistor S i between nodes m i and n i , the anode of accumulator Ce i being connected to node m i .
  • the anode of the accumulator Acc 1 is therefore connected to node m 1 and to ground.
  • Each unit also comprises a transistor B i connected between the nodes m i and n i , in parallel with the assembly comprising the accumulator Acc i and the transistor S i .
  • the transistors S i and B i function as switches and are controlled respectively by control signals CmdS i and CmdB i .
  • the transistors Si and Bi are N-channel MOS transistors.
  • Node n N is connected to an output node V-of module 10 by a transistor HG, controlled by a control signal CmdHG.
  • Node n N is connected to an output node V + of module 10 by a transistor HD, controlled by a control signal CmdHD.
  • Node m 1 is connected to output node V- of module 10 by a transistor BG, controlled by a control signal CmdBG.
  • the node m 1 is connected to the output node V + of the module 10 by a transistor BD, controlled by a control signal CmdBD.
  • the HD, HG, BD, and BG transistors are N-channel MOS transistors.
  • the control signals are supplied by a control circuit, not shown.
  • the control circuit may correspond to a dedicated circuit and / or may include a processor, for example a microprocessor or a microcontroller, suitable for executing instructions of a computer program stored in a memory.
  • the control signals CmdS i and CmdB i are such that when the transistor S i is on, the transistor B i is off and vice versa.
  • the voltage between node m i and node n i is either zero, if B 1 is on, or substantially equal to the voltage supplied by the accumulator Acc i if transistor S i is on.
  • the voltage between the nodes m 1 and n N is therefore substantially equal to a combination of the voltages supplied by the various Acc i accumulators of the Ce i units.
  • HG, HD, BG, BD transistors can have various configurations including two main ones.
  • the HD and BG transistors are on and the HG and BD transistors are blocking.
  • the voltage at the output node V + is substantially equal to the voltage of the node n N
  • the voltage at the output node V- is substantially equal to the voltage of the node m 1 .
  • the HD and BG transistors are blocking and the HG and BD transistors are conductive.
  • the voltage at the output node V- is substantially equal to the voltage of the node n N and the voltage at the output node V + is substantially equal to the voltage of the node m 1 .
  • the two configurations provide opposing voltages between nodes V + and V-.
  • the module 10 further comprises sensors, not shown, suitable for measuring at least one characteristic of at least some of the accumulators, preferably of each accumulator, for example the voltage supplied by the accumulator, its current or its temperature, and to provide these measurements to the control circuit.
  • the control circuit can modify the states of the transistors S i and B i so that the accumulator Acc i is no longer requested or that it is only solicited in certain ways. For example, a discharged accumulator could only be called upon for a charging operation.
  • the control circuit is for example supplied by one of the accumulators of the module.
  • the supply voltage of the control circuit preferably being referenced to ground, the supply voltage of the control circuit can be supplied by the accumulator Acc 1 .
  • the control circuit can then no longer be supplied.
  • the figure 2 schematically and partially shows an embodiment of a module 30 of a switched accumulator battery.
  • the figure 3 represents a timing diagram illustrating the operation of the battery module according to the embodiment of the figure 2 .
  • the module comprises N units C i , with N an integer and i varying from 1 to N.
  • N is equal to 3.
  • Each unit C i includes the elements of units Ce i of the figure 1 , that is to say an accumulator Acc i and transistors B i and S i connected as described above between nodes m i and n i .
  • the node m 1 is connected to ground and the nodes m 1 and n N , here n 3 , are connected to the output nodes V + and V- by the transistors HD, HG, BD and BG which are not shown. in figure 2 .
  • the operation of switched accumulators is similar to the operation described in relation to the figure 1 .
  • the cathode of the accumulator Acc i is connected to the anode of the diode D i .
  • the cathode of diode D i is connected to a node 32.
  • the voltage of node 32 is called Vout.
  • the voltage Vout supplies the control circuit, not shown.
  • each accumulator Acc i is connected to the anode of diode D i by i-1 transistors T i, j in series controlled by the control signals CmdS j , with j varying from 1 to i-1.
  • the cathode of accumulator Acc 3 is connected to the anode of diode D 3 by a transistor T 3.2 controlled by the control signal CmdS 2 and a transistor T 3.1 controlled by the control signal CmdS 1 .
  • the transistors T i, j act as a switch.
  • the transistors T i, j are P-channel MOS transistors.
  • the diodes D i constitute a block implementing the OR logic function.
  • the voltage Vout at node 32, constituting the output of the block is substantially equal to the highest voltage among the voltages at the level of the anodes of the diodes D i , constituting the inputs of the block.
  • the control signals are chosen such that, for a given unit C j , when the transistor S j is in a first state, blocking or on, the transistor B j and the transistors T i, j , with i being able to vary by j + 1 to N, are in a second state, passing or blocking.
  • the figure 3 represents an example of change as a function of time of the state of transistors B 1 and B 2 and of the state of diodes D 1 , D 2 and D 3 .
  • the state of transistor B 1 or B 2 is represented by a signal at a high level when the transistor is on and by a signal at a low level when the transistor is off.
  • the state of the diode D 1 , D 2 or D 3 is represented by a high level when the voltage at the anode of the diode is the voltage supplied by the associated accumulator and that this can be used to supply the battery. control circuit.
  • the state of the diode D 1 , D 2 or D 3 is represented by a low level when the voltage at the anode of the diode cannot be used to supply the control circuit, for example because at least l 'one of the switches between the anode of the diode and the cathode of the associated accumulator is not conducting or because the associated accumulator has suffered a failure.
  • transistors S 1 , S 2 , T 2,1 , T 3 , 1 and T 3,2 are not shown and can be deduced from the state of transistors B 1 and B 2 .
  • transistors S 1 , S 2 and S 3 are controlled so as to be respectively in the state opposite to the state of transistors B 1 , B 2 and B 3 .
  • the transistors T 2,1 and T 3 , 1 are controlled so as to be in the same state as the transistor B 1 .
  • Transistor T 3.2 is controlled so as to be in the same state as transistor B 2 .
  • the states of the transistors of the unit C N here the transistors B 3 and S 3 of the unit C 3 , have no influence on the supply to the control circuit.
  • Part 40 on the left, corresponds to normal operation of battery module 30.
  • Part 42 in the center, begins at an instant t 1 and corresponds to operation during d '' Acc 1 accumulator failure.
  • Part 44 on the right, begins at an instant t 2 and corresponds to operation during a failure of the Acc 2 accumulator following the failure of the Acc 1 accumulator.
  • the voltage at the anode of diode D 1 is constant and substantially equal to the voltage supplied by the accumulator Acc 1 , whatever the state of transistors B 1 and B 2 .
  • the state of diode D 1 is represented by a high level in normal operation.
  • the voltage at the anode of diode D 2 is substantially equal to the voltage supplied by the accumulator Acc 2 when the transistor B 1 is on, which makes it possible to reference the Acc 2 accumulator to ground.
  • the state of diode D 2 is therefore represented at the high level when transistor B 1 is on.
  • the voltage at the anode of diode D 2 is no longer the voltage supplied by the accumulator and the state of diode D 2 is represented by a low level.
  • the voltage at the anode of diode D 3 is substantially equal to the voltage supplied by the accumulator Acc 3 when the transistors B 1 and B 2 are both passers-by.
  • the state of diode D 3 then represented at the high level.
  • the voltage at the anode of the diode D 3 is no longer the voltage supplied by the accumulator Acc 3 and the state of the diode D 3 is represented by a low level.
  • the voltage Vout corresponds to the voltage at the output of the block implementing the logic OR function and is therefore substantially equal to the maximum voltage among the voltages at the anodes of the diodes D 1 , D 2 or D 3 .
  • the voltage at the anode of a diode D i associated with a unit C i is substantially equal to the voltage supplied by the accumulator Acc i of the same unit when all the transistors B j with j varying by 1 to i-1 are passers-by.
  • the accumulator Acc 1 begins to fail. This is represented by a low level of the state of the diode D 1 . This failure is detected by the control circuit using sensors not shown in figure 2 . In response to this failure, the control circuit modifies the control signals so as to turn transistors B 1 , T 2.1 and T 3.1 on and transistor S 1 off .
  • the anode of the accumulator Acc 2 is referenced to ground and the voltage at the anode of the diode D 2 is substantially equal to the voltage supplied by the accumulator Acc 2 .
  • the part 42 only comprises periods B and C.
  • the voltage at the anode of the diode D 1 cannot supply the control circuit after the instant t 1 , due for example to too great a decrease in the voltage supplied by the accumulator, it is considered that the voltage at the anode of diode D 1 is lower than the voltages at the anodes of diodes D 2 and D 3 .
  • the voltage Vout therefore has the value of the voltage supplied by the accumulator Acc 2 and during periods C, the voltage Vout has the maximum value between the values of the voltages supplied by the accumulators Acc 2 and Acc 3 .
  • the accumulator Acc 2 begins to fail. This is represented by a low level crossing of the state of diode D 2 . This failure is detected by the control circuit using the sensors. In response to this failure, the control circuit modifies the control signals so as to turn transistors B 2 and T 3.2 on and transistor S 2 off .
  • the anode of accumulator Acc 3 is referenced to ground and the voltage at the anode of diode D 3 is substantially equal to the voltage supplied by accumulator Acc 3 .
  • the transistors B 1 and B 2 being on, part 44 corresponds to a period C during which the voltage Vout has the maximum value between the voltages supplied by the accumulators Acc 1 , Acc 2 and Acc 3 .
  • the control circuit is supplied by the Acc 3 accumulator.
  • control circuit is supplied.
  • the units C i , with i varying from 1 to N-1, of the figure 2 furthermore comprise a diode D0 i , the cathode of which is coupled to the node n i and the anode of which is coupled to ground via a resistor R i .
  • the resistances R i are relatively low, for example between 1 and 10 ohms.
  • the values of the control signals CmdS i are in ranges suitable for simultaneously making the transistor S i on and the transistors T j, i , with j strictly greater than i, blocking, and vice versa. .
  • the design of the control circuit is therefore simplified.
  • the figure 4 schematically and partially represents another embodiment of a module 50 of a switched accumulator battery comprising N units C i .
  • N is equal to 3.
  • the figure 4 includes all the elements represented in figure 2 with the difference that for a given unit C i , the transistors T i, j , with j varying from 1 to j-1, are replaced by a switch I i controlled by a control signal Cmdmicro i .
  • the control signals Cmdmicro i are supplied by the control circuit, not shown, and can be chosen independently of the control signals of the transistors B i and S i .
  • the Acc 1 accumulator fails, it is thus possible to choose to supply the control circuit with any of the other Acc i accumulators, with i varying from 2 to N.
  • Each switch I i comprises in figure 4 a transistor Ma i connected between the cathode of the accumulator Acc i and the anode of the diode D i .
  • the cathode of the accumulator Acc i is, moreover, connected to ground by a resistor Ra i in series with a transistor Mb i controlled by the control signal Cmdmicro i .
  • the cathode of the accumulator Acc i is also connected to ground by a resistor Rb i in series with a transistor Mc i controlled by the connection node between the resistor Ra i and the transistor Mb i .
  • the transistor Ma i is controlled by the connection node between resistor Rb i and transistor Mc i .
  • the figure 5 shows a variant of the embodiment of the figure 4 in which the cathode of the accumulator Acc 1 is connected to the anode of the diode D 1 by a switch I 1 having a structure similar to that of the switches I i described above.
  • the transistors Ma i , Mb i and Mc i , for i varying from 1 to N are for example MOS transistors.
  • switches I i described here are examples of implementations of switches that can be replaced by other implementations of switches.
  • An advantage of the embodiment of the figure 5 is that it is possible to choose, at any time, which accumulator supplies the control circuit.
  • Vout does not vary according to the switching of the accumulators. Indeed, the voltages present at the input of the block implementing the OR logic function depend only on the control signals Cmdmicro i , and not on the state of the transistors B i and S i .

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Claims (8)

  1. Ein elektrisches System mit geschalteten Zellen, wobei das System Folgendes aufweist:
    eine erste Einheit (C1);
    eine Vielzahl von zweiten Einheiten (C2, C3), die mit der ersten Einheit in Reihe geschaltet sind, wobei jede erste und zweite Einheit Folgendes aufweist:
    eine elektrische Zelle (Acc1, Acc2, Acc3), die über die Kathode mit einem ersten Schalter (S1, S2, S3, S4) in Reihe geschaltet ist,
    einen zweiten Schalter (B1, B2, B3, B4), der parallel zu der Zelle und dem ersten Schalter geschaltet ist, und
    eine erste Diode (D1, D2, D3), wobei die Anode der ersten Diode mit der Kathode der Zelle verbunden ist,
    wobei die Kathoden der ersten Dioden mit einem Ausgangsknoten (32) verbunden sind, wobei die Anode der Zelle der ersten Einheit mit Masse verbunden ist, und wobei die Anode der ersten Diode jeder zweiten Einheit mit der Kathode der Zelle durch mindestens einen dritten Schalter (T2,1, T3,2, T3,1, I2, I3) verbunden ist; und
    eine Steuerschaltung, die in der Lage ist, die Eigenschaften mindestens bestimmter Zellen zu messen und den ersten, zweiten und dritten Schalter in Abhängigkeit von den Eigenschaften zu steuern.
  2. Elektrisches System mit geschalteten Zellen nach Anspruch 1, wobei die Kathode der Zelle jeder zweiten Einheit (C2, C3) mit der Anode der ersten Diode (D2, D3) der zweiten betrachteten Einheit durch so viele dritte Schalter (T2,1, T3,2, T3,1, I2, I3) gekoppelt ist, wie es erste und zweite Einheiten gibt, die zwischen der zweiten betrachteten Einheit und der Masse liegen.
  3. Elektrisches System mit geschalteten Zellen nach Anspruch 1 oder 2, wobei die Kathode der Zelle der ersten Einheit (C1) mit der Anode der ersten entsprechenden Diode (D1) über einen vierten Schalter (I1) verbunden ist.
  4. Elektrisches System mit geschalteten Zellen nach einem der Ansprüche 1 bis 2, wobei jeder der dritten Schalter (T2,1, T3,2, T3,1) den gleichen Zustand, ein oder aus, hat wie einer der zweiten Schalter.
  5. Elektrisches System mit geschalteten Zellen nach einem der Ansprüche 1 bis 3, wobei die Zustände der dritten Schalter (I1, I2, I3) unabhängig von den Zuständen der ersten (S1, S2, S3, S4) und zweiten (B1, B2, B3, B4) Schalter sind.
  6. Elektrisches System mit geschalteten Zellen nach einem der Ansprüche 1 bis 5, wobei der Zustand des ersten Schalters (S1, S2, S3, S4) und der Zustand des zweiten Schalters (B1, B2, B3, B4) jeder ersten (C1) oder zweiten (C2, C3) Einheit entgegengesetzt sind.
  7. Elektrisches System mit geschalteten Zellen nach einem der Ansprüche 1 bis 6, wobei die Anode der Zelle jeder zweiten Einheit mit der Kathode einer zweiten Diode (D01, D02) verbunden ist, wobei die Anode der zweiten Diode über einen Widerstand (R1, R2) mit Masse verbunden ist.
  8. Verfahren zur Verwendung des elektrischen Systems nach einem der Ansprüche 1 bis 7, wobei das Verfahren die folgenden Schritte aufweist:
    Erfassen des Ausfalls einer Zelle (Acc1, Acc2, Acc3) einer Einheit, und zwar der ersten Einheit oder einer der zweiten Einheiten;
    Einschalten des zweiten Schalters (B1, B2, B3) der genannten Einheit und Ausschalten des ersten Schalters (S1, S2, S3) der genannten Einheit; und
    Einschalten mindestens eines dritten Schalters (T2,1, T3,1, T3,2, I1, I2, I3) einer anderen Einheit, und zwar der ersten Einheit oder einer der zweiten Einheiten.
EP18833268.8A 2017-12-12 2018-12-06 Batterie mit geschalteten akkumulatoren Active EP3724962B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1761990A FR3074977B1 (fr) 2017-12-12 2017-12-12 Batterie a accumulateurs commutes
PCT/FR2018/053144 WO2019115915A1 (fr) 2017-12-12 2018-12-06 Batterie a accumulateurs commutes

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EP3724962A1 EP3724962A1 (de) 2020-10-21
EP3724962B1 true EP3724962B1 (de) 2021-11-24

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US (1) US11876390B2 (de)
EP (1) EP3724962B1 (de)
CA (1) CA3085325A1 (de)
ES (1) ES2903297T3 (de)
FR (1) FR3074977B1 (de)
WO (1) WO2019115915A1 (de)

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ES2903297T3 (es) 2022-03-31
EP3724962A1 (de) 2020-10-21
FR3074977B1 (fr) 2020-12-04
US20210075231A1 (en) 2021-03-11
CA3085325A1 (fr) 2019-06-20
WO2019115915A1 (fr) 2019-06-20
US11876390B2 (en) 2024-01-16
FR3074977A1 (fr) 2019-06-14

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