EP3455854B1 - Procédé de codec audio adaptatif et appareil - Google Patents

Procédé de codec audio adaptatif et appareil Download PDF

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Publication number
EP3455854B1
EP3455854B1 EP17724255.9A EP17724255A EP3455854B1 EP 3455854 B1 EP3455854 B1 EP 3455854B1 EP 17724255 A EP17724255 A EP 17724255A EP 3455854 B1 EP3455854 B1 EP 3455854B1
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Prior art keywords
signal
quantized
quantizer
step size
filter
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German (de)
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EP3455854A1 (fr
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James Johnston
Stephen White
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Immersion Services LLC
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Immersion Services LLC
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Priority claimed from US15/151,220 external-priority patent/US10756755B2/en
Priority claimed from US15/151,211 external-priority patent/US20170330575A1/en
Priority claimed from US15/151,200 external-priority patent/US10770088B2/en
Priority claimed from US15/151,109 external-priority patent/US10699725B2/en
Application filed by Immersion Services LLC filed Critical Immersion Services LLC
Publication of EP3455854A1 publication Critical patent/EP3455854A1/fr
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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
    • G10L19/26—Pre-filtering or post-filtering
    • G10L19/265—Pre-filtering, e.g. high frequency emphasis prior to encoding
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/02—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using spectral analysis, e.g. transform vocoders or subband vocoders
    • G10L19/032—Quantisation or dequantisation of spectral components
    • G10L19/035—Scalar quantisation
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
    • G10L19/26—Pre-filtering or post-filtering
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L2019/0001—Codebooks

Definitions

  • the description relates to systems, methods and articles to encode and decode audio signals.
  • Differential pulse code modulation may be used to reduce the noise level or the bit rate of an audio signal.
  • a difference between an input audio signal and a predictive signal may be quantized to produce an output encoded data stream of a reduced energy.
  • the predictive signal of an encoder may be generated using a decoder including an inverse quantizer and a prediction circuit.
  • Adaptive differential pulse code modulation varies a size of a quantization step of the quantizer (and inverse quantizer) to increase the efficiency in view of a varying dynamic range of an input signal.
  • United States patent publication no. US 5974380 A describes a subband audio coder which employs perfect/non-perfect reconstruction filters, predictive/non-predictive subband encoding, transient analysis, and psycho-acoustic/minimum mean-square-error bit allocation over time, frequency and the multiple audio channels to encode/decode a data stream to generate high fidelity reconstructed audio.
  • the audio coder windows the multi-channel audio signal such that the frame size, i.e. number of bytes, is constrained to lie in a desired range, and formats the encoded data so that the individual subframes can be played back as they are received thereby reducing latency.
  • United States patent publication no. US 6493664 B1 describes encoding of prototype waveform components applicable to telecommunication systems which provides improved voice quality enabling a dual-channel mode of operation which permits more users to communicate over the same physical channel.
  • a prototype word (PW) gain is vector quantized using a vector quantizer (VQ) that explicitly populates a codebook by representative steady state and transient vectors of PW gain for tracking the abrupt variations in speech levels during onsets and other non-stationary events, while maintaining the accuracy of the speech level during stationary conditions.
  • VQ vector quantizer
  • Embodiments comprise apparatus comprising: a decoder configured to generate decoded audio signals based on quantized signals, the decoder including:
  • Embodiments comprise a method comprising: decoding an encoded audio signal based on a quantized signal using a feedback loop to generate a decoded audio signal, the decoding including:
  • FIG. 1 is a functional block diagram of an embodiment of audio signal encoder 100 which may employ adaptive differential pulse-code modulation (ADPCM). As illustrated in Figure 1 , the encoder 100 has an adder circuit 110, an adaptive quantizer circuit 120, a decoder circuit 130 including an inverse quantizer circuit 134 and a predictor circuit 138, a quantizer step size control circuit 140, and an optional coder circuit 150.
  • ADPCM adaptive differential pulse-code modulation
  • an analog input audio signal to be encoded is received at a positive input 112 of the adder 110 of the encoder 100.
  • a negative input 114 of the adder 110 receives a prediction signal generated by the decoder 130 as a feedback signal.
  • the adder 110 generates a difference signal which is provided to the adaptive quantizer circuit 120.
  • the adaptive quantizer circuit 120 may be an analog to digital converter which samples the received difference signal and generates an output signal representing the difference signal as a series of quantized signals representing different signal levels. For example, 8-bit words may be used to represent 256 different signal levels (e.g., 256 different steps having a uniform step size); 4 bits words may be used to represent 16 different signal levels; etc.
  • coding such as Huffman coding and/or arithmetic coding
  • coding circuit 150 may be employed on the quantized signal in an embodiment, by coding circuit 150, generating a coded signal output.
  • the quantized signal output by the adaptive quantizer circuit 120 (or of the optional coder 150 when a coder is employed) is the output quantized signal or code words of the encoder 100.
  • the quantizer step size control circuit 140 generates control signals to control a size of the quantization steps employed by the quantizer 120 (and the inverse quantizer 134), which may be varied to facilitate efficient transmission, storage, etc., in view of an input audio signal having a varying dynamic range.
  • the inverse quantizer 134 of the decoder 130 generates a signal, such as an analog signal, based on the quantized signal output by the adaptive 25 quantizer and the current step size control signal set by the quantizer step size control circuit 140.
  • the predictor circuit 138 may generate the prediction signal based on the output signal of the inverse quantizer 134 and historical data, such as recent quantized signal values and recent prediction signal values.
  • One or more filters and one or more feedback loops may be employed by the predictor circuit 138.
  • the encoder 100 of Figure 1 comprises one or more processors or processor cores P, one or more memories M, and discrete circuitry DC, which may be used alone or in various combinations to implement the functionality of the encoder 100.
  • an embodiment of the encoder 100 generates quantized and, optionally, coded data from an input analog audio signal.
  • a digital audio signal to be encoded e.g., to a reduced bitstream, may be received at the positive input 112 instead of an analog signal (e.g. , an 8-bit digital audio signal may be encoded as a 4-bit digital audio signal).
  • the various components may be combined (e.g ., the quantizer step size control circuit 140 may be integrated into the adaptive quantizer 120 in some embodiments) or split into additional components (e.g ., the predictor circuit 138 may be split into multiple predictor circuits, may be split into separate components, such as filters, adders, buffers, look-up tables, etc.) and various combinations thereof.
  • FIG. 2 is a functional block diagram of an embodiment of an audio signal decoder 200 which may employ adaptive differential pulse-code modulation (ADPCM).
  • the decoder 200 may be employed, for example, as the decoder 130 of Figure 1 , as a separate decoder to decode a received encoded signal, etc.
  • the decoder 200 has optional decoding circuitry 250, an inverse quantizer circuit 234, a predictor circuit 238, an inverse quantizer step size control circuit 240 and an adder 270.
  • a coded signal is received by the decoding circuitry 250, which converts the coded signal into a quantized signal.
  • the quantized signal to be decoded is provided to the inverse quantizer 234 and to the inverse quantizer step size control circuit 240.
  • the decoding circuitry 250 may typically be omitted and the same step size control circuit may be used to provide a step size control signal to the quantizer and to the inverse quantizer (see, Figure 1 ).
  • the inverse quantizer 234 generates a signal, such as an analog signal, based on the quantized signal output by the decoding circuitry 250 (or received from a quantizer (see quantizer 120 of Figure 1 )) and the current step size set by the inverse quantizer step size control circuit 240.
  • the output of the inverse quantizer 234 is provided to a first positive input of the adder 270.
  • the output of the adder is provided to the predictor 238, which as illustrated comprises a Finite Impulse Response (FIR) filter.
  • An output of the FIR filter is provided to a second positive input of the adder 270.
  • FIR Finite Impulse Response
  • the output of the decoder 200 is the output of the adder 270.
  • the output of the predictor circuit 238 provides the prediction signal to the encoder (see the prediction signal provided to the negative input 114 of the adder 110 of Figure 1 ).
  • the inverse quantizer 234, the inverse quantizer step size control circuit 240 and the predictor circuit 238 may typically operate in a similar manner to the corresponding components of an encoder, such as the encoder 100 of Figure 1 .
  • an encoder such as the encoder 100 of Figure 1 .
  • having the corresponding components operate in a similar manner in the encoder 100 and the decoder 200 facilitates using the quantized signal to generate the prediction signal and to control the step size in both the encoder 100 and the decoder 200, without needing to exchange additional control signals between the encoder 100 and the decoder 200.
  • the decoder 200 of Figure 2 comprises one or more processors or processor cores P, one or more memories M, and discrete circuitry DC, which may be used alone or in various combinations to implement the functionality of the decoder 200.
  • the components of the decoder 200 of Figure 2 are illustrated as separate components, the various components may be combined (e.g ., the inverse quantizer step size control circuit 240 may be integrated into the inverse quantizer 234 in some embodiments) or split into additional components (e.g ., the predictor circuit 238 may be split into separate components, such as filters, adders, buffers, look-up tables, etc.) and various combinations thereof.
  • FIG 3 is a functional block diagram of an embodiment of a quantizer step size control circuit 340, which may be employed, for example, in the embodiment of the encoder 100 of Figure 1 as the quantizer step size control circuit 140, or in the embodiment of the decoder 200 of Figure 2 as the inverse quantizer step size control circuit 240.
  • the quantizer step size control circuit 340 comprises a log multiplier selector 342 which selects a log multiplier based on a current quantized signal word, as illustrated a word output by an adaptive quantizer 320.
  • the current quantized signal word may be included in a bit stream being decoded by a decoder (see Figure 2 ).
  • the log multiplier selector 342 may select a log multiplier based on historical data, such as previous quantized signal words, and may comprise a look-up table LUT, which may be updatable, for example, based on historical data, in a update download, etc.
  • the log multiplier selector 342 may select a log multiplier based on statistical probabilities based on current and previous quantized signal words.
  • the quantizer step size control circuit 340 comprises an adder 344 which receives at a first positive input the selected log multiplier, and provides an output to a delay circuit 346. The output of the delay circuit 346 is provided to a multiplier 348 and to an exponential circuit 350.
  • the multiplier 348 multiplies the output of the delay circuit 346 by a scaling or leakage factor ⁇ , which may typically be close to and less than 1, and provides the result to a second positive input of the adder 344.
  • the leakage factor may typically be a constant, but may be variable in some embodiments, for example, based on the previous step size control signal or other historical data.
  • the selection of a scaling factor ⁇ as close to and less than 1 facilitates reducing the impact of selection of an incorrect step size, for example due to a transmission error, as the introduced error will decay away.
  • the exponential circuit 350 in operation, generates a step-size control signal based on the output of the delay circuit 346.
  • the step-size control signal is provided to the adaptive quantizer 320 and to an inverse quantizer 334.
  • the quantizer step size control circuit 340 operates in a logarithmic manner, which may simplify the calculations. Some embodiments may operate in a linear manner, and may, for example, employ a multiplier instead of the adder 244, and an exponential circuit instead of the multiplier 246.
  • the quantizer step-size control circuit 340 as illustrated operates in a logarithmic manner, and the step sizes selected based on the step size control signal vary in an exponential manner.
  • Figure 3 comprises one or more processors P, one or more memories M, and discrete circuitry DC, which may be used alone or in various combinations to implement the functionality of the quantizer step size control circuit 340.
  • FIG 4 is a functional block diagram of an audio signal encoder 400 which may employ adaptive differential pulse-code modulation (ADPCM).
  • the audio signal encoder 400 of an embodiment provides added bandwidth control, facilitates avoiding quantizer overload, and includes adaptive noise shaping.
  • the encoder 400 has a low pass filter 475, an adaptive noise shaping filter 480, an adder circuit 410, a variable-rate adaptive quantizer circuit 420, a decoder circuit 430 including an inverse quantizer circuit 434 and a predictor circuit 438, a quantizer step size and average bit rate control circuit 440, a coder 450 and bit stream assembler 485.
  • ADPCM adaptive differential pulse-code modulation
  • an analog input audio signal to be encoded is received at an input of an input filter, as illustrated the low pass filter 475.
  • the low pass filter 475 facilitates improving the signal to noise ratio.
  • the low pass filter 475 may, for example, be a FIR filter having a 25 kHz edge and a 30 kHz stop band, which has been found to provide excellent results for data sampled at 88.2 or 96 kHz.
  • Figure 5 illustrates an example frequency response of an embodiment of the low pass filter 475 applied to a sampling rate of 96 kHz.
  • Using a low-pass filter and a corresponding fixed predictor filter employing control parameters based on the control parameters of the input filter facilitates obtaining a substantial prediction gain for an input signal when a sufficiently high sampling rate is employed, which in turn facilitates obtaining a desired minimum signal to noise ratio.
  • sampling rates below 48 kHz e.g., 44.1 and 48 kHz
  • the output of the low pass filter 475 is provided to the adaptive noise shaping filter 480.
  • the low pass filter 475 may be omitted, and the signal to be encoded may be input to the adaptive noise shaping filter 480 instead of to the low pass filter 475.
  • the adaptive noise shaping filter 480 may be omitted or selectively bypassed.
  • the adaptive noise shaping filter 480 may be omitted or bypassed when high bit rate signal encoding is employed.
  • a band pass filter may be employed instead of a low pass filter, with correspond adjustments to the predictor filter.
  • an input filter e.g., a band pass filter having fixed control parameters and configured to limit a bandwidth of an input signal to less than seventy-five percent of the available bandwidth based on the sampling frequency
  • the corresponding decoder may include a predictor circuit having fixed control parameters based on a frequency response of the filter. Limiting the bandwidth of the input signal using the input filter and setting the control parameters of the predictor circuit based on a frequency response of the input filter facilitates obtaining a substantial prediction gain for an input signal when a sufficiently high sampling rate is employed, which in turn facilitates obtaining a desired minimum signal to noise ratio.
  • the adaptive noise shaping filter 480 may be, for example, a low-order all-zero linear prediction filter. Real (not complex) coefficients may be employed.
  • the adaptive noise shaping filter 480 is an all zero adaptive noise shaping filter which flattens the spectrum of the signal received from the low pass filter 475, while maintaining the overall spectral slope and sufficient masking to maintain a transparent codec (e.g., the compression artifacts are generally imperceptible).
  • a transparent codec e.g., the compression artifacts are generally imperceptible
  • an all-pole filter using the same coefficients may be used to restore the original spectral shape.
  • the adaptive noise shaping filter 480 preserves the whiteness criteria for the predictor circuit 438.
  • the low-order noise shaping filter 480 may be adjusted to not flatten signals over an edge frequency of a low-pass filter (e.g . 25 kHz, which may not exist in a signal filtered by a low pass filter 475). As noted above, the missing energy at high frequencies facilitates a higher prediction gain. Filters other than linear prediction filters may be employed as the noise shaping filters.
  • the adaptive noise shaping filter 480 provides a filtered output signal to a positive input 412 of the adder 410.
  • the adaptive noise shaping filter 480 also provides a signal including adaptive noise filter setting information and/or synchronization information, which may be used to communicate adaptive noise filter setting and synchronization information to a decoder, such as the decoder 700 of Figure 7 , which includes a corresponding inverse noise shaping filter 780.
  • the setting and synchronization information may be transmitted periodically, such as once for every 512 sample block.
  • the adaptive noise shaping filter control information may be implicit in the code words of the bit stream. For example, when the code words of the bit stream indicate an average bit rate above a threshold average bit rate is being employed, this may also indicate that adaptive noise shaping is being bypassed.
  • a negative input 414 of the adder 410 receives a prediction signal generated by the decoder 430 as a feedback signal.
  • the adder 410 generates a difference signal which is provided to the variable rate adaptive quantizer circuit 420.
  • the variable rate adaptive quantizer circuit 420 generates an output signal representing the difference signal as a series of quantization signals or words.
  • the size of the quantization signals is not fixed, and the average length may be adjusted using the output of a multiplier table of a step size and average bit rate controller 440, as discussed in more detail below.
  • the output of the variable rate adaptive quantizer circuit 420 is provided to the step size and average bit rate controller 440, the inverse quantizer 434 and the coder 450.
  • the quantizer step and average bit rate control circuit 440 generates one or more control signals to control a size of the quantization steps. This implicitly determines an average length of the quantization signal employed by the quantizer 420 (and the inverse quantizer 434), which may be varied by adjustment of the multiplier table to facilitate efficient coding in view of an input audio signal having a varying dynamic range.
  • Figure 6 illustrates an embodiment of a method 600 of generating code words and controlling changes in step sizes and average bit rate that may be employed, for example, by the encoder 400 of Figure 4 .
  • the method starts at 602 and proceeds to 604.
  • the loading factor L factor may be selected so as to maintain a desired average bit rate.
  • the load factor may typically be between 0.5 and 16. In some embodiments, a maximum step size may be employed.
  • Changing the log multiplier m(c n /L factor ) changes the bit rate and step size, and the values stored in the look-up-table of the log multiplier selector (see Figure 8 ) may be selected so as to cause the adaptive quantizer 420 and inverse quantizer 434 to implement the desired changes in the step size and bit rate. For example, higher log multipliers may indicate an increased step size and lower bit rate to the quantizer 420 and inverse quantizer 434.
  • the look-up table may be indexed based on the result of the current quantization value c n divided by the loading factor L factor .
  • values in a look-up-table may be selected such that the log multiplier monotonically increases as the current quantization value c n increases, and the table of multipliers may go from a negative value for small c n to a positive value for large c n .
  • the method 600 proceeds from 606 to 608.
  • the encoder 400 determines whether to continue encoding of a received signal. When it is determined at 608 to continue encoding of a received signal, the method returns to 604 to process the next quantized signal word. When it is not determined at 608 to continue encoding of a received signal, the method proceeds to 610, where other processing may occur, such as generating an escape code to indicate the received signal has terminated, etc. The method proceeds from 610 to 612, where the method 600 terminates.
  • an encoder 400 may perform other acts not shown in Figure 6 , may not perform all of the acts shown in Figure 6 , or may perform the acts of Figure 6 in a different order.
  • the inverse quantizer 434 of the decoder 430 generates a signal, such as an analog signal, based on the quantized signal output c n by the variable rate adaptive quantizer 420 and the current step size d n .
  • the predictor circuit 438 may generate the prediction signal based on the output signal of the inverse quantizer 434 and historical data, such as recent coded data and recent prediction values, as discussed in more detail below with reference to Figure 7 .
  • the predictor circuit 438 may employ a FIR filter with coefficients selected based on the frequency response of the low-pass filter 475, as discussed in more detail below with reference to Figure 7 . These coefficients may be fixed, and may be selected so as to facilitate maintaining a sufficient signal to noise ratio for anticipated input signal characteristics.
  • adaptive quantizer 120 of Figure 1 which may be an eight-bit quantizer, a four-bit quantizer, etc.
  • adaptive quantizer 120 of Figure 1 may be an eight-bit quantizer, a four-bit quantizer, etc.
  • the quantized signal output by the variable rate adaptive quantizer circuit 420 (or of the optional coder 450 when a coder is employed) is the output quantized signal of the encoder 400.
  • coding such as Huffman coding and/or arithmetic coding, may be employed on the quantized signal in an embodiment, by coding circuit 450, generating a coded signal output of the encoder 400.
  • the coder 450 converts quantized signal words into code words, for example, using one or more look-up tables. Quantized signal words which are used less frequently may be assigned to larger code words, and quantized signal words which are used more frequently may be assigned to smaller code words to increase the efficiency of the coder 400.
  • the coder 450 optionally provides escape coding in an embodiment.
  • escape code may be sent instead of a code word from the code book, with the escape coding indicating how the quantized signal value or information will be transmitted (e.g ., that the actual quantized signal is being transmitted, that the next code word is the quantized signal value instead of a code word, that a difference between a maximum/minimum level is being transmitted, etc.).
  • an escape code may indicate that a channel of an encoded signal is being discontinued or is not present ( e.g ., only one channel of a stereo signal is being encoded).
  • an escape code may indicate an end of an encoded signal.
  • the bit stream assembler 485 receives the code words output by the coder 450 and the adaptive noise shaping filter control/synchronization information output by the adaptive noise shaping filter 480 and assembles a bit stream for transmission to a decoder and/or storage.
  • data packets may be assembled by the bit stream assembler 485, such as packets including a 512 sample block and adaptive noise shaping filter control/synchronization information for the sample block.
  • FIG. 7 is a functional block diagram of an embodiment of an audio signal decoder 700 which may employ adaptive differential pulse-code modulation (ADPCM).
  • the decoder 700 may be employed, for example, as the decoder 430 of Figure 4 , as a separate decoder to decode a received encoded signal, etc.
  • the decoder 700 has a bit stream disassembler 785, optional code word decoding circuitry 750, an inverse quantizer circuit 734, a predictor circuit 738, an inverse quantizer step size and average bit rate control circuit 740, an adder 770, an inverse adaptive noise shaping filter 780 and a low pass filter 775.
  • ADPCM adaptive differential pulse-code modulation
  • an assembled signal is received by the bit stream disassembler 785 and split into a coded signal component and an adaptive noise shaping filter control and synchronization signal component.
  • the coded signal component is provided to the decoding circuitry 750, which converts the coded signal into a quantized signal c n . Escape coding may be used in an embodiment, as discussed above with reference to the coder 450 of Figure 4 .
  • the quantized signal to be decoded is provided to the inverse quantizer 734 and to the inverse quantizer step size and average bit rate control circuit 740.
  • the decoding circuitry 750 may typically be omitted and the same step size and average bit rate control circuit may be used to provide a step size control signal to the quantizer and to the inverse quantizer (see, Figure 4 ).
  • the inverse quantizer 734 generates a signal, such as an analog signal, based on the quantized signal output by the decoding circuitry 750 (or received from a quantizer (see quantizer 420 of Figure 4 )) and the current step size set by the inverse quantizer step size and average bit rate control circuit 740.
  • the output of the inverse quantizer 734 is provided to a first positive input of the adder 770.
  • the output of the adder 770 is provided to the predictor 738, which as illustrated comprises a Finite Impulse Response (FIR) filter. An output of the FIR filter is provided to a second positive input of the adder 770.
  • FIR Finite Impulse Response
  • the output of the decoder 700 is provided to an inverse filter, as illustrated an inverse adaptive noise shaping filter 780.
  • the inverse adaptive noise shaping filter 780 may be, for example, a low-order all pole linear prediction filter.
  • the inverse adaptive noise shaping filter 780 is an all-pole adaptive noise shaping filter which restores the spectrum of the signal using the using the same coefficients used by a corresponding adaptive noise shaping filter of a corresponding encoder ( e.g ., the adaptive noise shaping filter 480 of Figure 4 ) as the coefficients of the all-pole filter.
  • This information may be conveyed in the bitstream and provided to the inverse adaptive noise shaping filter 780 by the disassembler 785.
  • the setting and synchronization information may be provided periodically, such as once for every 512 sample block.
  • the inverse adaptive noise shaping filter control information may be implicit in the code words of the bit stream, for example, as discussed above with reference to Figure 4 .
  • the output of the inverse adaptive noise shaping filter 780 is according to the invention filtered by a low-pass filter 775. This facilitates removing high-frequency energy restored when the original spectrum of the signal is restored by the inverse adaptive noise shaping filter 780.
  • the low-pass filter 775 of the decoder 700 may employ the same coefficients used by a corresponding low-pass filter of an encoder ( e.g ., the low-pass filter 475 of Figure 4 ).
  • the output of the predictor circuit 738 provides the prediction signal to the encoder (see the prediction signal provided to the negative input 414 of the adder 410 of Figure 4 ).
  • the inverse quantizer 734, the inverse quantizer step and average bit rate control circuit 740 and the predictor circuit 738 may typically operate in a similar manner to the corresponding components of an encoder, such as the encoder 400 of Figure 4 .
  • having the corresponding components operate in a similar manner in the encoder 400 and the decoder 700 facilitates using the quantized signal to generate the prediction signal and to control the step size and average bit rate in both the encoder 400 and the decoder 700, without needing to exchange additional control signals between the encoder 400 and the decoder 700.
  • a system including an embodiment of the encoder 400 and an embodiment of the decoder 700 may operate using the same control parameters for the corresponding components ( e.g ., using the same filter coefficients).
  • the decoder 700 of Figure 7 comprises one or more processors or processor cores P, one or more memories M, and discrete circuitry DC, which may be used alone or in various combinations to implement the functionality of the decoder 700.
  • the components of the decoder 700 of Figure 7 are illustrated as separate components, the various components may be combined (e.g ., the inverse quantizer step and average rate control circuit 740 may be integrated into the inverse quantizer 734 in some embodiments) or split into additional components (e.g ., the predictor circuit 738 may be split into separate components, such as filters, adders, buffers, look-up tables, etc.) and various combinations thereof.
  • FIG 8 is a functional block diagram of an embodiment of a quantizer step size and average rate control circuit 840, which may be employed, for example, in the embodiment of the encoder 400 of Figure 4 as the quantizer step size and average bit rate control circuit 440, or in the embodiment of the decoder 700 of Figure 7 as the inverse quantizer step size and average bit rate control circuit 740.
  • the quantizer step size and average bit rate control circuit 840 comprises a multiplier 852, which receives a current quantized signal word c n and an inverse of a loading factor L factor , and a log multiplier selector 842 which selects a log multiplier based on the current quantized signal word and the loading factor.
  • the current quantized signal word is a word output by variable rate adaptive quantizer 820.
  • the current quantized signal word may be included in a bit stream being decoded by a decoder (see Figure 7 ).
  • the log multiplier selector 842 may select a log multiplier based on historical data, such as previous quantized signal words, and may comprise a look-up table LUT, which may be updatable, for example, based on historical data, in a update download, etc.
  • the log multiplier selector 842 may select a log multiplier based on statistical probabilities based on current and previous quantized signal words.
  • the quantized step size and average bit rate control circuit 840 comprises an adder 844 which receives at a first positive input the selected log multiplier, and provides an output to a delay circuit 846.
  • the output of the delay circuit 846 is provided to a multiplier 848 and to an exponential circuit 850.
  • the multiplier 848 multiplies the output of the delay circuit 846 by a scaling or leakage factor ⁇ , which may typically be close to and less than 1, and provides the result to a second positive input of the adder 844.
  • the leakage factor may typically be a constant, but may be variable in some embodiments, for example, based on the previous step size control signal or other historical data.
  • the selection of a scaling factor ⁇ as close to and less than 1 facilitates reducing the impact of selection of an incorrect step size, for example due to a transmission error, as the introduced error will decay away.
  • the exponential circuit 850 in operation, generates a step-size control signal based on the output of the delay circuit 846.
  • the step-size and average bit rate control signal is provided to a variable rate adaptive quantizer 820 and to an inverse quantizer 834.
  • the quantizer step size and average bit rate control circuit 840 operates in a logarithmic manner, which may simplify the calculations. Some embodiments may operate in a linear manner, and may, for example, employ a multiplier instead of the adder 844, and an exponential circuit instead of the multiplier 846, etc.
  • the step-size and average bit rate control circuit as illustrated operates in a logarithmic manner, and the step sizes selected based on the step size control signal vary in an exponential manner.
  • the quantizer step size and average bit rate control circuit 840 may operate in accordance with equations 3 or equation 4, and select log multiplier values to populate the look-up tables as discussed above in more detail with reference to Figures 4 and 6 .
  • Figure 8 comprises one or more processors P, one or more memories M, and discrete circuitry DC, which may be used alone or in various combinations to implement the functionality of the quantizer step size and average bit rate control circuit 840.
  • the illustrated components such as adders, multiplier, etc., may be implemented in various ways, such as, using discrete circuitry, executing instructions stored in a memory, using look-up tables, etc., and various combinations thereof.
  • Figure 9 illustrates an embodiment of a method 900 of generating code words from an audio signal and controlling changes in quantizer step sizes and average bit rate that may be employed, for example, by the encoder 400 of Figure 4 when escape coding is employed.
  • the method starts at 902 and proceeds to 904.
  • the encoder 400 collects a block of audio samples and proceeds to 906.
  • the encoder 400 processes a sample of each channel. Parallel processing of the samples of the channels may be employed.
  • the adaptive quantizer 420 determines whether the channel has an audio sample to be processed. If the channel has an audio sample, the method 900 proceeds from 906a to 908.
  • the coder 450 determines whether a quantized sample has a corresponding symbol in a code book, as illustrated, a Huffman code book. When it is determined that the quantized sample has a corresponding symbol in the code book, the method proceeds from 908 to 910.
  • the coder 450 writes the corresponding symbol into the bitstream. The method 900 proceeds from 910 to 914.
  • the method 900 proceeds from 908 to 912.
  • the coder writes an embed escape code and a quantized sample value into the bitstream, as illustrated an embed escape code followed by a 16 bit quantized sample value.
  • Other methods of transmitting a quantized sample value without a corresponding code word in the code book may be employed, as discussed in more detail above. The method proceeds from 912 to 914.
  • the step-size and average bit rate control circuit 440 updates the step size control signal for the corresponding channel, as discussed in more detail above. For example, the equations 1, 3 and 4 may be employed.
  • the method 900 proceeds from 914 to 906 to process the next sample for the channel.
  • the adaptive quantizer determines whether the channel had audio data, but has no more samples in the block to be processed. For example, a channel may have ended prematurely.
  • the method 900 proceeds from 906b to 916.
  • the coder 450 writes an end-of-channel escape code into the bitstream and processing of the channel in the current block terminates. The method 900 proceeds from 916 to 906.
  • the encoder 400 determines whether all the audio data in the block for all of the channels has been processed. When it is determined at 906c that all the audio data in the block has been processed, the method 900 proceeds from 906c to 918. At 918, the encoder 400 determines whether there is more data to start a new block. When it is determined at 918 that there is more data to start a new block, the method 900 proceeds from 918 to 904, where the next block of audio samples is processed. When it is not determined at 918 that there is data to start a new block, the method proceeds to 920. At 920, the coder 450 writes an end of stream escape code into the bit stream. The method proceeds from 920 to 930, where processing of the audio signal terminates.
  • an encoder 400 may perform other acts not shown in Figure 9 , may not perform all of the acts shown in Figure 9 , or may perform the acts of Figure 9 in a different order.
  • Figure 10 illustrates an embodiment of a method 1000 of generating a quantized signal value from a code word that may be employed, for example, by the decoder 700 of Figure 7 when escape coding is employed.
  • the method 1000 may process code words for multiple channels of a signal in parallel. For convenience, the method 1000 will be described with reference to the decoder 700 of Figure 7 .
  • the method starts at 1002 and proceeds to 1004.
  • the decoding circuitry 750 receives a code word (or code words when multiple channels are being processed in parallel) and proceeds to 1006.
  • the decoding circuitry 750 determines whether the code word (symbol) has a corresponding quantized sample value in a code book, such as a Huffman code book. When it is determined that the code word (symbol) has a corresponding quantized sample value in a code book, the method 1000 proceeds from 1006 to 1008, where the corresponding quantized sample value is output by the decoding circuitry 750 as the current quantized signal value c n . The method 1000 proceeds from 1008 to 1004 to process the next code word of the channel (and code words of other channels of the coded signal). When it is not determined at 1006 that the code word (symbol) has a corresponding quantized sample value in a code book, the method 1000 proceeds from 1006 to 1010.
  • the decoding circuitry 750 determines whether the code word is an embed escape code. When it is determined at 1010 that the code word is an embed escape code, the method 1000 proceeds from 1010 to 1012, where the next code word of the channel is output by the decoding circuitry 750 as the current quantized signal value c n . The method 1000 proceeds from 1012 to 1004 to process the next code word of the channel (and code words of other channels of the coded signal). When it is not determined at 1010 that the code word is an embed escape code, the method 1000 proceeds from 1010 to 1014.
  • the decoding circuitry 750 determines whether the code word is an end of channel escape code. When it is determined at 1014 that the code word is an end of channel escape code, the method 1000 proceeds from 1014 to 1016, where processing of the signal channel is terminated. The method 1000 proceeds from 1016 to 1004 to process the next code word of the remaining channels of the signal. When it is not determined at 1014 that the code word is an end of channel escape code, the method 1000 proceeds from 1014 to 1018.
  • the decoding circuitry 750 determines whether the code word is an end of signal escape code. When it is determined at 1018 that the code word is an end of signal escape code, the method 1000 proceeds from 1018 to 1020, where processing of the signal is terminated. The method 1000 proceeds from 1020 to 1022 where the method 1000 terminates. When it is not determined at 1018 that the code word is an end of signal escape code, the method 1000 proceeds from 1018 to 1004 to process the next code word (or block) of the channel (and code words of other channels of the coded signal).
  • Some embodiments of a decoder 700 may perform other acts not shown in Figure 10 , may not perform all of the acts shown in Figure 10 , or may perform the acts of Figure 10 in a different order.
  • a computer readable medium comprising a computer program adapted to perform one or more of the methods or functions described above.
  • the medium may be a physical storage medium, such as for example a Read Only Memory (ROM) chip, or a disk such as a Digital Versatile Disk (DVD-ROM), Compact Disk (CD-ROM), a hard disk, a memory, a network, or a portable media article to be read by an appropriate drive or via an appropriate connection, including as encoded in one or more barcodes or other related codes stored on one or more such computer-readable mediums and being readable by an appropriate reader device.
  • ROM Read Only Memory
  • DVD-ROM Digital Versatile Disk
  • CD-ROM Compact Disk
  • some or all of the methods and/or functionality may be implemented or provided in other manners, such as at least partially in firmware and/or hardware, including, but not limited to, one or more application-specific integrated circuits (ASICs), digital signal processors, discrete circuitry, logic gates, standard integrated circuits, controllers ( e.g ., by executing appropriate instructions, and including microcontrollers and/or embedded controllers), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), etc., as well as devices that employ RFID technology, and various combinations thereof.
  • ASICs application-specific integrated circuits
  • DSPs digital signal processors
  • discrete circuitry e.g ., digital signal processors
  • logic gates e.g., logic gates
  • standard integrated circuits e.g ., controllers (e.g ., by executing appropriate instructions, and including microcontrollers and/or embedded controllers), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), etc

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Claims (15)

  1. Appareil, comprenant :
    un filtre passe-bas présentant des coefficients de filtrage déterminés et configuré de manière à filtrer un signal audio d'entrée ;
    un codeur configuré de manière à coder le signal audio d'entrée filtré en utilisant une boucle de rétroaction, l'étape de codage incluant les étapes ci-dessous consistant à :
    générer un signal quantifié sur la base d'un signal de différence en utilisant un quantificateur adaptatif ;
    générer, par le biais d'un décodeur, un signal de rétroaction, sur la base du signal quantifié, en utilisant un quantificateur inverse et un circuit de prédiction, le circuit de prédiction présentant des paramètres de commande déterminés basés sur une réponse en fréquence du filtre passe-bas ; et
    générer le signal de différence sur la base du signal de rétroaction et du signal audio d'entrée filtré.
  2. Appareil selon la revendication 1, dans lequel les coefficients de filtrage déterminés du filtre passe-bas sont des coefficients de filtrage fixes du filtre passe-bas, le circuit de prédiction comprend un filtre non récursif (FIR) et les paramètres de commande déterminés du circuit de prédiction comprennent des coefficients de filtrage fixes du filtre FIR.
  3. Appareil selon la revendication 1, dans lequel le codeur inclut un montage de circuits de codage configuré de manière à générer des mots de code sur la base de mots de signaux quantifiés générés par le quantificateur adaptatif.
  4. Appareil selon la revendication 3, dans lequel le montage de circuits de codage est configuré de manière à générer un code d'échappement en réponse à au moins l'un des éléments suivants :
    un mot de signal quantifié qui n'est pas associé à un mot de code de codage correspondant ;
    une fin d'un canal de signal d'un signal à coder ; et
    une fin du signal à coder.
  5. Appareil selon la revendication 3, dans lequel le montage de circuits de codage est configuré de manière à utiliser un codage de Huffman en vue de générer les mots de code.
  6. Appareil selon la revendication 1, dans lequel le quantificateur adaptatif est un quantificateur à débit variable.
  7. Appareil selon la revendication 6, dans lequel une taille de pas et un débit binaire des signaux quantifiés générés par le quantificateur adaptatif sont variables.
  8. Appareil selon la revendication 6, dans lequel le quantificateur adaptatif est configuré de manière à commander une taille de pas selon l'équation ci-dessous : dn + 1 = β dn + m cn / Lfactor ,
    Figure imgb0009
     où « cn » est un mot de signal quantifié en cours, « dn » correspond à une taille de pas en cours dans un domaine logarithmique, «Lfactor» est un facteur de charge, « m(cn/Lfactor) » est un multiplicateur logarithmique sélectionné sur la base du signal quantifié en cours « cn » et du facteur de charge « Lfactor », « β » est un coefficient de fuite, et « dn+1 » correspond à une taille de pas dans le domaine logarithmique à appliquer à un mot de signal quantifié successif « cn+1 ».
  9. Appareil selon la revendication 6, dans lequel le quantificateur adaptatif est configuré de manière à commander une taille de pas selon l'équation ci-dessous : dn + 1 = max β dn + m cn / Lfactor , dmin ,
    Figure imgb0010
     où « cn » est un mot de signal quantifié en cours, « dn » correspond à une taille de pas en cours dans un domaine logarithmique, « Lfactor » est un facteur de charge, « m(cn/Lfactor) » est un multiplicateur logarithmique sélectionné sur la base du signal quantifié en cours « cn » et du facteur de charge « Lfactor », « β » est un coefficient de fuite, « dmin » est une taille de pas de seuil dans le domaine logarithmique, et « dn+1 » correspond à une taille de pas dans le domaine logarithmique à appliquer à un mot de signal quantifié successif « cn+1 ».
  10. Procédé, comprenant les étapes ci-dessous consistant à :
    filtrer un signal audio d'entrée, l'étape de filtrage incluant l'étape consistant à utiliser un filtre passe-bas présentant des coefficients de filtrage déterminés ; et
    coder le signal audio d'entrée filtré, en utilisant une boucle de rétroaction, l'étape de codage comprenant les étapes ci-dessous consistant à :
    générer un signal quantifié sur la base d'un signal de différence en utilisant un quantificateur adaptatif ;
    générer un signal de rétroaction, sur la base du signal quantifié, en utilisant un quantificateur inverse et un circuit de prédiction présentant des paramètres de commande déterminés basés sur une réponse en fréquence du filtre passe-bas ; et
    générer le signal de différence sur la base du signal de rétroaction et du signal audio d'entrée filtré.
  11. Appareil, comprenant :
    un décodeur configuré de manière à générer des signaux audio décodés sur la base de signaux quantifiés, le décodeur incluant :
    un quantificateur inverse configuré de manière à quantifier inversement les signaux quantifiés ; et
    un circuit de prédiction configuré de manière à générer des signaux de prédiction sur la base des signaux quantifiés inverses, l'appareil comprenant en outre :
    un filtre passe-bas présentant des coefficients de filtrage déterminés et configuré de manière à filtrer les signaux audio décodés, dans lequel le circuit de prédiction présente des paramètres de commande déterminés basés sur une réponse en fréquence du filtre passe-bas.
  12. Appareil selon la revendication 11, dans lequel le décodeur inclut un montage de circuits de décodage configuré de manière à générer des mots de signaux quantifiés sur la base de mots de code dans un train de bits reçu par le décodeur.
  13. Procédé, comprenant les étapes ci-dessous consistant à :
    décoder un signal audio codé, sur la base d'un signal quantifié, en utilisant une boucle de rétroaction, en vue de générer un signal audio décodé, l'étape de décodage comprenant les étapes ci-dessous consistant à :
    mettre en œuvre une quantification inverse du signal quantifié en utilisant un quantificateur inverse ; et
    générer un signal de prédiction sur la base du signal quantifié inverse, en utilisant un circuit de prédiction, le procédé comprenant en outre l'étape ci-dessous consistant à :
    filtrer le signal audio décodé en utilisant un filtre passe-bas présentant des coefficients de filtrage déterminés, dans lequel le circuit de prédiction présente des paramètres de commande déterminés basés sur une réponse en fréquence du filtre passe-bas.
  14. Procédé selon la revendication 13, comprenant l'étape consistant à générer des mots de signaux quantifiés sur la base de mots de code inclus dans un train de bits du signal codé.
  15. Procédé selon la revendication 14, comprenant l'étape consistant à utiliser un codage d'échappement en vue de générer les mots de signaux quantifiés sur la base des mots de code.
EP17724255.9A 2016-05-10 2017-05-09 Procédé de codec audio adaptatif et appareil Active EP3455854B1 (fr)

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US15/151,220 US10756755B2 (en) 2016-05-10 2016-05-10 Adaptive audio codec system, method and article
US15/151,211 US20170330575A1 (en) 2016-05-10 2016-05-10 Adaptive audio codec system, method and article
US15/151,200 US10770088B2 (en) 2016-05-10 2016-05-10 Adaptive audio decoder system, method and article
US15/151,109 US10699725B2 (en) 2016-05-10 2016-05-10 Adaptive audio encoder system, method and article
PCT/US2017/031735 WO2017196833A1 (fr) 2016-05-10 2017-05-09 Système de codec audio adaptatif, procédé, appareil et support

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