EP3391544A1 - Convertisseur de données intégré extensible - Google Patents

Convertisseur de données intégré extensible

Info

Publication number
EP3391544A1
EP3391544A1 EP16876909.9A EP16876909A EP3391544A1 EP 3391544 A1 EP3391544 A1 EP 3391544A1 EP 16876909 A EP16876909 A EP 16876909A EP 3391544 A1 EP3391544 A1 EP 3391544A1
Authority
EP
European Patent Office
Prior art keywords
voltage
bit
analog
differential
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP16876909.9A
Other languages
German (de)
English (en)
Other versions
EP3391544A4 (fr
Inventor
Susan Marya SCHOBER
Robert C. Schober
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Circuit Seed LLC
Original Assignee
Circuit Seed LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US201562268983P priority Critical
Priority to PCT/US2016/044770 priority patent/WO2017019973A1/fr
Application filed by Circuit Seed LLC filed Critical Circuit Seed LLC
Priority to PCT/US2016/067529 priority patent/WO2017106835A1/fr
Publication of EP3391544A1 publication Critical patent/EP3391544A1/fr
Publication of EP3391544A4 publication Critical patent/EP3391544A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/0607Offset or drift compensation
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/80Simultaneous conversion using weighted impedances
    • H03M1/802Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages

Abstract

La présente invention concerne un convertisseur de données intégré, en particulier des convertisseurs analogiques/numériques (ADC) et des convertisseurs numériques/analogiques (DAC), utilisant une approche à base de charge. Des paires complémentaires de transistors à effet de champ en cours sont utilisées pour former des amplificateurs destinés à former des ADC et des DAC extensibles, comprenant des convertisseurs de données à approximations successives (ADC et DAC), et des convertisseurs de données pipeline (ADC et DAC).
EP16876909.9A 2015-07-30 2016-12-19 Convertisseur de données intégré extensible Withdrawn EP3391544A4 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US201562268983P true 2015-12-17 2015-12-17
PCT/US2016/044770 WO2017019973A1 (fr) 2015-07-30 2016-07-29 Amplificateurs à transistors à effet de champ à étages multiples et courant complémentaire à compensation prédictive
PCT/US2016/067529 WO2017106835A1 (fr) 2015-12-17 2016-12-19 Convertisseur de données intégré extensible

Publications (2)

Publication Number Publication Date
EP3391544A1 true EP3391544A1 (fr) 2018-10-24
EP3391544A4 EP3391544A4 (fr) 2019-12-18

Family

ID=59057712

Family Applications (1)

Application Number Title Priority Date Filing Date
EP16876909.9A Withdrawn EP3391544A4 (fr) 2015-07-30 2016-12-19 Convertisseur de données intégré extensible

Country Status (4)

Country Link
EP (1) EP3391544A4 (fr)
JP (2) JP6690015B2 (fr)
CN (1) CN108702155A (fr)
WO (1) WO2017106835A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210126647A1 (en) * 2019-10-24 2021-04-29 Mediatek Inc. Multiplying digital-to-analog converter with pre-sampling and associated pipelined analog-to-digital converter

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081218A (en) * 1998-01-30 2000-06-27 Lucent Technologies, Inc. Five-level switched-capacitor DAC, method of operation thereof and sigma-delta converter employing the same
US6784824B1 (en) * 2002-08-29 2004-08-31 Xilinx, Inc. Analog-to-digital converter which is substantially independent of capacitor mismatch
US7199743B2 (en) * 2004-12-29 2007-04-03 Intel Corporation Cyclic digital to analog converter
US7511648B2 (en) * 2007-04-23 2009-03-31 Texas Instruments Incorporated Integrating/SAR ADC and method with low integrator swing and low complexity
US8912940B2 (en) * 2012-11-14 2014-12-16 Analog Devices Technology String DAC charge boost system and method

Also Published As

Publication number Publication date
JP2019504585A (ja) 2019-02-14
JP6690015B2 (ja) 2020-04-28
JP2020115577A (ja) 2020-07-30
CN108702155A (zh) 2018-10-23
WO2017106835A1 (fr) 2017-06-22
EP3391544A4 (fr) 2019-12-18

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