EP3304598A1 - Capteur optique - Google Patents
Capteur optiqueInfo
- Publication number
- EP3304598A1 EP3304598A1 EP16727426.5A EP16727426A EP3304598A1 EP 3304598 A1 EP3304598 A1 EP 3304598A1 EP 16727426 A EP16727426 A EP 16727426A EP 3304598 A1 EP3304598 A1 EP 3304598A1
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- European Patent Office
- Prior art keywords
- photodiode
- charge
- transistor
- sensor according
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14641—Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14681—Bipolar transistor imagers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
- H04N25/571—Control of the dynamic range involving a non-linear response
- H04N25/573—Control of the dynamic range involving a non-linear response the logarithmic type
Definitions
- this type of pixel comprises, as illustrated in FIG. 1, a buried photodiode PD which collects electrical charges induced by incident light radiation and a transfer transistor TX to read the charge thus collected.
- the transfer transistor has one of its terminals which contacts the photodiode and makes it possible to transfer the charge collected by the photodiode to another receiving device such as a capacitive node FD, either for reading or for storage therein .
- the buried photodiode is typically composed of an N doping in a P-type substrate, covered with a thin doping layer on its surface (also called “pinning layer”), also of the P type, often of high concentration, so that the ZCE space charge zone does not come into contact with the silicon surface where defects of all kinds are concentrated.
- FIG. 2 represents the widespread structure of a 4-transistors pixel or 4T pixel.
- the transfer transistor TX is connected to a capacitive node formed by a floating diffusion FD (in English "floating diffusion").
- the capacitive node FD is pre-charged to an initial voltage via a reset transistor called “reset transistor” RST controlled by a voltage slot VRST.
- a first reading of the voltage of the capacitive node FD is made by means of the signal COL after this reset operation.
- a second reading is made after activation by the TX signal of the TX transfer transistor. The difference between these two readings is representative of the quantity of charges transferred from the buried photodiode to the capacitive node FD.
- This differential reading makes it possible to eliminate the noise induced by the action of the reset transistor RST on the capacitive node, referred to as KTC noise.
- a SEL signal is applied to a selection transistor SEL during playback.
- the electron induced voltage on the capacitive node FD is defined as the conversion gain.
- a conversion gain of 160 ⁇ / e is obtained. This gain goes down to ⁇ / e when the capacitance is increased to lOfF.
- the read transistor within the pixel and the read circuit generate a read noise whose impact is inversely proportional to the conversion gain. For example, for a reading noise of 320 ⁇ , a conversion gain of ⁇ / e gives a noise equivalent to 2 electrons, but a conversion gain of ⁇ / e gives a noise of 20 electrons.
- the ratio of FWC capacity to read noise defines the Dynamic Range (DR).
- DR Dynamic Range
- For a capacitance of the capacitive node FD of IfF, DR 6250/2 is 70 dB.
- the second which results from the researches of the plaintiff, is based on the use of a photodiode without polarization, the voltage generated by the photodiode then being naturally a logarithm of light intensity as in a solar cell.
- the application WO 2014/064274 describes a combination of two pixels, one linear whose photodiode is in integration mode, and the other logarithmic where the photodiode is in photovoltaic mode. Due to the use of two types of photodiodes, such a structure is relatively complex and expensive on the surface.
- the application EP 1 265 291 relates to a CMOS image sensor where each pixel comprises at least one MOS transistor connected in series by its drain or source to the cathode of a photodiode, and this transistor is configured in such a way that it works at least partially in weak inversion.
- the response of the pixel is of linear type. Beyond this level of illumination, the response of the pixel then becomes logarithmic.
- a transistor sampling-blocking allows the reading of the electric charge generated by the photodiode.
- the present invention thus aims to overcome all or some of the drawbacks of existing pixel structures and to propose a pixel structure having a non-linear response allowing both good sensitivity and great dynamics, in an extended temperature range.
- the photoelectric charge that forms within the photodiode can be partially discharged by the conversion element, so that the amount of photoelectric charge that effectively accumulates within the photodiode following the arrival of photons can follow a nonlinear progression, at least starting from a certain level of accumulated charge.
- the non-linear relationship is a linear progression at low light levels and then a logarithmic progression at higher light levels.
- the answer is obtained by the accumulation of photoelectrons during the exposure time; the initial linear portion of the response allows good electron photo collection to improve sensitivity to low light levels.
- the response gradually changes to logarithmic mode thanks to the conversion element according to the invention, which generates a greater leakage of these electrons out of the photodiode. This logarithmic response portion is used to compress the signal and create a wider operating dynamics.
- the conversion element preferably has a nonlinear conductivity dependent on at least one control signal applied thereto.
- the conversion element may be a MOS transistor, the control signal or signals being applied to the gate and / or the drain of the transistor.
- the conversion element is a bipolar transistor
- the conversion element is a gate or virtual base transistor whose potential is reduced to that of the substrate by construction.
- the control signal may be the drain or collector voltage.
- said at least one control signal is temperature dependent.
- the invention then makes it possible to compensate for the variation of the response of the sensor as a function of the temperature, by controlling the electrical properties of the conversion element as a function of the temperature, in particular its electrical conductivity.
- the sensor advantageously comprises at least one reference pixel having the same structure as the illuminated pixel or pixels, but protected from the incident light and receiving an injection of charges simulating an illumination condition and the generation of the photoelectric charge by the photodiode.
- the control signal may be slaved to an output signal of the reference pixel or a group of reference pixels to maintain the output of the reference pixel or reference pixel group at a constant value when the temperature varies.
- the same control signal thus determined can be sent to all the pixels of the sensor. It is thus possible to compensate for the influence of the temperature on the response of the active pixels by such a regulation loop.
- the control signal may be dependent on the nature of the illumination, for example flash light or non-pulsed light, since it controls via the conversion element the photoelectric charge formation intensity from which the progress the voltage of the photodiode goes from linear to nonlinear.
- the linear to non-linear transition of the voltage progression can be shifted so as to have the widest possible range of linear progression.
- the photodiode is preferably buried.
- the pixel is made such that the residual charge is zero after the transfer reading.
- the conversion element may be a transistor formed by a doped zone constituting the drain, with preferably a confinement doping under this drain zone and a surface doping ("pinning layer") of the photodiode extending on the surface of the substrate in the direction of the drain zone, without however covering the entire channel.
- the control signal may be applied to the drain of the conversion transistor, the drain of the transistor being formed by buried doping extending to a depth greater than or equal to that of reading transistors of the pixel, in particular the selection transistor SEL. This arrangement reinforces the DIBL phenomenon and facilitates the control of the conversion element by the drain voltage.
- the conversion transistor may include a buried drain or collector extending within the substrate beneath the photodiode.
- This buried drain or collector may be common to several pixels of the sensor, or even to all the pixels, all the drains being fused into a single layer. This simplifies the manufacture of the sensor.
- the photodiode above the buried drain can also be seen as constituting the emitter of a bipolar transistor.
- the photodiode is illuminated by the rear face of the substrate.
- the doped zone corresponding to the cathode of the photodiode may extend below the doped zone corresponding to the drain of the transistor.
- the doped surface area of the photodiode may extend beyond the doped zone corresponding to the cathode of the photodiode.
- the charge transfer element may be a MOS transistor or a bipolar transistor exploiting an extreme DIBL phenomenon called Punch Through (or PT), with a sufficiently high voltage on the drain to pull electrons from the source (doped zone of the photodiode).
- the charge transfer element may comprise a transfer channel triggered by DIBL.
- the subject of the invention is also a method for temperature compensation of a sensor according to the invention, in which said at least one said control signal is acted upon to compensate for the influence of the temperature.
- said at least one said control signal is acted upon to compensate for the influence of the temperature.
- the temperature modulates the ease of leakage of electrons from the photodiode. If the temperature increases, the electrons flee more easily, the logarithmic response arrives earlier. Conversely, when the temperature decreases, the logarithmic response arrives later.
- a control loop may be used, associated with one or more reference pixels, to maintain the at least one control signal at a level to compensate for the influence of the temperature.
- the reference pixel or pixels are preferably pixels that receive said at least one control signal but in which the illumination is simulated by injecting a current corresponding to a certain level of illumination, this reference pixel or pixels being masked from the incident light.
- the modulation of the control of the conversion element tends to keep the response of the reference pixel (s) unchanged.
- the same control as that applied to the reference pixel (s) is applied to the active pixels exposed to light for imaging.
- FIGS. 1 to 4 previously described, illustrate the state of the art
- FIG. 5 is an electronic diagram of a pixel according to the invention
- FIG. 6 illustrates the use of a CMOS transistor to produce the non-linear conversion element
- FIGS. 8 and 9 illustrate the charge stored in the photodiode corresponding to two different Vpin voltages
- FIG. 10 illustrates the evolution of the response of the charge Q PD of a pixel as a function of the variation of the gate voltage V G OR of the voltage Vpin,
- FIGS. 11 and 12 are views similar to FIGS. 8 and 9, but corresponding to two different operating temperatures of the pixel
- FIG. 13 illustrates the variation of the response of a pixel as a function of temperature
- FIG. 15 illustrates the variation of the response of the sensor as a function of the gate voltage V G
- FIG. 16 illustrates the injection of a current into a reference pixel
- FIG. 17 represents an example of processing the signals coming from the reference pixels of the sensor by means of a regulation loop
- FIGS. 21 to 27 show exemplary embodiments of pixel structures
- FIG. 29 illustrates the possibility of associating several photodiodes with the same capacitive node
- FIG. 30 illustrates the possibility of producing a buffer structure in a pixel
- FIG. 31 represents an example of an optical sensor according to the invention.
- FIG. 31 represents an example of a sensor 100 according to the invention.
- This sensor 100 conventionally comprises a matrix (N lines and M columns) of active pixels 10 and one or more reference pixels 10 'protected from the incident light.
- the pixel or pixels 10 ' are identical to the active pixels 10, apart from the fact that they are protected from the incident light, and that a non-zero level of illumination is simulated by injection of a current, as explained more far.
- the sensor 100 may comprise means for addressing the pixels, such as a line controller 101 and read circuits 102 and column scan 103, in a conventional manner, as well as an interface circuit 105.
- the controller line 101 generates control signals for each selected line. For each selected line, the timing diagram of Figure 2 can be applied.
- the output assembly of this selected line enters the read circuit 102 where the double reads are processed.
- This circuit is controlled by the column scanning circuit for reading the pixels.
- the read circuit may be either analog or digital where an analog-to-digital conversion is incorporated.
- the sensor may comprise a circuit 106 for temperature compensation.
- the pixel or group of reference pixels 10 'receives the same control signals and generates an output signal which is processed in the compensation circuit by comparing with a predefined reference level.
- This circuit generates a control signal to all the pixels, including the reference pixel or pixels, in order to compensate for the variation of response of the pixel as a function of the temperature, as will be explained in more detail later.
- a fixed electrical signal is applied to the pixels in the array.
- the example of such a case is a sensor mounted on a TEC (thermal electric cooler) regulated temperature.
- This fixed control signal aims for example to maintain a linear progression to the response of the sensor at low light levels, depending on the intended applications.
- the invention is not limited to a particular number of pixels nor to an arrangement of pixels in matrix form; pixels can be reduced to one line; at the limit, the sensor may have only one active pixel.
- FIG. 5 schematically represents an exemplary pixel 10 of an optical sensor according to the invention.
- This pixel 10 comprises a photodiode 11, preferably buried, which is connected to a non-linear current-voltage conversion element 12, preferably having a current-voltage relationship close to a logarithmic function, in particular to strong illuminations in order to generate a non-linear voltage on the cathode 13 of the photodiode.
- a charge transfer device 14 to a load receiving device 15 provides access to the charge stored in the photodiode, representative of the light exposure level of the photodiode.
- the nonlinear conversion element 12 may be controlled by an electrical signal from a non-apparent control circuit in FIG. 5, as produced by the circuit 106 mentioned above, this electrical signal preferably being a function of the temperature so as to compensate for its influence but may also result from a voluntary programming.
- This control circuit is preferably integrated on the same chip as the pixels.
- a MOS transistor constitutes the non-linear conversion element 12 and the charge transfer device 14 is also constituted by a MOS transistor.
- the photo-current generated by the photodiode is very small.
- a photodiode of ⁇ by ⁇ generates only about 10nA with a direct illumination of 100 Klux.
- the non-linear conversion transistor 12 operates in sub-threshold mode ("subthreshold" in English).
- the drain current I D can then be expressed by the following equation:
- V G denotes the gate voltage of the conversion element
- Vs the voltage of the source
- V D the drain voltage
- V T kT / q
- k the Bolzmann constant
- T the absolute temperature.
- ⁇ is a constant slightly greater than 1.
- the capacitive node FD Before reading the charge of the photodiode, the capacitive node FD is preloaded at an initial voltage higher than the voltage Vpin of the photodiode.
- the transfer transistor TX is then actuated.
- the capacitive node FD Part of the charge stored in the junction of the photodiode is transferred to the capacitive node FD via this transfer transistor TX.
- the voltage of the photodiode increases and that of the capacitive node FD decreases until an equilibrium is reached.
- the variation of the voltage of the capacitive node FD informs about the amount of charge transferred from the photodiode to the capacitive node FD.
- the initial voltage of the capacitive node FD is sufficiently high so that the voltage on the photodiode can reach the voltage V p i n at the end of the transfer. In this case, the transfer is total and the photodiode is completely emptied of moving charges.
- the voltage on the gate of the conversion MOS transistor can be chosen so that when the voltage V p i n is reached, the current in the conversion MOS transistor is very low, and ideally generates less than one electron with the exposure time. used. After a full charge transfer has taken place, a new acquisition cycle can begin.
- the charge-receiving device is a buffer structure PD2 having the same structure as the buried photodiode PD1 and acting as a charge memory, being protected from the incident light by a mask 210.
- This buffer structure PD2 is produced with a voltage V p i n higher than that of the photodiode PDl, so as to allow the flow of the charge from the photodiode PD1 to the buffer structure PD2. It may be smaller in size than the photodiode it receives the charge because it does not have to generate photoelectric current.
- the thermal dependence of the pixel response of the present invention is from V T , IO and Idark.
- FIG. 15 illustrates a possibility of implementing a compensation of the temperature, by using one or more reference pixels, masked by a layer opaque to light, such as a layer of metal for example, such as the one or more 10 'pixels above.
- an electric current is injected into the photodiode (s) of these reference pixels by simulating the photoelectric current. This current is strong enough for this reference pixel (s) to work in logarithmic mode.
- a reference level is created at a certain level of illumination by electrically simulating this illumination on the reference pixel or pixels. This avoids the disadvantages associated with the incidence on the reference signal of the stray light, which is relatively lower at a high level of illumination.
- the injected current simulates, for example, an illumination level of at least 10,000 lux.
- the compensation is carried out using a temperature probe which supplies the temperature to a circuit comprising a controller provided with a memory in which a correspondence table is recorded which generates directly for each temperature value a corresponding value for the control signal, for example the gate voltage V G of the conversion transistor in the example which has just been described with reference to FIG. 6.
- the correspondence table can be obtained in advance by a phase of FIG. calibration.
- the reference pixel or pixels are advantageously used to effect a compensation of the temperature.
- the conversion element can be realized in multiple ways, in MOS or bipolar structure.
- the conversion element involves in its design, particularly when it is a MOS transistor, the so-called DIBL phenomenon (Drain Induced Barrier Lowering), which can be quite pronounced in a short-channel MOS transistor.
- DIBL Drain Induced Barrier Lowering
- This same phenomenon is also observed in a BJT transistor when the base is weakly doped, for example less than 10 17 atoms per cm 3 .
- This phenomenon is an electrostatic influence of the drain on the source.
- a higher voltage drain facilitates the output of electrons from the source.
- the increase of the drain voltage V D is equivalent to an increase of the gate voltage V G with the same drain voltage.
- DIBL modulates the current Io in a MOS transistor under threshold.
- the doping of the substrate under the gate at a level of between 10 14 and 10 17 atoms per cm 3 and to increase the depth of the substrate.
- doping for the drain for example to the same value (to 30%) as the length of the channel, without reducing the channel length too much, the depth thus being for example between 0.25 micron and 2 microns.
- the advantage of this approach using the DIBL phenomenon is the possibility of putting a fixed voltage on the gate and creating the compensation by modulating the drain voltage of the conversion transistor.
- a gate biased at 0V is advantageously replaced by a thin layer 10 of high doping type P at the surface, in contact with the substrate P as illustrated in FIG. 19, for a P-type substrate in which in the cathode of the photodiode is constituted by N. doping.
- the virtual grid thus formed does not suffer from a dispersion of the threshold voltage induced by the charge trapped in the oxide of the gate as in a conventional transistor.
- a sufficiently strong doping is preferable, for example greater than 10 17 atoms per cm 3 in order to make the Fermi level stable on the surface and also to eliminate the surface leakage current. It is also possible to use a substrate without additional doping for this conversion transistor, that is to say a so-called native transistor. Doping is ensured simply by uniform doping during the manufacture of the silicon wafer, the most common doping being 10 15 atoms per cm 3 .
- the non-linear conversion element may also be a bipolar transistor as shown in FIG. 20.
- the collector is assimilated to the drain, the base at the gate and the transmitter at the source of the MOS transistor described above.
- the formula (3) can be rewritten in the form:
- V E the voltage of the transmitter and V B the voltage of the base.
- the same compensation mechanism also applies to it, and one can act on the voltage of the base as a control signal, or better play on the voltage of the collector, as described below.
- the preferred configuration with a buried photodiode is to connect the base to the substrate which constitutes the anode of the buried photodiode, as illustrated in FIG. 21 b). In this case, only the voltage modulation of the collector makes it possible to create temperature compensation.
- the drain or the collector of the non-linear conversion transistor is biased at a high voltage, typically close to the supply voltage of the sensor. So the diffusion drain or collector also sucks electrons created by the incident light. This competition reduces the quantum yield of the photodiode.
- a Type P doping can form an electrostatic screen pushing a portion of these electrons to the buried photodiode.
- FIG. 22 shows an embodiment according to the invention with a conventional MOS conversion transistor. It is possible to use as illustrated a floating diffusion FD for receiving and measuring the amount of charge stored in the buried photodiode, under illumination.
- the voltage follower portion for reading the voltage on floating FD is schematically represented because it can be easily performed with conventional transistors available in a conventional CMOS fabrication process.
- the control signal consists of the drain voltage of the conversion transistor.
- the grid is at the same potential as the substrate, and it is called a "virtual" grid.
- the surface doping zone of the photodiode extends at 115 beyond the doped zone of the photodiode constituting the cathode.
- This realization uses the DIBL phenomenon in a virtual grid conversion transistor polarized to zero.
- the doping of the drain of the conversion transistor is made with a depth d greater than that of the reading transistors of the pixel, made conventionally, in particular of the selection transistor SEL. This depth may be at least equal to that of the NPD zone of the buried photodiode, as illustrated.
- the virtual grid P + doping connects with the protective layer 110 of the buried photodiode.
- Containment doping is advantageously carried out under the drain of the conversion transistor, as well as under the transfer transistor.
- a bipolar transistor having its base connected to the substrate 169 constituted by the anode of the buried photodiode plays the role of the nonlinear conversion element.
- the collector 170 of the conversion transistor with the accented DIBL phenomenon is placed under the buried photodiode. Since the collectors of the transistors of the different pixels share the same voltage, they can be fused together.
- the buried collector 170 can be polarized for all the pixels via a surface contact by sufficiently deep n doping (not shown in FIG. 25), passing through the first substrate P 169.
- the transfer transistor is a virtual gate BJT or MOS transistor whose gate voltage is that of the substrate.
- the DIBL phenomenon is exploited to extract the charge stored in the photodiode.
- a capacitor CX is connected between the transfer control signal TX and the capacitive node FD. After resetting the capacitive node FD, the TX signal goes to a higher level. This overvoltage is transmitted on the capacitive node FD via the capacitor CX and causes a current of passage by the extreme effect DIBL (also called PUNCH THROUGH or PT). This current makes it possible to transfer the charge of the buried photodiode to the capacitor CX.
- DIBL extreme effect DIBL
- the embodiments described above can be made more compact by merging the capacitive node FD and the transistors involved in reading the voltage of the capacitive node FD.
- several buried photodiodes associated with their non-linear conversion element can be connected to the same capacitive node FD via respective transfer transistors, as illustrated in FIG. 29. These different photodiodes can be read sequentially, one after another, with the timing chart of Figure 2.
- This compacting technique is commonly used in reduced pitch image sensors.
- FIG. 24 can be realized without confinement doping under the non-linear conversion transistor and the transfer transistor.
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Abstract
Description
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Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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FR1555082A FR3037205B1 (fr) | 2015-06-04 | 2015-06-04 | Capteur optique |
PCT/EP2016/062258 WO2016193258A1 (fr) | 2015-06-04 | 2016-05-31 | Capteur optique |
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EP3304598A1 true EP3304598A1 (fr) | 2018-04-11 |
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Application Number | Title | Priority Date | Filing Date |
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EP16727426.5A Withdrawn EP3304598A1 (fr) | 2015-06-04 | 2016-05-31 | Capteur optique |
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US (1) | US10586820B2 (fr) |
EP (1) | EP3304598A1 (fr) |
JP (1) | JP2018518111A (fr) |
CN (1) | CN108352392A (fr) |
FR (1) | FR3037205B1 (fr) |
WO (1) | WO2016193258A1 (fr) |
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CN111579063B (zh) * | 2020-04-11 | 2022-01-28 | 复旦大学 | 一种柔性光感应器 |
JP2022090951A (ja) * | 2020-12-08 | 2022-06-20 | ソニーセミコンダクタソリューションズ株式会社 | 固体撮像装置、調整方法及び電子機器 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
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TW379499B (en) * | 1998-05-14 | 2000-01-11 | Ind Tech Res Inst | Active pixel sensing cell |
JP3725007B2 (ja) * | 2000-06-06 | 2005-12-07 | シャープ株式会社 | 対数変換型画素構造およびそれを用いた固体撮像装置 |
GB2367945B (en) * | 2000-08-16 | 2004-10-20 | Secr Defence | Photodetector circuit |
EP1265291A1 (fr) * | 2001-06-08 | 2002-12-11 | EM Microelectronic-Marin SA | Capteur d'image CMOS et procédé permettant d'opérer un capteur d'image CMOS avec une dynamique accrue |
US7148528B2 (en) | 2003-07-02 | 2006-12-12 | Micron Technology, Inc. | Pinned photodiode structure and method of formation |
JP4581792B2 (ja) * | 2004-07-05 | 2010-11-17 | コニカミノルタホールディングス株式会社 | 固体撮像装置及びこれを備えたカメラ |
FR2884051B1 (fr) | 2005-04-01 | 2007-06-01 | Atmel Grenoble Soc Par Actions | Capteur d'image cmos a grande dynamique |
JP4818112B2 (ja) * | 2005-05-11 | 2011-11-16 | パナソニック株式会社 | 固体撮像装置、カメラ、自動車および監視装置 |
WO2007099850A1 (fr) * | 2006-02-23 | 2007-09-07 | Omron Corporation | Capteur d'image a semi-conducteur et son procede de generation de signal |
KR100879013B1 (ko) * | 2007-05-22 | 2009-01-19 | (주)실리콘화일 | 매립형 컬렉터를 구비하는 포토트랜지스터 |
FR2920590B1 (fr) * | 2007-08-28 | 2009-11-20 | New Imaging Technologies Sas | Pixel actif cmos a tres grande dynamique de fonctionnement |
US8471310B2 (en) * | 2011-01-11 | 2013-06-25 | Aptina Imaging Corporation | Image sensor pixels with back-gate-modulated vertical transistor |
FR2984606B1 (fr) * | 2011-12-14 | 2015-06-26 | Soc Fr Detecteurs Infrarouges Sofradir | Matrice de detection avec suivi du comportement des photodetecteurs |
FR2997596B1 (fr) * | 2012-10-26 | 2015-12-04 | New Imaging Technologies Sas | Structure d'un pixel actif de type cmos |
US9165960B2 (en) * | 2013-01-04 | 2015-10-20 | Industrial Technology Research Institute | Pixel circuit, active sensing array, sensing device and driving method thereof |
FR3022397B1 (fr) | 2014-06-13 | 2018-03-23 | New Imaging Technologies | Cellule photoelectrique de type c-mos a transfert de charge, et capteur matriciel comprenant un ensemble de telles cellules |
FR3027479B1 (fr) * | 2014-10-21 | 2017-12-29 | Commissariat Energie Atomique | Pixel de capteur d'image ayant de multiples gains de noeud de detection |
-
2015
- 2015-06-04 FR FR1555082A patent/FR3037205B1/fr not_active Expired - Fee Related
-
2016
- 2016-05-31 US US15/579,255 patent/US10586820B2/en not_active Expired - Fee Related
- 2016-05-31 WO PCT/EP2016/062258 patent/WO2016193258A1/fr active Application Filing
- 2016-05-31 CN CN201680045171.3A patent/CN108352392A/zh active Pending
- 2016-05-31 JP JP2017563212A patent/JP2018518111A/ja active Pending
- 2016-05-31 EP EP16727426.5A patent/EP3304598A1/fr not_active Withdrawn
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US20180158855A1 (en) | 2018-06-07 |
US10586820B2 (en) | 2020-03-10 |
FR3037205B1 (fr) | 2018-07-06 |
WO2016193258A1 (fr) | 2016-12-08 |
FR3037205A1 (fr) | 2016-12-09 |
JP2018518111A (ja) | 2018-07-05 |
CN108352392A (zh) | 2018-07-31 |
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