EP2901555A1 - Modulateur rf sigma delta a couplage capacitif, convertisseur analogique-numerique et appareil comprenant un tel modulateur - Google Patents
Modulateur rf sigma delta a couplage capacitif, convertisseur analogique-numerique et appareil comprenant un tel modulateurInfo
- Publication number
- EP2901555A1 EP2901555A1 EP13776985.7A EP13776985A EP2901555A1 EP 2901555 A1 EP2901555 A1 EP 2901555A1 EP 13776985 A EP13776985 A EP 13776985A EP 2901555 A1 EP2901555 A1 EP 2901555A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- modulator
- loop
- filter
- signal
- resonators
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/402—Arrangements specific to bandpass modulators
- H03M3/404—Arrangements specific to bandpass modulators characterised by the type of bandpass filters used
- H03M3/408—Arrangements specific to bandpass modulators characterised by the type of bandpass filters used by the use of an LC circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M3/352—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M3/354—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
- H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
Definitions
- the invention relates to a continuous time sigma delta radiofrequency modulator. It also relates to a radiofrequency analog-digital converter comprising such a modulator as well as an electronic device, such as for example a software radio receiver, comprising such a modulator and / or such a converter.
- the field of the invention is the field of radiofrequency (RF) signal processing and more particularly the field of analog-to-digital conversion of radiofrequency signals, and even more particularly in software radio, cognitive radio and opportunistic radio applications.
- Sigma Delta (SD) bandpass analog-to-digital converters are a promising answer to this need since they are able to convert a limited frequency band around a certain center frequency.
- the bandpass filter of this type of modulator is most often realized using passive LC resonators.
- the performances of this type of converter are not sufficient, especially in terms of signal-to-noise ratio (SNR).
- One way to increase the SNR, and thus the performance of a bandpass SD converter, is to increase the order of the LC band pass filter used in the modulator loop of an SD RF converter.
- FIG. 1 represents an example of such an SD modulator of order 4.
- Modulator 1 comprises a processing chain 2 and a current feedback loop 3, which is not detailed.
- the feedback loop could also be a voltage feedback loop.
- the processing chain 2 receives an analog current X (s) on an input 21 and delivers a digital signal Y (z) on an output 22.
- the processing chain 2 comprises, connected in series, a first LC resonator 23, a transconductance G m 24, a second LC resonator 25, and a threshold comparator 26 operating at a sampling frequency f s .
- the first LC resonator 23 is produced by the parallel connection of a capacitor Ci and an inductor Li.
- a first terminal of this resonator LC 23 is connected to an input terminal 27 of the transconductance G m 24, and a second terminal is connected to a reference voltage V ref .
- the second LC resonator 25 is formed by the parallel connection of a capacitor C 2 and an inductor L 2 .
- a first terminal of the LC resonator 25 is connected to an output terminal 28 of the transconductance G m 24.
- a second terminal of the LC resonator 25 is connected to the reference voltage V ref .
- the LC resonators 23 and 25 and the transconductance G m 24 form a loop filter for the SD modulator.
- the transfer function of this loop filter can be described by the following equation: This transfer function contains two pairs of conjugated poles complex to the following pulsations:
- FIG. 2 represents an exemplary SD modulator comprising a loop filter formed by two LC resonators in series.
- the modulator 4 comprises a processing chain 5 and a current feedback loop 3, which is not detailed.
- the processing chain 5 receives an analog signal X (s) on an input 51 and delivers a digital signal Y (z) to an output 52.
- the processing chain 5 comprises a loop filter 6 formed by a first LC resonator 61 and a second LC resonator 62.
- Each LC resonator 61, 62 is formed by a parallel connection of a capacitance Ci or C 2 , and an inductance Li or L 2 , respectively.
- a first terminal of the LC resonator 61 is connected to the input 51, upstream of the threshold comparator 26, a second terminal of the LC resonator 61 is connected to a first terminal of the LC resonator 62, and a second terminal of the LC resonator 62 is connected to a reference voltage V re f.
- the transfer function of the loop filter 6 of the modulator 4 can be described by the following equation: s (L : 1 C 2 L 2 s 2 + Ci L x L 2 s 2 + L 2 + L
- This transfer function contains, as in the case of LC resonators coupled by a transconductance G m , two pairs of complex conjugate poles with the following pulsations:
- This transfer function contains a zero at DC and a pair of zeros s at the following pulsation:
- This pair of complex conjugated zeros creates an anti-resonance at a frequency close to the resonance frequency of the two LC resonators 61, 62.
- This anti-resonance frequency in the transfer function of the loop filter 6 makes the steps very difficult.
- the invention aims to overcome the aforementioned drawbacks.
- it aims to improve the performances, in terms of noise and non-linearity, of conventional architectures using LC resonators coupled via transconductances, while avoiding introducing problems of stabilization of the counter-loop. reaction and design difficulties of the noise and signal transfer functions.
- Another object of the invention is to provide a radiofrequency modulator sigma delta low consumption continuous time. Another object of the invention is to provide a continuous-cycle sigma delta radiofrequency modulator of simple design while having better performance in terms of signal-to-noise ratio and linearity.
- Another object of the present invention is to provide a radiofrequency modulator sigma delta continuous time easier to tune.
- the invention makes it possible to achieve at least one of the aforementioned objects by a continuous-time sigma delta radio frequency modulator comprising at least two LC resonators producing a band-pass filter, and coupled together by at least one capacitive coupling element, said coupling.
- the resonators coupled together make it possible to obtain a band-pass filter of at least four order and thus to obtain a performance modulator similar to the fourth-order modulators of the state of the art.
- the LC resonators are coupled together in parallel.
- the two LC resonators are capacitively coupled to each other, unlike modulators of the state of the art which use transconductances denoted Gm for the coupling of LC resonators.
- the bandpass filter obtained by capacitive coupling of at least two LC resonators consumes less than the modulators of the state of the art.
- the modulator according to the invention comprises exactly two LC resonators producing a bandpass filter coupled together in parallel by at least one capacitive element, called coupling element.
- a fourth-order bandpass filter is easier to design and grant than higher-order filters, while still providing sufficient performance for current applications, such as software radio, cognitive radio, and opportunistic radio.
- the capacitive coupling element may comprise at least one, and in particular exactly one, so-called coupling capacitance.
- a capacitor is an electronic component commonly used in the field of electronics and low cost.
- the at least one coupling capability can be, in a preferred embodiment, a variable capacitance whose value can be adjusted, thereby adding an additional degree of freedom for adjusting the frequency response of the filter. It is therefore simpler in a capacitively coupled LC filter to modify the transfer function of the bandpass filter produced by the two resonators and to obtain a noise transfer function (NTF) which maximizes the noise transfer function. signal-to-noise ratio in the frequency band of interest. More specifically, the proposed SD band-pass LC architecture makes it possible to easily modify the frequency position of the poles produced by each of the LC resonators of the band-pass filter, in the transfer function of the band-pass filter, in order to arrange them at the same time.
- At least one LC resonator preferably each of the LC resonators, may comprise at least one variable capacitance whose value can be adjusted, in order to optimize the position of the zeros in the noise transfer function. and therefore, to minimize the power of the quantization noise in the pass band filter bandwidth.
- each LC resonator may comprise at least one capacitive element and at least one inductive element arranged in parallel.
- Each capacitive element and / or each inductive element of at least one resonator, or even of each of the resonators, may be variable so as to modify, for a given modulator, the frequency band of interest according to the applications and the frequencies concerned for each of the applications.
- the modulator according to the invention may furthermore comprise:
- an adder configured to receive:
- the modulator according to the invention may further comprise:
- Another adder configured to receive:
- At least one of the feedback or compensation loops may comprise a finite impulse response (FIR) filter.
- FIR finite impulse response
- the coefficients of these filters are determined by techniques known from the state of the art.
- the modulator according to the invention may further comprise at least one means for setting the value of the loop delay to a predetermined value for reducing the number of the coefficients of the finite impulse response filter or filters.
- a fourth-order band-pass filter that is to say a filter comprising two capacitively coupled LC resonators
- a counter-reaction FIR filter and a compensation FIR filter each comprising only two non-zero coefficients.
- the design of the modulator is simplified and the power consumed is decreased.
- the modulator according to the invention may further comprise:
- the sampling means may be arranged to perform sampling at a sampling frequency fs such that fs ⁇ 4 * fc with fc the center frequency of the frequency band of interest.
- a continuous-time digital analog sigma delta converter having at least one modulator according to the invention and at least one digital signal processing means provided by said modulator for providing a digital signal. on several bits.
- Such digital means can be for example a DSP (for "Digital signal processor") in English.
- a modulator or a converter according to the invention is advantageously made partly or wholly in integrated form within an integrated circuit, more particularly within an electronic chip for example.
- a wireless communication apparatus comprising a modulator and / or a converter according to the invention.
- Such a communication device may be in the form of a stand-alone device or in the form of a module integrated in a set.
- Such a communication apparatus may for example be a radio frequency wave receiver.
- a modulator according to the invention and / or a converter according to the invention can be used for the realization of a software radio receiver, cognitive and opportunistic radio.
- FIG. 1 is a representation of the conventional architecture for producing a band-pass Sigma-Delta modulator using LC resonators coupled by a transconductance G m ;
- FIG. 2 is a representation of a band-pass Sigma-Delta modulator using LC resonators connected in series;
- FIG. 3 is a representation of a first example of a band-pass Sigma-Delta modulator according to the invention.
- FIGURE 4 is a mathematical representation of a second embodiment of a modulator according to the invention containing FIRDACs in a feedback loop;
- FIG. 5 illustrates, for the exemplary modulator of FIG. 4, the transfer function of the loop filter, the noise transfer function and the signal transfer function;
- FIGURE 6 is a schematic representation of a simulation result obtained for the modulator of FIGURE 4 illustrating the power spectral density
- FIGURE 7 is a schematic representation of an RF receiver architecture according to the invention.
- FIG. 8 is a schematic representation of a practical embodiment adapted to on-chip integration of the Sigma-Delta modulator according to the invention.
- FIG. 9 is a diagrammatic representation of a differential embodiment adapted to an on-chip integration of the Sigma-Delta modulator loop filter according to the invention.
- FIG. 3 represents a first example of a band-pass Sigma-Delta modulator according to the invention.
- the Sigma-Delta modulator 7 comprises a processing chain 8 and a feedback loop 3.
- the processing chain 8 is arranged to receive an analog signal X (s) on an input 81 of a signal processing line 82, and to deliver a digital signal Y (z) on an output 83.
- the processing chain 8 comprises, connected in series from the input 81 to the output 83, a first LC resonator 84, a coupling capacitor C c 85, a second LC resonator 86, and a threshold comparator 87 operating at a sampling frequency f s .
- the LC resonators 84, 86 and the coupling capacitance C c 85 form a loop filter 9.
- the first LC resonator 84 comprises a capacitor Ci and a Li inductor connected in parallel.
- a first terminal of the LC resonator 84 is connected to the line 82 and, more specifically, to a first terminal (or electrode) of the coupling capacitor C c 85.
- a second terminal of the LC resonator 84 is connected to a reference voltage V ref .
- the second LC resonator 86 comprises a capacity C 2 and an inductance L 2 connected in parallel.
- a first terminal of the LC resonator 86 is connected to the line 82 and, more precisely, to a second terminal (or electrode) of the coupling capacitor C c 85.
- a second terminal of the LC resonator 86 is connected to the reference voltage V ref .
- the feedback loop 3 is a technique well known to those skilled in the art and is not detailed here. It may consist of any feedback loop capable of shaping the quantization noise introduced by the threshold comparator 87.
- the capacitance Ci, C 2 of each LC resonator 84, 86 may be a variable capacitance.
- each LC resonator 84, 86 consists solely of capacitance and inductance connected in parallel.
- the sampling frequency f s of the threshold comparator 87 may be chosen lower than the Nyquist frequency.
- FIGURE 4 is a mathematical representation of a second embodiment of a modulator according to the invention.
- the modulator 100 shown in FIG. 4 comprises an input 102 for receiving an analog signal X (s) and an output 104 providing a digital signal Y (z).
- the modulator 100 comprises a band-pass filter 106 produced by two identical LC resonators 108 and 110 coupled together by a variable coupling capacitance C c 112 whose value can be adjusted.
- Each LC resonator 108 and 110 is realized by a capacitance, which is also variable, denoted C, and an inductance, denoted L, arranged in parallel.
- the modulator 100 further comprises a sampler 114 operating at a sampling frequency 1 / T and a quantizer 116.
- the quantizer 116 introduces into the modulator 100 a quantization noise symbolized by the arrow denoted E (z).
- the sampler 114 and the quantizer 116 are arranged in series on the output side 104 of the modulator 100, positioned so that the sampler 114 is between the band-pass filter 106 and the quantizer 116.
- the modulator 100 comprises a first adder 118 disposed between the input 102 of the modulator 100 and the bandpass filter 106, the first adder 118 comprising two inputs and an output.
- the modulator 100 further comprises a feedback loop 120 comprising a digital-to-analog converter with a filter. finite impulse response (FIR), denoted FIRDACu, 122.
- the input of the feedback loop 120 is connected to the output 104 of the modulator 100.
- FIR finite impulse response
- the adder 118 is arranged so that:
- one of its inputs is connected to the input 102 of the modulator 100; the other of its inputs is connected to the output of the feedback loop 120, more particularly to the output of the digital converter with a FIR filter; 122, and
- the modulator 100 comprises a second adder 124 disposed between the band-pass filter 106 and the sampler 114, the second adder 124 also comprising two inputs and an output.
- the modulator 100 also comprises a loop delay compensation loop 126 comprising a digital to analog converter with a FIR filter, denoted FIRDACc, 128.
- the input of the compensation loop 126 is connected to the output 104 of the modulator 100.
- the second adder 124 is arranged so that:
- one of its inputs is connected to the output of the band-pass filter 106,
- the other of its inputs is connected to the output of the compensation loop 126, more particularly to the output of the digital analog converter with an FIR filter 128, and
- the feedback loop 120 and the compensation loop 126 comprise a common portion 130 at their inputs.
- the modulator 100 comprises a means 132 for setting the value of the loop delay disposed on the common part 130 and for adjusting the value of the loop delay for each of the feedback and compensation loops.
- the operation of the modulator 100 is as follows:
- an analog signal enters the modulator 100 via its input 102; the analog signal supplied by the bandpass filter is sampled at a sampling frequency fs by the sampler 114;
- each signal sample is supplied to the quantizer 116, which provides a digital signal on a bit.
- the feedback loop 120 has the role of shaping the quantization noise with a certain noise transfer function (NTF).
- NTF noise transfer function
- the loop delay is due to the quantizer response time and the propagation delay of FIRDACs 122 and 128. This parasitic delay modifies the NTF, and degrades the signal-to-noise ratio (SNR) and can induce loop instability. -reaction.
- the compensation loop 126 has the role of compensating for the effect of the loop delay in order to obtain the desired NTF. Assuming a 4th order capacitive coupling LC filter with LC resonators having ideal quality factors, the transfer function of the bandpass filter 106 of FIG. 4 is given by the following relationships:
- Equations (1) (2) and (3) show that there are 3 parameters that control the position of Wi and w 2 . These 3 parameters are: C lr C 2 the capacities of the 1 st and 2 nd LC resonators respectively, and the coupling capacitance C c .
- HFIRDAC C (S) H DAC (s) (5) for the FIR 128 filter with where Mu and M c are respectively the order of FIRDAC filters 122 and 128, which in this case is equal to four.
- the loop gain is given by:
- the noise transfer function of the modulator 100 is given by:
- the signal transfer function of the modulator 100 is given by
- the coefficients of the FIRDACs are calculated to obtain a certain NTF which maximizes the SNR in the signal bandwidth while ensuring the stability of the system.
- An additional delay can be added to the unwanted loop delay in order to cancel certain coefficients, FIRDAC filters 122 and 128. To do this, the loop delay values are scanned and the values of each of the coefficients are calculated for each value. loop delay. An optimal value of loop delay can then be identified for which the value of one or more coefficients of the FIRDAC filters 122 and 128 is zero.
- FIGURE 5 is a schematic representation of the transfer functions of different elements of the modulator of FIGURE 4 obtained by simulation.
- the abscissa represents the normalized frequency of the signal with respect to the sampling frequency, ie fc / fs with fc the signal frequency and fs the sampling frequency.
- the y-axis represents the amplitude in dB.
- the curve 202 represents the signal transfer function of the modulator 100
- the curve 204 represents the transfer function of the bandpass filter 106
- the curve 206 represents the noise transfer function of the modulator.
- the frequency band of interest is centered around the normalized frequency 0.25, i.e. the fc / fs ratio is 0.25.
- the frequency response of the modulator noise (curve 206) has two zeros 208 and 210.
- the frequency response of the filter (curve 204) has in turn two poles 212 and 214.
- the frequency position of these poles 212 and 214 can be modified by modifying the value of the coupling capacitance C c and the poles 212 and 214 can be moved closer or further away depending on the value of the coupling capability.
- the SD modulator signal transfer function (STF) is flat (curve 202) in the frequency band. frequencies of interest centered around 0.25.
- this STF has the response of a bandpass filter having the same order of the modulator. This filter contributes to the attenuation of out-of-band signals.
- FIGURE 6 is a schematic representation of the power spectral density of the modulator of FIGURE 4 obtained by simulation.
- the abscissa represents the normalized frequency with respect to the sampling frequency, fs.
- the y-axis represents the power spectral density in dB.
- FIGURE 7 is a schematic representation of the architecture of an RF receiver according to the invention.
- the receiver 400 shown in FIGURE 7 may be a software radio, cognitive radio, and opportunistic radio receiver.
- the receiver 400 comprises an antenna 402 for receiving an analog signal.
- the analog signal is supplied to an amplifier 404 amplifying the received signal.
- the amplified analog signal is supplied to an SD 406 analog-to-digital converter comprising a modulator according to the invention, for example the modulator 100 of FIG. 1.
- the converter 406 provides a digital version of the analog signal but only for the frequencies included in FIG. the frequency band of interest, centered around a central frequency denoted fc.
- the digital signal supplied by the converter 406 is then sent by a digital processing stage comprising for example a decimation filter 408.
- the receiver further comprises a module 410 for adjusting / changing the center frequency fc of the frequency band of interest.
- a 4th order modulator with a capacitively coupled LC filter 100 has been realized in a 130nm CMOS technology.
- the modulator uses the subsampling technique to reduce the sampling frequency and consequently the consumption.
- a SNR of 50dB was measured in a bandwidth of 4.5MHz for a power consumption of 20mW.
- a 1.5Ts loop delay was used to reduce the number of loopback FIRDACs coefficients.
- FIG. 8 diagrammatically represents an embodiment of a differential Sigma-Delta modulator according to the invention that can be integrated on an electronic circuit such as an integrated circuit.
- the Sigma-Delta modulator 800 comprises, connected in series, an input 801 capable of receiving an analog voltage signal, a transconductance Gm in 802, a loop filter 803, a transconductance Gm a dd 804 and a threshold comparator 805.
- filter 803 has a positive differential input current I in +, a negative differential input current I in- a positive differential output V or t + and a negative differential output V or t.
- the Sigma-Delta modulator 800 further includes a first current feedback loop 806 having a first digital to analog converter with a finite impulse response filter (FIRDAC) 8061, and a second feedback loop 807 having a second feedback loop. second 8071.
- the transconductance Gm in 802 transforms the signal received on the input 801 current to be subtracted from the signal from the first loop 806 current feedback.
- the difference between the output signal of the transconductance Gm in and the signal coming from the feedback loop 806 is applied to the loop filter 803.
- the voltage output of the loop filter 803 is converted into current with the aid of the transconductance Gm has 804 dd.
- the difference between the output signal of the transconductance Gm add and the signal from the second feedback loop 807 is applied to the threshold comparator 805 to output the digital output signal.
- the loop filter 803 comprises two LC resonators coupled in parallel by a coupling capacitance C c .
- Inductances in LC resonators may have very low quality factors.
- the quality factor may then be too low, which considerably degrades the signal-to-noise ratio.
- an active circuit for the enhancement of the quality factor is necessary.
- the active circuit may for example consist of a negative transconductance circuit as described with reference to Figure 9.
- Figure 9 shows an exemplary integrated LC filter of the 4th order with capacitive coupling.
- the filter 900 comprises two differential LC resonators 901 and 902, and two polarization circuits 903 and 904.
- the first resonator 901 comprises a differential inductance Lu, two variable capacitances Cn and Ci 2 , and two MOS transistors Mu and M i2 .
- a center point (or "center tap" in English) of the differential inductance Lu is connected to a reference potential Vref.
- a first terminal of the inductance Lu is connected to a first terminal of the variable capacitance Cn and to the drain of the transistor Mu, and a second terminal of the inductance Lu is connected to a first terminal of the variable capacitor Ci 2 and to the drain of the transistor M 12 .
- the terminals of the differential inductance Lu form two differential input current I in + and in- I.
- the second terminals of the variable capacitances Cn and d 2 are grounded.
- the sources of the transistors Mu and M i2 are interconnected and polarized, as indicated below.
- the drain of the transistor Mu, respectively M i2 is connected to the gate of the transistor M i2 , respectively Mu.
- the transistors Mu and M 12 thus form a negative transconductance capable of compensating for the losses and of raising the quality factor of the resonator 901.
- the second resonator 902 is identical to the resonator 901. Its components are identified by incremented references of a dozen.
- the terminals of the differential inductance L 2 i form two differential voltage outputs V out + and V out -.
- the polarization circuit 903 makes it possible to adjust the potential applied to the sources of the transistors Mu and M 12 . It comprises a current source Iref supplying the drain and the gate of a MOS transistor M i4 , whose source is connected to ground. The gate of transistor M i4 is connected to the gate of a MOS transistor Mi 3 , whose drain is connected to the sources of transistors Mu and M i2 , and whose source is connected to ground.
- the bias circuit 904 adjusts the potential applied to the sources of the transistors M 22 and M 2i of the resonator 902. It comprises, in the example of Figure 9, the same components as the bias circuit 903. Of course the polarization circuits could be made differently. It would also be possible to use the same bias current, Iref, for the two resonators.
- the two resonators 901 and 902 are coupled together in parallel by two coupling capacitors C c i and C c 2 .
- the first terminal of the inductance Lu is connected to the first terminal of the inductance L 2i via the coupling capacitance C c i
- the second terminal of the inductance Lu is connected to the second inductance L 2i terminal via the coupling capacitance C c2 .
- the filter 900 may particularly be used as loop filter 803 in the Sigma-Delta modulator of figure 8, by connecting the inputs I in + and in- I, and the outputs V out + and V out - corresponding.
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Abstract
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1259226A FR2996387B1 (fr) | 2012-09-28 | 2012-09-28 | Modulateur rf sigma delta a couplage capacitif, convertisseur analogique-numerique et appareil comprenant un tel modulateur |
| PCT/EP2013/070379 WO2014049176A1 (fr) | 2012-09-28 | 2013-09-30 | Modulateur rf sigma delta a couplage capacitif, convertisseur analogique-numerique et appareil comprenant un tel modulateur |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP2901555A1 true EP2901555A1 (fr) | 2015-08-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP13776985.7A Ceased EP2901555A1 (fr) | 2012-09-28 | 2013-09-30 | Modulateur rf sigma delta a couplage capacitif, convertisseur analogique-numerique et appareil comprenant un tel modulateur |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US9306594B2 (fr) |
| EP (1) | EP2901555A1 (fr) |
| FR (1) | FR2996387B1 (fr) |
| WO (1) | WO2014049176A1 (fr) |
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|---|---|---|---|---|
| US9853843B2 (en) * | 2014-11-06 | 2017-12-26 | GM Global Technology Operations LLC | Software programmable, multi-segment capture bandwidth, delta-sigma modulators for flexible radio communication systems |
| EP3261258A1 (fr) * | 2016-06-23 | 2017-12-27 | Université Pierre et Marie Curie | Modulateur delta-sigma à bande passante accordable |
| US10061415B2 (en) | 2016-06-30 | 2018-08-28 | Synaptics Incorporated | Input device receiver with delta-sigma modulator |
| US10069590B1 (en) * | 2016-12-30 | 2018-09-04 | Juniper Networks, Inc. | Methods and apparatus for adaptive compensation of signal bandwidth narrowing through finite impulse response filters |
| US9762259B1 (en) * | 2017-01-09 | 2017-09-12 | Texas Instruments Incorporated | Sigma-delta analog-to-digital converter with auto tunable loop filter |
| US10396712B2 (en) * | 2017-11-29 | 2019-08-27 | National Chung Shan Institute Of Science And Technology | Transformer feed-back quadrature voltage controlled oscillator for correcting dynamic phase error and communication apparatus using the same |
| US10298245B1 (en) | 2018-03-16 | 2019-05-21 | Synaptics Incorporated | Audio analog-to-digital converter systems and methods |
| TWI685207B (zh) * | 2018-10-19 | 2020-02-11 | 瑞昱半導體股份有限公司 | 三角積分調變器的校正方法與校正電路 |
| CN115603756A (zh) * | 2022-10-31 | 2023-01-13 | 重庆吉芯科技有限公司(Cn) | 连续时间带通Sigma-Delta调制器及电子设备 |
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| US5729230A (en) * | 1996-01-17 | 1998-03-17 | Hughes Aircraft Company | Delta-Sigma Δ-Σ modulator having a dynamically tunable continuous time Gm-C architecture |
| US5982315A (en) | 1997-09-12 | 1999-11-09 | Qualcomm Incorporated | Multi-loop Σ Δ analog to digital converter |
| US6061008A (en) * | 1997-12-19 | 2000-05-09 | Rockwell Science Center, Inc. | Sigma-delta-sigma modulator for high performance analog-to-digital and digital-to-analog conversion |
| US6160859A (en) | 1998-10-19 | 2000-12-12 | Motorola, Inc. | Integrated multi-mode bandpass sigma-delta receiver subsystem with interference mitigation and method of using the same |
| US6639946B2 (en) | 2000-12-01 | 2003-10-28 | International Business Machines Corporation | Sigma delta modulator with SAW filter |
| FR2837035B1 (fr) | 2002-03-08 | 2005-04-08 | Thales Sa | Filtre integrateur a temps continu et a variation de phase minimale, modulateur sigma-delta passe bande utilisant un tel filtre |
| US7173980B2 (en) * | 2002-09-20 | 2007-02-06 | Ditrans Ip, Inc. | Complex-IF digital receiver |
| US6693573B1 (en) | 2003-03-19 | 2004-02-17 | Raytheon Company | Mixed technology MEMS/BiCMOS LC bandpass sigma-delta for direct RF sampling |
| US6930624B2 (en) | 2003-10-31 | 2005-08-16 | Texas Instruments Incorporated | Continuous time fourth order delta sigma analog-to-digital converter |
| US7860189B2 (en) * | 2004-08-19 | 2010-12-28 | Intrinsix Corporation | Hybrid heterodyne transmitters and receivers |
| US7057541B1 (en) * | 2004-11-29 | 2006-06-06 | Hrl Laboratories, Llc | Delta-sigma modulator using LC resonators |
| US7545303B1 (en) * | 2008-03-14 | 2009-06-09 | National Semiconductor Corporation | Sigma-delta difference-of-squares RMS-to-DC converter with forward and feedback paths signal squaring |
| CN101917198A (zh) | 2010-08-05 | 2010-12-15 | 复旦大学 | 连续时间的高速低功耗sigma-delta调制器 |
-
2012
- 2012-09-28 FR FR1259226A patent/FR2996387B1/fr active Active
-
2013
- 2013-09-30 EP EP13776985.7A patent/EP2901555A1/fr not_active Ceased
- 2013-09-30 US US14/431,689 patent/US9306594B2/en active Active
- 2013-09-30 WO PCT/EP2013/070379 patent/WO2014049176A1/fr not_active Ceased
Non-Patent Citations (2)
| Title |
|---|
| None * |
| See also references of WO2014049176A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US20150280733A1 (en) | 2015-10-01 |
| US9306594B2 (en) | 2016-04-05 |
| FR2996387B1 (fr) | 2015-08-07 |
| WO2014049176A1 (fr) | 2014-04-03 |
| FR2996387A1 (fr) | 2014-04-04 |
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