EP2852970B1 - Procédé de fabrication d'un module électronique - Google Patents

Procédé de fabrication d'un module électronique Download PDF

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Publication number
EP2852970B1
EP2852970B1 EP12722392.3A EP12722392A EP2852970B1 EP 2852970 B1 EP2852970 B1 EP 2852970B1 EP 12722392 A EP12722392 A EP 12722392A EP 2852970 B1 EP2852970 B1 EP 2852970B1
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EP
European Patent Office
Prior art keywords
film
carrier
adhesive
component
nanoparticles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP12722392.3A
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German (de)
English (en)
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EP2852970A1 (fr
Inventor
Jan Kostelnik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuerth Elektronik GmbH and Co KG
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Wuerth Elektronik GmbH and Co KG
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Publication of EP2852970A1 publication Critical patent/EP2852970A1/fr
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Publication of EP2852970B1 publication Critical patent/EP2852970B1/fr
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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61MDEVICES FOR INTRODUCING MEDIA INTO, OR ONTO, THE BODY; DEVICES FOR TRANSDUCING BODY MEDIA OR FOR TAKING MEDIA FROM THE BODY; DEVICES FOR PRODUCING OR ENDING SLEEP OR STUPOR
    • A61M5/00Devices for bringing media into the body in a subcutaneous, intra-vascular or intramuscular way; Accessories therefor, e.g. filling or cleaning devices, arm-rests
    • A61M5/14Infusion devices, e.g. infusing by gravity; Blood infusion; Accessories therefor
    • A61M5/142Pressure infusion, e.g. using pumps
    • A61M5/14244Pressure infusion, e.g. using pumps adapted to be carried by the patient, e.g. portable on the body
    • A61M5/14276Pressure infusion, e.g. using pumps adapted to be carried by the patient, e.g. portable on the body specially adapted for implantation
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/144Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers using layers with different mechanical or chemical conditions or properties, e.g. layers with different thermal shrinkage, layers under tension during bonding
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/10Removing layers, or parts of layers, mechanically or chemically
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828Etching
    • H01L21/4832Etching a temporary substrate after encapsulation process to form leads
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R25/00Deaf-aid sets, i.e. electro-acoustic or electro-mechanical hearing aids; Electric tinnitus maskers providing an auditory perception
    • H04R25/60Mounting or interconnection of hearing aid parts, e.g. inside tips, housings or to ossicles
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • A61M2205/0244Micromachined materials, e.g. made from silicon wafers, microelectromechanical systems [MEMS] or comprising nanotechnology
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F04POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity

Definitions

  • the invention relates to a method for producing an electronic assembly.
  • Such a method is known from DE 10 2008 009 220 A1 and from DE 10 2010 014 579 A1 .
  • the pamphlet DE 10 2011 000 530 A1 discloses a method of manufacturing a semiconductor device.
  • a paste is applied to a metal foil and a semiconductor chip is pressed into this paste.
  • the pamphlet JP2008141007 discloses a method of making a multilayer substrate.
  • An electronic component is arranged between several resin films in order to protect it from damage and to make electrical contact.
  • the pamphlet DE 10 2008 040 488 A1 discloses an electronic assembly and a method for its manufacture.
  • the object of the present invention is to specify an improved method and an improved electronic assembly.
  • Embodiments of the invention are particularly advantageous since the lamination and the low-temperature sintering can take place essentially simultaneously in the same process step. This is made possible on the one hand by the use of nanoparticles, which enable low-temperature sintering in a temperature range that is also suitable for laminating the film, and on the other hand by the prior fixing of the at least one electrical component on the surface of the electrically conductive film. This fixation ensures that the electrical component is in the right place when the carrier for the subsequent lamination is applied to the film and the components in the room, and that the component cannot slip.
  • An “electrical component” is understood here to mean in particular housed and unhoused electronic components, such as integrated semiconductor chips, for example so-called bare chips (“bare chip” or “bare die”), as well as discrete electrical or electronic components, such as capacitors.
  • Such an electrical component usually has one side on which one or more electrical contact points are provided for making electrical contact with the component.
  • This side of the component is also referred to as the "active side" of the component.
  • the electrical contact points are designed as so-called contact pads.
  • the carrier can be pre-impregnated fibers (that is, a so-called prepreg), which is understood here to be an uncured thermoset plastic matrix.
  • the carrier can be a liquid crystal polymer (LCP), which is particularly advantageous for the production of biocompatible implants, or another carrier material.
  • an electrically conductive film is used as the starting material, the surface of which is coated with nanoparticles.
  • the at least one electrical component is then fixed on the surface of the electrically conductive film by an adhesive that is applied outside the electrical contact points of the component.
  • the adhesive is preferably a non-conductive adhesive, that is to say a so-called non-conducting adhesive (NCA) or a non-conducting paste (NCP). If, for example, the electrical component is a bare die that is surrounded by a passivation layer outside the electrical contact points, the adhesive connection is established between the passivation layer and the surface of the electrically conductive film with the aid of this adhesive.
  • an electrically conductive film is used as the starting material, the surface of which does not have to be coated with nanoparticles.
  • an adhesive that contains the nanoparticles is used.
  • the adhesive is applied to the at least one electrical contact point of the electrical component in order to fix the electrical component on the surface of the electrically conductive film.
  • the carrier is then applied in order to laminate the film with the carrier and at the same time to carry out the low-temperature sintering.
  • the nanoparticles contained in the adhesive bond sinter here.
  • the low-temperature sintering is carried out as "pressureless” low-temperature sintering.
  • pressureless is understood to mean that the low-temperature sintering is not carried out at the high pressures of, for example, 200 bar, ie 2000 kPa, which are usually to be used, but at a significantly lower pressure, as is also used for lamination, that is to say at a pressure of, for example, 15-20 bar. i.e. 1500-2000 kPa.
  • Corresponding adhesives or pastes which contain nanoparticles for such a pressureless low-temperature sintering are known per se from the prior art, such as from DE 10 2008 039 828 A1 , and are commercially available from Heraeus under the trade name mAgic Adhesive or mAgic Paste.
  • connection produced in this way is particularly mechanically stable and has good electrical contact properties due to the covalent bonds of the nanoparticles, which lead to a low contact resistance.
  • the size of the nanoparticles is selected so that they are chemically relatively inert at room temperature, so that at There is no spontaneous sintering at room temperature.
  • the size of the nanoparticles is selected to be sufficiently small so that in the temperature range required for lamination the reactivity of the nanoparticles is already increased compared to macroscopic particles to such an extent that covalent chemical bonds are formed between the nanoparticles, so that they sinter together .
  • the adhesive can be an LCP.
  • the carrier is also formed by an LCP, in particular with regard to the thermal load capacity and the long-term stability of the resulting electronic assembly, which is particularly advantageous for applications in the medical field, in particular for implants.
  • the invention relates to a method for producing an electronic assembly, in which, prior to the lamination of the film with the carrier, the at least one component arranged on the electrically conductive film is enveloped with a filler material made of a polymer Encasing the low-temperature sintering takes place.
  • a filler material made of a polymer Encasing the low-temperature sintering takes place.
  • the invention relates to an electronic assembly which has been produced using a method according to the invention.
  • it can be an implant, such as an electronics module for an insulin pump, a cardiac pacemaker or an implantable hearing aid.
  • the film is advantageously provided by providing individual, cut-to-size film sections or by providing an endless film from a roll.
  • the at least one electrical component is preferably provided by providing it on an endless film or by providing it in a magazine.
  • the at least one electrical component is advantageously arranged in an automated manner by an assembly robot or by hand, in particular with the aid of templates or position markers in or on the film.
  • the carrier can be provided by providing individual, cut-to-size carrier sections or by providing an endless carrier from a roll.
  • the film is preferably laminated to the carrier by exerting a contact pressure on the film in the direction of the carrier, in particular with the simultaneous action of heat.
  • the structuring of the electrically conductive film to form conductor tracks and, if necessary, cooling surfaces is advantageously carried out by direct structuring, e.g. B. with a laser, or by creating a positive or negative mask and then etching.
  • the film with the carrier and the at least one electrical component is advantageously wound onto a roll after the film has been structured.
  • the at least one electrical component is encased after the component has been arranged on the film with a filler material made of a polymer, in particular a thermoplastic, thermoset or an elastomer.
  • the filling material is advantageously filled into a predetermined shape, in particular by pouring, foaming, extruding or lamination.
  • At least one further carrier layer is produced on the conductor tracks produced by structuring takes place, this preferably being insulating and / or dielectric and / or containing further conductor tracks.
  • At least one reinforcement layer preferably a plurality of reinforcement layers, can be applied to the carrier or the carrier layer.
  • the carrier can be cut to size in a predetermined shape for forming the electronic assembly, in particular before and / or after lamination with the circuit board in step 1.6. respectively.
  • the electrically conductive film can consist of metal, in particular copper, electrically conductive plastic or electrically conductive ceramic, on the surface of which, if necessary, a layer of silver or a silver compound and / or a three-dimensional structure of metallic nanoparticles is present and possibly through a carrier film is reinforced.
  • the electrically conductive film is smooth or roughened on the side facing the at least one electrical component or has a hump structure.
  • the at least one electrical component is a passive or active component, in particular a chip, wherein it is preferably provided with a protective coating, in particular a lacquer, i.e. a so-called passivation layer, outside the contact points.
  • a protective coating in particular a lacquer, i.e. a so-called passivation layer, outside the contact points.
  • the protective coating is electrically insulating and / or a dielectric.
  • the carrier can advantageously be a film, in particular made of metal, plastic or ceramic, a mat made of natural materials, such as. B. vegetable fibers, a leather section, a textile section or a section of another fabric or Be a composite material or a printed circuit board, a ceramic carrier or a glass carrier.
  • the carrier is assigned a reinforcing layer and can in particular be made of metal, plastic or ceramic, made of natural materials, such as. B. vegetable fibers, leather, textile or some other fabric or composite material or can be a printed circuit board, a ceramic carrier or a glass carrier.
  • the at least one electrical component can have at least one contact side, in each of which at least one electrical contact point is arranged, the at least one electrical contact point preferably being flat with the corresponding contact side.
  • the contact point is advantageously made of copper or a copper compound, on the surface of which a layer of silver or a silver compound and / or a three-dimensional structure made of metallic nanoparticles may be present.
  • a section of the electrically conductive film is formed as a heat-dissipating contact area on the at least one electrical component (film cooling section).
  • a cooling body or a cooling channel is connected to the film cooling section and / or the at least one electronic component.
  • fig. 1 shows schematically a detail of a side view of an electrically conductive foil 3 made of copper unwound from a roll.
  • a film surface 3o which subsequently faces an electrical component 5, is provided with a uniform coating of nanoparticles, for example silver particles with a particle size of approx. 20-300 nm or a silver-containing alloy.
  • the film 3 is reinforced on the side opposite the side 3o by a carrier film 3a which is laminated onto the film 3 and consists of a polymer.
  • fig. 2 shows schematically an electrical component 5, in this case a chip, in a sectional view.
  • the component 5 is made up of a protective layer 5a on all sides coated with electrically insulating lacquer, ie a so-called passivation layer.
  • the component 5 has a contact side 5b, which is also referred to as the active side, with two contact points 5c for making electrical contact with the film 3, which are cut out by the applied protective layer 5a.
  • the component 5 can have further contact points, such as on its edge 21 or on the upper side 22.
  • the surfaces of the contact points 5c are, as shown in FIG fig. 2 B can be seen, coated with a layer of silver (or a silver-containing alloy), namely with nanoparticles 37.
  • the nanoparticles can partially diffuse into the contact points 5c, which results in a particularly low electrical contact resistance.
  • the components 5 are provided from a film unwound from a roll, on which they are arranged at a distance from one another. For example, the component 5 is a bare die, the contact points 5c then being designed as so-called contact pads.
  • a robot arm picks up one or more components 5 from the film and places them on the coated surface 3o of the film 3 at defined locations.
  • an adhesive is applied between the component 5 and the surface 30 of the electrically conductive film in order to fix the component by forming an adhesive connection, the connection 7 being an adhesive connection.
  • the adhesive is applied to the surface 30 of the film before one of the components 5 is set down.
  • the adhesive can be applied, for example likewise robotically, to the active side, ie the contact side 5b of the component 5, outside the electrical contact points 5c.
  • Another example that does not fall under the claimed invention is that the component is first positioned by the robot arm on the surface 30 of the electrically conductive film in order to arrange the component there, and that the adhesive is then applied to produce the adhesive connection, for example by applying the adhesive along the side edge of the component (see also the examples according to Fig. 9 ).
  • the adhesive connection produced in this way fixes the components 5 mechanically on the film 3 without electrically contacting them.
  • the adhesive 20 (cf. Fig. 9 ) applied outside the electrical contact points 5c in order to allow the subsequent formation of the mechanical and electrical connection 23 (cf. Fig. 4 ) not to be hindered by the low-temperature sintering, especially since the adhesive 20 in this example contains ⁇ a metallic nanoparticle.
  • fig. 3 shows the arrangement of two components 5 fastened in this way on the film 3.
  • a film of a thermoplastic polymer is unrolled from a further roll and onto the arrangement of the fig. 3 hung up.
  • Both are passed through a gap between two heated rollers in order to heat the film of the thermoplastic polymer and to press it against the film 3 in order to enclose the components 5.
  • the low-temperature sintering ie the formation of a mechanical and electrical connection 23 between the contact points 5c and the surface 30, can already occur when the rollers are sufficiently warm.
  • a film of a plastic composite material in the present case glass fibers arranged in an epoxy resin, is now unwound from a further roll and placed on the arrangement of the fig. 4th hung up. Both are passed through a gap between two heated rollers in order to heat the film of the plastic composite material and to press it against the envelope, ie the filler material 19, in order to laminate the plastic composite material onto the envelope.
  • the laminated plastic composite material forms a carrier 9 for the arrangement of fig. 4th , in the present case a rigid carrier 9.
  • the low-temperature sintering for forming the mechanical and electrical connection 23 between the contact points 5c and the surface 30 is carried out in this step by the lamination takes place in a temperature range required for this, so that sintering is also triggered at the same time as the lamination.
  • a laser beam directed onto the film surface 3u vaporizes predetermined sections of the film 3.
  • the remaining sections of the film 3 form conductor tracks 11 and an electrically non-connected film cooling section 13, see FIG. fig. 6th .
  • layer 9a being a thermoplastic polymer
  • layer 9b being a plastic composite material, in the present case glass fibers arranged in an epoxy resin, see fig. fig. 7th .
  • the Figure 9a shows a perspective view of the film 3 with two electronic components 5.1 and 5.2, which are each designed here as so-called bare dies.
  • the Figure 9b shows a plan view of the film which does not fall under the claimed invention, the film 3 with the components 5.1 and 5.2 fixed thereon by the adhesive connection.
  • the adhesive 20 is applied so that the adhesive connection between the lateral edge 21 and the surface 30 of the film 3 results.
  • the adhesive 20 for fixing the component 5.2 is applied punctiformly on the film 3 in the area of the corners of the component 5.2, as also shown in FIG. 9b.
  • the Figure 9c shows the corresponding sectional views.
  • the possible active surface for electrical contacting of the components 5.1 or 5.2 is not or only insignificantly reduced by the formation of the adhesive connection.
  • essentially the entire underside of the components 5.1 or 5.2, ie the contact side 5b, is available for electrical contact with the film 3, as is the upper sides of the components 5.1 and 5.2.
  • Fig. 10 to fig. 14th show schematically a section of a conductive film 3 unwound from a roll according to a further example which does not fall under the claimed invention.
  • This film 3 has adjustment markings 2 at certain precisely defined points, for example in the form of holes extending through the film 3.
  • the film 3 is uncoated on both sides. It is, for example, a copper foil.
  • Adhesive 20 is applied to the upper side 30 at certain points which are defined in their position with respect to the adjustment marks 2.
  • the application can be done by printing, spraying, dripping or the like.
  • Individual spacer elements 31, for example glass spheres of a certain size, can be mixed into the adhesive. With the size of the spacer it is possible to set different thicknesses of the dielectric.
  • the adhesive also contains nanoparticles to enable the subsequent low-temperature sintering, preferably a pressureless low-temperature sintering.
  • an envelope made of a filler material 19, for example a polymer mass can be applied around the electronic components 5, which envelops individual or all electronic components in a separate or a common envelope.
  • This process can trigger the sintering of the nanoparticles contained in the adhesive 20 in order to create the connections 23 (cf. Fig. 4 ) if the process is carried out at a sufficiently high temperature.
  • the envelope extends outside the electronic components 5 up to that in the Fig. 10 to fig. 13 upper side 30 of the slide 3.
  • the adjustment markings 2 can also be used for dimensioning and arranging the cover made of the polyester compound with respect to the electronic components 5.
  • the sheathing envelops components 5 and extends as far as the film 3, and possibly also forms a type of adhesive bond with the film 3, a mechanically stable block is thereby formed.
  • the envelope also extends between the contact points, as in FIG Figures 13 and 14 shown.
  • the film 3 provided with the covering is laminated to a circuit board carrier 9, which comes to lie on the side of the film 3 on which the electronic components 5 are also arranged (cf. the arrangement according to FIG Fig. 5 ). This, at the latest, triggers the sintering and thus the production of the connections 23.
  • the film 3 is now structured on its free side 8, so that conductor tracks are now produced.
  • fig. 15th shows such a further embodiment of an electronic assembly, with practically two assemblies, as in fig. 14th shown, are connected back to back with the interposition of a metallic layer 12, which is arranged between the two circuit board supports 9.
  • This metallic layer 12 is used, for example, to dissipate the heat generated in the electronic components 5.
  • the two assemblies summarized here differ from the simple assembly of the fig. 14th nor in that on the in fig. 14th
  • metallized cooling channels 15 lead through the circuit board carrier 9 to the central cooling layer 12, so that the heat can be dissipated here.
  • the fig. 16 to fig. 21st show states during the implementation of the procedure which are approximately the fig. 10 to fig. 14th correspond.
  • the illustrated embodiment is a film 33 as the starting material, which is attached to a carrier film 34.
  • the carrier film 34 can consist of metal, ceramic or also polymer.
  • the conductive foil 33 consists for example of copper and is not coated with nanoparticles.
  • connection pads 35 are formed on the carrier film 34 which correspond to the connection points 5c of the electronic components to be fastened.
  • Such an electronic component 5 is shown in fig. 18th shown.
  • This electronic component 5 is now connected to the connection pads 35 with its connection points 5c. This can be done, for example, by applying adhesive 20 to the connection pads 35 or the sides of the connection points 5c of the electronic component 5 facing them.
  • the adhesive 20 is an adhesive with nanoparticles distributed in the adhesive. As a result, an adhesive layer is formed that is present between the connection pads 35 and the connection points 5c of the electronic component 5. In this way, the electronic component 5 is connected to its connection points 5c facing the connection pads 35, namely initially only via an adhesive connection.
  • the electronic component 5 can then be surrounded by an envelope made of a filler material 19, again made of polymer compound, which surrounds the entire electronic component 5 including the connection pads 35 and extends as far as the carrier film 34.
  • a filler material 19 again made of polymer compound
  • the carrier film 34 can then be separated, which is shown in FIG fig. 20th is shown.
  • the further treatment of the casing or a lamination and the electronic component 5 contained therein takes place in the manner customary for printed circuit boards. It is essential that the wrapping with the filler material or the lamination a temperature range is reached in which the low-temperature sintering of the nanoparticles contained in the adhesive 20 is triggered in order to create the connections 23 (cf. Fig. 4 ) to produce.
  • fig. 20th shows the detachment of the carrier layer 34. Instead of detaching the carrier layer 34, it is also possible not to detach the carrier layer 34, but to structure it further, for example by etching, by removal or the like. This is in fig. 21st shown.
  • the fig. 22 and fig. 23 show a further example which does not fall under the claimed invention, wherein a thicker film 36 is used as the starting film, which is then similar to FIG fig. 17th is initially structured on its side facing the electronic components, in order to thereby form connection pads 35. Links in fig. 22nd the initial state of this thicker film 36 is shown, while on the right in FIG fig. 22nd the result of the structuring is shown.
  • the electronic component 5 is then placed on the structured film produced in this way in the same way, fastened with the aid of the adhesive 20, as shown in FIG fig. 18th was shown.
  • structuring can take place after the electronic component 5 and the casing have been attached.
  • the method proposed by the invention makes it possible to achieve a considerably increased use of space on electronic circuit carriers. Additional layers can be produced with components populated in a very small space, both active and passive components.
  • the passive and active electronic components can be encapsulated inexpensively, which results in a high level of reliability. Risky mixed techniques, namely soldering, gluing and wire bonding are avoided in production.
  • a planar initial structure enables reproducible RF transitions to be achieved. It is of particular advantage that no separate process step is required for the formation of the electrical connections, since this takes place by low-temperature sintering together with the casing or the lamination, and that this simultaneously creates a particularly stable mechanical connection and an electrical connection with a low contact resistance and a short length results, which is advantageous for high frequency applications.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • General Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Public Health (AREA)
  • Animal Behavior & Ethology (AREA)
  • Biomedical Technology (AREA)
  • Veterinary Medicine (AREA)
  • Otolaryngology (AREA)
  • Heart & Thoracic Surgery (AREA)
  • Mechanical Engineering (AREA)
  • Hematology (AREA)
  • Anesthesiology (AREA)
  • Vascular Medicine (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Neurosurgery (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Laminated Bodies (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Radiology & Medical Imaging (AREA)
  • Cardiology (AREA)

Claims (13)

  1. Procédé de fabrication d'un module électronique (1) avec les étapes :
    1.1 fourniture d'une feuille (3) électriquement conductrice, notamment une feuille support (3a),
    1.2 fourniture d'au moins un composant (5) électrique avec au moins un point de contact électrique (5c),
    1.3 dépôt d'un adhésif (20) entre le composant électrique et une surface (30) de la feuille électriquement conductrice,
    1.4 agencement de l'au moins un composant (5) avec l'au moins un point de contact électrique (5c) sur la surface (30) de la feuille (3) électriquement conductrice, et fixation de l'au moins un composant par la création d'une liaison adhésive entre le composant électrique et la surface,
    1.5 fourniture d'un support (9), notamment à base d'un matériau souple,
    1.6 laminage de la feuille (3) avec le support (9) de telle façon que l'au moins un composant (5) électrique soit disposé entre la feuille (3) et le support (9), et formation d'une liaison (23) mécanique et électrique entre le point de contact électrique de l'au moins un composant (5) électrique et la feuille (3) conductrice électriquement par un frittage à basse température de nanoparticules,
    1.7 structuration de la feuille (3) électriquement conductrice en pistes conductrices (11) et/ou en surfaces de refroidissement (13), caractérisé en ce que le laminage de la feuille a lieu simultanément au frittage à basse température.
  2. Procédé selon la revendication 1, dans lequel le laminage et le frittage à basse température ont lieu à 130 - 300 degrés Celsius, ou entre 150 et 250 degrés Celsius, ou à 170 à 190 degrés Celsius, ou à 180 degrés Celsius.
  3. Procédé selon la revendication 1 ou la revendication 2, dans lequel l'adhésif contient des nanoparticules, et l'adhésif est rapporté sur l'au moins un point de contact électrique.
  4. Procédé selon la revendication 3, dans lequel des nanoparticules frittées, qui sont incorporées dans une matrice formée par l'adhésif, sont créées par le frittage à basse température.
  5. Procédé selon l'une des revendications précédentes, dans lequel le frittage à basse température est exécuté à une pression de 15 à 20 bar, c'est-à-dire de 1500 à 2000 kPa.
  6. Procédé selon l'une des revendications précédentes, dans lequel le laminage de la feuille (3) avec le support (9) dans l'étape 1.6 a lieu par l'exercice d'une pression d'appui sur la feuille (3) en direction du support (9) sous l'influence simultanée de chaleur.
  7. Procédé selon l'une des revendications précédentes, caractérisé par un enveloppement de l'au moins un composant électrique après l'étape 1.4 avec un matériau de remplissage (19) à base d'un polymère.
  8. Procédé selon la revendication 8, caractérisé en ce que le polymère est un thermoplastique, un duroplastique, un élastomère ou un polymère cristal liquide.
  9. Procédé selon l'une des revendications précédentes, caractérisé en ce qu'après l'étape 1.7, il y a une application d'au moins une couche de renforcement (9b) sur le support (9) ou la couche support (9a), ou que le support (9) est retiré après l'étape 1.6.
  10. Procédé selon l'une des revendications précédentes, caractérisé par un découpage du support (9) dans une forme prédéterminée pour former le module électrique (1) avant ou après le laminage avec le support (9) dans l'étape 1.6.
  11. Procédé selon l'une des revendications précédentes, dans lequel, dans le cas des nanoparticules, il s'agit d'argent avec une taille particulaire entre 20 et 300 nm.
  12. Procédé selon l'une des revendications précédentes, dans lequel la surface de la feuille est munie d'un revêtement régulier de 200 à 300 nm d'argent ou d'un alliage contenant de l'argent.
  13. Procédé selon l'une des revendications précédentes, dans lequel les nanoparticules sont formées à base d'or, d'argent, de nickel ou de cuivre ou d'un alliage à base de ces métaux.
EP12722392.3A 2012-05-22 2012-05-22 Procédé de fabrication d'un module électronique Not-in-force EP2852970B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2012/059476 WO2013174418A1 (fr) 2012-05-22 2012-05-22 Procédé de fabrication d'un module électronique

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EP2852970A1 EP2852970A1 (fr) 2015-04-01
EP2852970B1 true EP2852970B1 (fr) 2021-01-06

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EP2856500A4 (fr) * 2012-06-04 2015-12-02 Nokia Technologies Oy Appareil comprenant des parties conductrices et procédé de fabrication de l'appareil
DE102013210668A1 (de) 2013-06-07 2014-12-11 Würth Elektronik GmbH & Co. KG Verfahren zur Herstellung eines optischen Moduls
US9640468B2 (en) * 2014-12-24 2017-05-02 Stmicroelectronics S.R.L. Process for manufacturing a package for a surface-mount semiconductor device and semiconductor device
CN107454547B (zh) * 2017-09-08 2019-11-15 维沃移动通信有限公司 一种麦克风和麦克风制作方法
TWI645973B (zh) * 2017-12-15 2019-01-01 律勝科技股份有限公司 聚醯亞胺薄化軟性基板及其製造方法
EP3796373B1 (fr) * 2019-09-20 2023-06-28 BIOTRONIK SE & Co. KG Agencement de platine d'un appareil médical implantable
CN111524883B (zh) * 2020-04-29 2022-09-20 业成科技(成都)有限公司 膜内电子组件及其制备方法
CN113339186A (zh) * 2021-06-30 2021-09-03 北京航空航天大学宁波创新研究院 一种液压泵马达摩擦副配对结构及应用

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JP2004201285A (ja) * 2002-12-06 2004-07-15 Murata Mfg Co Ltd 圧電部品の製造方法および圧電部品
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DE102008009220A1 (de) 2008-02-06 2009-08-13 Robert Bosch Gmbh Verfahren zum Herstellen einer Leiterplatte
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WO2013174418A1 (fr) 2013-11-28
US20150131240A1 (en) 2015-05-14

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