EP2762866B1 - Capteur de gaz CMOS et son procédé de fabrication - Google Patents

Capteur de gaz CMOS et son procédé de fabrication Download PDF

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Publication number
EP2762866B1
EP2762866B1 EP13405019.4A EP13405019A EP2762866B1 EP 2762866 B1 EP2762866 B1 EP 2762866B1 EP 13405019 A EP13405019 A EP 13405019A EP 2762866 B1 EP2762866 B1 EP 2762866B1
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Prior art keywords
layer
platinum
tungsten
electrodes
membrane
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German (de)
English (en)
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EP2762866A1 (fr
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Johannes Bühler
Cyrill Kuemin
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Sensirion AG
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Sensirion AG
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Priority to EP13405019.4A priority Critical patent/EP2762866B1/fr
Priority to US14/160,986 priority patent/US9466498B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/02—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
    • G01N27/04—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance
    • G01N27/12—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a solid body in dependence upon absorption of a fluid; of a solid body in dependence upon reaction with a fluid, for detecting components in the fluid
    • G01N27/122—Circuits particularly adapted therefor, e.g. linearising circuits

Definitions

  • the invention relates to gas sensor having a silicon substrate and CMOS circuitry integrated on the silicon substrate.
  • the gas sensor further comprises an opening extending through the substrate and a membrane extending over this opening.
  • a patch of sensing material is arranged on the membrane, and electrodes are provided on the membrane in contact with the patch of sensing material.
  • the membrane forms a hot plate heated by a tungsten heater arranged in or on the membrane at the location of the patch.
  • a sensor of this type is describe in GB 2464016 . It uses a patch of metal oxide that changes its electrical conductance depending on the composition of the gas that it is exposed to.
  • the patch is heated to a suitable operating temperature, typically in the range of 300°C - 600°C.
  • the patch is arranged on a membrane for thermal insulation and thermally coupled to a tungsten heater.
  • Li et al. “Monolithic CMOS multi-transducer gas sensor microsystem for organic and inorganic ana-lytes", Sensors and Actuators B: Chemical, vol. 126, 29. September 2007, pages 431 - 440 , discloses two polymer-based sensor arrays based on capacitive and gravimetric transducers, a metal-oxide-based sensor array, the respective driving and signal processing electronics and a digital communication interface.
  • the system is very flexible and can provide different information of interest:
  • the capacitive sensors can, e.g., act as humidity sensors to deal with the cross-sensitivity of the metal-oxide-based sensors to water, or the capacitive sensors can be coated with differently thick polymer layers to detect organic volatiles even in a background of water.
  • the gas sensor comprises a silicon substrate with CMOS circuitry integrated on the silicon substrate.
  • An opening extends through the substrate, and a membrane extends over this opening in order to form a hotplate for receiving a patch of sensing material.
  • Electrodes are arranged on the membrane and are in electrical contact with the patch of sensing material in order to measure a signal indicative of the sensing material's electrical conductivity.
  • a heater of a material that comprises at least 90% of tungsten is arranged in or on the membrane at the location of the patch of sensing material.
  • the electrodes are of a material that comprises at least 90% of platinum. While electrodes of most other materials, such as tungsten or aluminum, tend to cause drift when being used in a gas sensor of this type, it is found that platinum electrodes are highly stable (chemically inert) and therefore reduce the device's tendency to drift. At the same time, platinum electrodes are well able to withstand the high temperatures on the hotplate.
  • the heater is made of a material that comprises at least 90% of tungsten, which also exhibits high temperature stability and is robust against electromigration.
  • Tungsten has a high conductivity, which allows to generate a high heating power over a small heater cross section with low supply voltage - this is particularly advantageous for low-voltage devices, e.g. for mobile applications.
  • the gas sensor comprises at least one via extending from said electrodes to said CMOS circuitry, wherein said via is formed in a lower section of a material that comprises at least 90% of tungsten and in an upper section of a material that comprises at least 90% of platinum, said upper section being above the lower section that is itself above the silicon substrate.
  • the gas sensor further comprises a temperature sensor of a material that comprises at least 90% of platinum, arranged on the membrane.
  • the electrodes and the temperature sensor can be commonly formed in a single step by structuring the same layer of material that comprises at least 90% of platinum.
  • the device can be equipped with at least one heat spreading structure of a material that comprises at least 90% of platinum or a material that comprises at least 90% of tungsten, in addition to the electrodes and the heater, i.e. the heat spreading structure is neither arranged to carry the heating current, nor it is required as electrode.
  • a heat spreading structure improves the temperature homogeneity over the patch of sensing material.
  • the heat spreading structure should not extend over the edge of the membrane, i.e. it should not extend over the bulk of the silicon substrate.
  • the heat spreading structure should not extend further than the region heated by the heater.
  • the layer of material that comprises at least 90% of platinum is advantageously applied by sputtering.
  • Ion etching is advantageously used for forming structures with inclined edges from the layer of material that comprises at least 90% of platinum.
  • This etching technique allows to form such inclined edges, i.e. edges that extend under an inclined angle ⁇ 90°, in particular between 30 and 60°, to the surface of the substrate.
  • Such faceted edges make it easier to apply a passivating cover layer over the platinum layer.
  • the heater (and any further structure of a material that comprises at least 90% oftungsten) is advantageously formed by a Damascene process that comprises the following steps:
  • This process allows to form laterally fine structures of large thickness. Further, it yields a flat surface that allows to keep the subsequently applied layers thin, thus allowing to manufacture a very thin membrane with low thermal conductivity. Also, this flat surface allows to form very fine platinum structures above it using photolithography.
  • the above step of removing the layer of material that comprises at least 90% of tungsten where it does not extend into the trenches is advantageously carried out by means of polishing the layer of material that comprises at least 90% of tungsten, in particular by using chemical mechanical polishing, also called chemical-mechanical planarization.
  • the layer of material that comprises at least 90% of tungsten is advantageously manufactured using chemical vapor deposition.
  • Terms indicating a vertical direction or arrangement such as “top”, “bottom”, “above” or “below” relate to a frame of reference where the batch of material layers forming the membrane are arranged on top, i.e. above, the substrate.
  • the substrate is arranged, by definition, below the material layers and the membrane is located on top of the opening extending through the substrate.
  • lateral is used to describe directions parallel to the top and bottom surfaces of the semiconductor substrate.
  • structure A is at a level above a structure B, then structure A is arranged in a material layer that was applied to the top surface of the substrate after forming structure B. Structure A may, however, be laterally offset in respect to structure B.
  • tungsten as used herein is to be understood as designating pure tungsten as well as any material, in particular an alloy, comprising at least 90%, in particular at least 95%, of tungsten.
  • platinum as used herein is to be understood as designating pure platinum as well as any material, in particular an alloy, comprising at least 90%, in particular at least 95%, of platinum.
  • the device is a device that uses the device:
  • Fig. 1 shows a gas sensor adapted to generate a signal indicative of the concentration of at least one gaseous analyte in a gaseous carrier, such as alcohol in air. It comprises a semiconductor substrate 1.
  • a sensor material whose electrical properties depend on the concentration of the analyte, is applied to substrate 1 in a patch 2.
  • patch 2 consists of a granular layer of tin oxide, or of another material whose electrical resistance depends on the presence and concentration of various compounds in the surrounding atmosphere.
  • This type of device is e.g. described in GB 2464016 or in WO 95/19563 .
  • Patch 2 is in electrical contact with at least a pair of interdigitated platinum electrodes 3, which are connected to processing circuitry 4.
  • Processing circuitry 4 is implemented as CMOS circuitry integrated on semiconductor substrate 1 and can e.g. comprise active components, such as transistors, at least one amplifier, at least one analog/digital converter, and/or interface circuitry, etc.
  • the sensor device further comprises a tungsten heater 5 positioned at the location of patch 2 in order to heat patch 2 to its operating temperature, which, for tin oxide, is e.g. typically at least 300°C.
  • the device can also be equipped with a temperature sensor 9a for measuring the temperature of the membrane 13 (see below).
  • This temperature sensor 9a is advantageously a platinum temperature sensor formed by a platinum conductor extending over membrane 13.
  • the device can be equipped with a heat spreading structure as schematically indicated under reference number 9b.
  • a heat spreading structure as schematically indicated under reference number 9b.
  • This is a structure of platinum or tungsten formed in at least one of the metal layers laterally extending within the membrane 13 designed to homogeneously spread the heat of heater 5 over the membrane.
  • heat spreading structure 9b is formed in the tungsten layer of heater 5.
  • it can be formed in the platinum layer that is used for manufacturing the electrodes 3.
  • Fig. 2 shows a sectional view of this type of device.
  • semiconductor substrate 1 comprises a bottom surface 7 (cf. Fig. 1 ) and a top surface 8.
  • a batch 9 of material layers is applied to top surface 8 and typically comprises a plurality of structured dielectric layers and a plurality of structured metal layers.
  • a bottommost part 10 of the various metal layers is typically of aluminum (or AlCu or copper) and forms interconnects of the CMOS circuitry.
  • the metal layers 10 are only shown schematically. They are separated by dielectric layers, typically SiO 2 layers, which are generally denoted by reference number 11.
  • Membrane 13 can have circular or rectangular shape or any other suitable shape.
  • none of the metal layers 10 extends into membrane 13.
  • Batch 9 can further comprise a layer of SiN (not shown) under tensile stress, which extends at least over membrane 13 and is anchored laterally outside membrane 13.
  • the tensile stress in this layer can be at least sufficiently large to exceed the compressive stress in the rest membrane 13, which leads to a total tensile stress in the membrane.
  • a tensile layer can be used to prevent the membrane from buckling.
  • Heater 5 is formed by structuring a tungsten layer into at least one metal conductor, which is located in a SiO 2 layer (or other dielectric layer) 14 on membrane 13. As seen in Fig 1 , the metal conductor can e.g. follow a meandering path. Layer 14 is arranged on the SiN layer.
  • a protective dielectric layer can be applied to the top of the device (not shown).
  • the patch 2 is arranged on top of the electrodes 3 and in contact therewith.
  • Figs. 3 - 6 show a method for manufacturing the sensor device.
  • silicon substrate 1 is covered, at its top surface 8, with the dielectric layers 11 as well as with the metal layers 10 in a series of steps as known in the art of CMOS semiconductor device manufacture.
  • a first SiO 2 -layer is applied to top surface 8, and then the first metal layer is applied onto the first SiO 2 -layer and structured using photolithography.
  • a second SiO 2 -layer is applied, and the second metal layer is applied thereto and structured, etc.
  • the tungsten layer for heater 5 is applied and structured using a Damascene process illustrated in Figs. 3 , 4 and 5 .
  • This type of process is typically known for structuring tungsten or copper interconnects.
  • dielectric layer 14 e.g. SiO 2
  • trenches 20 i.e. recesses
  • the trenches 20 reach all the way to one of the metal layers 10.
  • a layer 21 of tungsten is applied by means of chemical vapor deposition.
  • the thickness of the tungsten layer 21 is between 100 and 1000 nm, in particular between 200 and 600 nm.
  • top surface of this layer is then polished, as shown in Fig. 5 , using chemical-mechanical planarization, a process known to the skilled person.
  • the top section of tungsten layer 21 is removed in order to form a flat surface approximately at the top level (or somewhat below the original top level) of dielectric layer 14.
  • all of tungsten layer 21 is removed except those parts that are located in one of the trenches 20, thereby forming the structure of heater 5, vias 22 for connecting heater 5 to one at least of the metal layers 10, and a bottom section 23 of vias that will connect the structures of the platinum layer to at least one of the metal layers 10.
  • the described Damascene process allows to manufacture laterally fine but vertically thick structures of tungsten.
  • Heater 5 advantageously has a thickness of at least 150 nm, which allows to manufacture a heater of low resistivity suitable to be operated at low operating voltages of e.g. 1.8 V or less. Hence, the thickness of heater 5 and therefore the depth of the trenches 20 at the location of heater 5 should be at least 150 nm.
  • the lateral distance of neighbouring tungsten structures that can be manufactured in this manner can be very small, e.g. smaller than 5 ⁇ m, in particular smaller than 3 ⁇ m. This again makes the Damascene process very suitable for the present application.
  • a further advantage of the Damascene process is the resulting excellent step coverage at the location of the tungsten-CMOS interconnects, which avoids electromigration and therefore allows high operating temperatures (> 300 °C).
  • dielectric layer 15 e.g. SiO 2
  • openings 15a at the locations of the future vias for connecting the platinum structures to the tungsten structures.
  • a platinum layer is sputtered onto dielectric layer 15 and structured e.g. using photolithographic masking and reactive ion etching or lift-off techniques.
  • the flat surface that has been prepared by the Damascene process for manufacturing the tungsten structures very fine platinum structures can be manufactured with conventional photolithographic structuring processes.
  • the process for structuring the platinum layer advantageously uses anisotropic etching, in particular reactive ion etching, and/or a preparatory milling step, or lift-off techniques.
  • the thickness of the platinum layer and therefore the electrodes 3 is advantageously small, e.g. less than 200 nm, in particular less than 100 nm because platinum (which is a noble metal) is hard to etch. Such a small thickness also reduces the costs.
  • the layer should be stable at operating temperatures of e.g. 300 °C and more and have sufficient step coverage at the location of the vias 25, for which reason the thickness of the platinum layer should advantageously be at least 10 nm, in particular at least 50 nm.
  • vias 25 extending from the electrodes 3 to the metal layers 10 of the CMOS circuitry.
  • the upper section 24 of these vias 25 is of platinum and whose lower section 23 is of tungsten.
  • upper section 24 has a height exceeding the height (thickness) of the platinum layer elsewhere, but it may also have the same height as the platinum layer elsewhere.
  • the thickness of the electrodes is in the range of 50 to 300 nm, in particular in the range of 50 to 120 nm.
  • a protective dielectric cover layer 26 is applied over the device. This is illustrated schematically in Fig. 7 . As can be seen, using reactive ion etching for forming the structures 27 in the platinum layer allows to form the tapered structures with inclined edges 28, which simplifies the application of the advantageously thin protective layer 26.
  • opening 12 is etched from the bottom side, e.g. using a plasma process (such as deep reactive ion etching) or a wet process (such as anisotropic etching using KOH) after application of a photolithographic mask to bottom side 7 of substrate 1.
  • a plasma process such as deep reactive ion etching
  • a wet process such as anisotropic etching using KOH
  • patch 2 of the sensing material can be applied to the top of membrane 13, thereby forming the device shown in Figs. 1 and 2 .
  • the sensor device was a gas sensor having a metal-oxide, in particular tin oxide, as sensing material.
  • the device can, however, also use another sensing material as known to the skilled person.
  • a CMOS gas sensor which comprises a membrane 13 extending over an opening 12 of a silicon substrate 1.
  • a patch 2 of sensing material is arranged on the membrane 13 and in contact with electrodes 3 of platinum.
  • a heater 5 of tungsten is located in or on the membrane 13 at the location of the patch 2 of metal-oxide sensing material. Combining platinum electrodes 3 with a tungsten heater 5 on top of a CMOS structure provides a gas sensor of high reliability and stability.

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Claims (13)

  1. Un capteur de gaz comprenant un substrat de silicium (1)
    un circuit CMOS (4, 10) intégré sur ledit substrat de silicium (1),
    une ouverture (12) s'étendant à travers ledit substrat (1),
    une membrane (13) s'étendant au-dessus de ladite ouverture (12),
    un patch (2) de matériau de détection disposé sur ladite membrane (13),
    des électrodes (3) agencées sur ladite membrane (13) en contact électrique avec ledit patch (2) de matériau sensible,
    un élément chauffant (5), comprenant au moins 90% de tungstène disposé dans ou sur ladite membrane (13) à un emplacement dudit patch (2),
    caractérisé en ce que
    - lesdites électrodes (3) sont d'un matériau qui comprend au moins 90% de platine, et
    - au moins une via (25) s'étend depuis lesdites électrodes (3) vers ledit circuit CMOS (4, 10), dans lequel ladite voie est formée dans une section inférieure (23) d'un matériau qui comprend au moins 90% de tungstène et dans une section supérieure (24) d'un matériau qui comprend au moins 90% de platine, ladite section supérieure (24) étant au-dessus de la section inférieure (23) qui se trouve au-dessus du substrat de silicium (1).
  2. Le capteur de gaz selon la revendication 1 comprenant en outre un capteur de température (9a) d'un matériau qui comprend au moins 90% de platine, disposé sur ladite membrane (13).
  3. Capteur de gaz selon l'une quelconque des revendications précédentes, comprenant en outre au moins une structure de diffusion thermique (9b) d'un matériau qui comprend au moins 90% de platine ou au moins 90% de tungstène, en plus desdites électrodes (3) et ledit élément chauffant (5), disposée à l'emplacement dudit patch (2), et en particulier dans lequel ladite structure de diffusion thermique (9b) ne s'étend pas sur un bord de ladite membrane (13).
  4. Capteur de gaz selon l'une quelconque des revendications précédentes, dans lequel ledit circuit CMOS (4, 10) comprend une pluralité de couches métalliques (10), dans lequel ledit élément chauffant (5) et lesdites électrodes (3) sont disposés à un niveau supérieur au couches métalliques.
  5. Capteur de gaz selon l'une quelconque des revendications précédentes, dans lequel lesdites électrodes (3) ont une épaisseur inférieure à 200 nm, en particulier inférieure à 100 nm.
  6. Capteur de gaz selon l'une quelconque des revendications précédentes, dans lequel ledit élément chauffant (5) a une épaisseur d'au moins 150 nm.
  7. Procédé de fabrication du capteur de gaz selon l'une quelconque des revendications précédentes, comprenant les étapes de :
    formation dudit élément chauffant (5) en déposant et en structurant une couche de matériau qui comprend au moins 90% de tungstène et
    formation desdites électrodes (3) et de ladite au moins une via (25) en déposant et en structurant une couche de matériau qui comprend au moins 90% de platine, de sorte que ladite au moins une via (25) s'étende depuis lesdites électrodes (3) audit circuit CMOS (4, 10) et soit formée dans une section inférieure (23) d'un matériau qui comprend au moins 90% de tungstène et dans une section supérieure (24) d'un matériau qui comprend au moins 90% de platine, la section supérieure (24) étant au-dessus de la section inférieure (23) qui se trouve au-dessus du substrat de silicium (1).
  8. Procédé selon la revendication 7, comprenant l'étape consistant à former lesdites électrodes (3) et un capteur de température (9a) d'un matériau qui comprend au moins 90% de platine en structurant ladite couche du matériau qui comprend au moins 90% de platine.
  9. Procédé selon l'une quelconque des revendications 7 ou 8, dans lequel ladite couche du matériau qui comprend au moins 90% de platine est appliquée par pulvérisation cathodique.
  10. Procédé selon l'une quelconque des revendications 7 à 9, dans lequel ladite couche du matériau qui comprend au moins 90% de platine est structurée avec des bords inclinés (28) en utilisant des techniques de gravure ionique réactive et de décollage et dans lequel une couche de recouvrement (26) est appliqué sur la couche du matériau qui comprend au moins 90% de platine.
  11. Procédé selon l'une quelconque des revendications 7 à 10, dans lequel ledit élément chauffant (5) est formé par les étapes de :
    formation de tranchées (20) dans une surface dudit substrat (1),
    application de ladite couche (21) du matériau qui comprend au moins 90% de tungstène à ladite surface, et
    élimination de ladite couche (21) du matériau qui comprend au moins 90% de tungstène là où il ne s'étend pas dans les tranchées (20).
  12. Procédé selon la revendication 11, dans lequel ladite étape d'élimination de ladite couche (21) du matériau qui comprend au moins 90% de tungstène est réalisée en polissant ladite couche (21) du matériau qui comprend au moins 90% de tungstène.
  13. Procédé selon l'une quelconque des revendications 7 à 12, dans lequel ladite couche (21) du matériau qui comprend au moins 90% de tungstène est formée par dépôt chimique en phase vapeur.
EP13405019.4A 2013-01-31 2013-01-31 Capteur de gaz CMOS et son procédé de fabrication Active EP2762866B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP13405019.4A EP2762866B1 (fr) 2013-01-31 2013-01-31 Capteur de gaz CMOS et son procédé de fabrication
US14/160,986 US9466498B2 (en) 2013-01-31 2014-01-22 CMOS gas sensor and method for manufacturing the same

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EP13405019.4A EP2762866B1 (fr) 2013-01-31 2013-01-31 Capteur de gaz CMOS et son procédé de fabrication

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EP2762866B1 true EP2762866B1 (fr) 2017-08-09

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EP2762864B1 (fr) * 2013-01-31 2018-08-08 Sensirion AG Dispositif de capteur à membrane et son procédé de fabrication
JP6586076B2 (ja) * 2013-03-15 2019-10-02 フルークコーポレイションＦｌｕｋｅ Ｃｏｒｐｏｒａｔｉｏｎ 分離した無線モバイル装置を用いて赤外線画像に可視的な視聴覚の注釈付け
EP2975386B1 (fr) 2014-07-14 2020-09-02 Sensirion AG Structure d'élément chauffant pour un dispositif détecteur
US10571420B2 (en) 2014-12-15 2020-02-25 Robert Bosch Gmbh Nanolaminate gas sensor and method of fabricating a nanolaminate gas sensor using atomic layer deposition
CN107068681A (zh) * 2015-01-29 2017-08-18 江西师范大学 气敏层的材料为Nb2O5的CMOS气体传感器
US10578572B2 (en) * 2016-01-19 2020-03-03 Invensense, Inc. CMOS integrated microheater for a gas sensor device
EP3196639B1 (fr) 2016-01-21 2020-04-08 Sensirion AG Capteur de gaz avec structure de pont
EP3315956A1 (fr) 2016-10-31 2018-05-02 Sensirion AG Capteur à paramètres multiples avec structure de pont
US10383967B2 (en) 2016-11-30 2019-08-20 Invensense, Inc. Substance sensing with tracers
EP3403993B1 (fr) 2017-05-18 2021-06-30 Sensirion AG Puce à semi-conducteur
EP3531119A1 (fr) 2018-02-26 2019-08-28 Sensirion AG Capteur ayant une structure de pont
EP3367087A3 (fr) * 2018-04-30 2018-12-26 Sensirion AG Capteur pour déterminer la capacité thermique de fluides
WO2019185181A1 (fr) 2018-10-05 2019-10-03 Sensirion Ag Dispositif de régulation d'un taux de mélange d'un mélange gazeux
EP3812753B1 (fr) 2019-10-24 2023-11-29 Sensirion AG Détermination de paramètres spécifiques aux gaz à partir d'un transfert de chaleur dans le régime de saut de température

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US20140208830A1 (en) 2014-07-31
US9466498B2 (en) 2016-10-11

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