Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L27/00—Modulated-carrier systems
  • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
  • H04L27/14—Demodulator circuits; Receiver circuits
  • H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
  • H04L27/148—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using filters, including PLL-type filters
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
  • H03L7/00—Automatic control of frequency or phase; Synchronisation
  • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
  • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
  • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
  • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
  • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
  • H03L7/00—Automatic control of frequency or phase; Synchronisation
  • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
  • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
  • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
  • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
  • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
  • H03D7/16—Multiple-frequency-changing
  • H03D7/161—Multiple-frequency-changing all the frequency changers being connected in cascade
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
  • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
  • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals

Definitions

• the present invention relates to the field of the generation of microwave signals by frequency-agile microwave signal synthesizers and more particularly to synthesizers based on the use of a phase-locked loop for controlling, at a reference signal, the microwave signal at the desired frequency.
• the generation of a microwave signal at a desired frequency is most often implemented using a phase locked loop circuit.
• a phase locked loop circuit makes it possible to slave the frequency of the output signal to a multiple of the frequency of the reference signal.
• the output frequency can thus be chosen between several values by modifying only the frequency division value of the feedback loop.
• a disadvantage of such a circuit is that it generates a significant phase noise on the output signal. Indeed, the output phase noise is increased by a factor equal to the division factor of the phase loop with respect to the phase noise of the reference signal.
• the invention proposes an indirect frequency synthesizer, based on the principle of a phase-locked loop, but making it possible to considerably reduce the phase noise affecting the output signal while retaining the switching speed of the locking loop. phase between two frequency hopping and maintaining the spectral purity of the generated signal.
• the invention also makes it possible to improve the fineness of the frequency step of the generated signal.
• the invention finds its application advantageously for all types of systems requiring the generation of microwave signals that are frequency-agile, of high spectral purity and of low phase noise.
• the invention applies to the generation of radar transmission signals, frequency synthesizers used in metrology as well as clock circuits of analog-to-digital or digital-to-analog converters.
• the invention thus relates to a low-noise phase frequency synthesizer comprising, arranged in series, a first mixer receiving at its first input a reference signal at a reference frequency F r , a loop filter and a controlled voltage oscillator outputting a microwave signal at a second frequency F 0 and slaved to a multiple of said reference frequency F r , characterized in that it further comprises:
• ⁇ means for multiplying the frequency F 0 of said microwave signal by a factor N strictly greater than 1,
• ⁇ correcting means for the frequency NF 0 the output signal of said multiplication means configured to reduce this frequency NF 0 within a range of variation [F 0m in, F 0m ax] wherein the output frequency F 0 would vary if said multiplication factor N was equal to 1 ,
• Said frequency dividing means being connected at the output to the second input of the first mixer.
• the frequency correction means comprise at least a second mixer, a plurality of low noise phase local oscillators and a low-pass filter arranged such that:
• the second mixer receives at a first input the output of said frequency multiplying means to a first frequency NF 0, and on a second input a signal from one of said local oscillators Foi_ k configured frequency for correcting said first frequency NF 0 for the bring back into the variation interval [F 0m in, F 0m ax] of the output frequency F 0 ,
• said low-pass filter is configured to remove, from the output of said second mixer, the frequency components higher than the upper bound F ax 0m said interval [0m in F,
• the value of the frequency of the microwave output signal is obtained by choosing one of the output signals of said local oscillators presented at the second input of said second mixer and by the choice of the value. Mj of frequency division.
• said local oscillators are local oscillators with dielectric resonator.
• FIG. 1 a block diagram of a phase-locked loop according to the prior art
• FIG. 2 a block diagram of the indirect frequency synthesizer device according to the invention
• FIG. 3 a diagram illustrating the determination of the value of the frequency correction introduced into the feedback loop of the device according to the invention
• FIG. 1 illustrates, by a block diagram, the principle of a phase-locked loop 100 enabling the servocontrol of a microwave signal S 0 of frequency F 0 to a multiple of the frequency F r of a reference signal S r .
• the reference signal S r is compared, via a mixer 101, to a signal S, resulting from the frequency division 104 of the output microwave signal S 0 by a factor M 1.
• the signal produced at the output of the mixer 101 includes the information of the error in phase, or in frequency, between the two signals which it receives as input.
• This output signal is then filtered 102, and then supplied as input to a voltage-controlled local oscillator 103 which produces at its output the microwave signal S 0 whose frequency is equal to the frequency F r of the reference signal multiplied by the factor M ,.
• the assembly consisting of the mixer 101 and the filter 102 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,.
• the closed-loop operation guarantees a convergence of the system to an output signal whose frequency is such that the phase / frequency error at the output of the mixer 101 is substantially zero, to the defects of the components.
• phase noise is used herein with reference to the power spectral density relative to the signal strength.
• the integrated phase noise of the microwave signal S 0 becomes important.
• the phase noise of the output signal is increased by the factor M, relative to that of the reference signal.
• the only way to reduce the phase noise is to increase the frequency of the reference signal.
• such a modification is, in most cases, undesirable because it requires the change of the reference signal generating circuit, most often a quartz oscillator, as well as the frequency divider 1 04.
• the Increasing the reference frequency also introduces the disadvantage of an increase in the pitch of the frequency resolution of the output signal.
• FIG. 2 illustrates, by a block diagram, the indirect frequency synthesizer device 200 according to the invention.
• the device 200 receives as input a reference signal S r of frequency F r .
• the reference signal S r is compared, by means of a mixer 201, to a signal S, coming from the return path of the loop system 200 according to the invention.
• the signal resulting from the comparison of the signals S r and S is then filtered, by means of a loop filter 202, and then presented at the input of a voltage-controlled local oscillator 203.
• the microwave signal So at the desired frequency F 0 which is a multiple of the frequency F r of the reference signal, is obtained at the output of the local oscillator 203 which delivers a frequency signal proportional to the voltage applied to its input.
• the assembly consisting of the mixer 201 and the filter 202 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,. Part of the power of the microwave signal So is then taken and inputted to a frequency multiplier 204 which outputs a signal at the frequency F 0 multiplied by a factor N.
• a mixer circuit 205 is connected to a first input at the output of the multiplier 204 and at a second input to a switch 206 which is itself connected to one of N, a low-noise phase local oscillator OL ; OL k , OL N.
• Each of said local oscillators OL k delivers a signal at a predetermined frequency F 0 i_k as a function of the frequency F 0 of the generated microwave signal as well as the range of variations [F 0m in, F 0m ax] of this frequency.
• Said local oscillators OL k are, for example, local oscillators with dielectric resonator known under the English acronyms DRO (Dielectric Resonator Oscillator) or PDRO (Phase locked Dielectric Resonator Oscillator).
• the output signal of the mixer 205 comprises at least one component at a frequency equal to the difference in the frequencies of the two signals applied to its input.
• This output signal is applied at the input of a low pass filter 207 of cut-off frequency equal to F 0m ax in order to keep only the useful frequency component and to filter the component corresponding to the sum of the frequencies of the two input signals. . It is then frequency divided by a factor M j by a divider 208 and then applied to the second input of the mixer 201.
• One of the objectives of the device 200 according to the invention consists in limiting the phase noise ⁇ 0 on the output signal So, without modifying the frequency of the reference signal S r , nor the values of the frequency divider 208 of the feedback loop. .
• the introduction of the multiplier 204 has the effect of increasing by a single factor the loop gain of the synthesizer. To correct this phenomenon, it is necessary to correct the frequency of the output signal of the multiplier 204.
• the correction frequency FoLk is determined so as to reduce the frequency of the output signal of the mixer 205 in the range of variations [F 0m in, F 0m ax] expected by the divider 208 provided for a conventional operation of the state of the art before the invention, that is to say when the multiplier 204 is absent or when the multiplication factor N is equal to 1 .
• FIG. 3 illustrates, by a diagram, an example of determination of the correction frequency Foi_k- On the frequency axis 300 is represented, on the one hand, the interval 301 of variation of the frequency of the microwave signal S 0 generated and, on the other hand, the interval 302 of variation of the frequency of the output signal of the multiplier 204 itself decomposed into sub-intervals of identical width equal to the width F 0m ax-Fomin of the interval 301.
• a signal of frequency F 0 i_k is generated for each value of k varying from 0 to N-1, by a separate local oscillator with low phase noise.
• the output signal of the mixer 205 will, by construction, have a frequency Fj included in the interval 301 of variation of the output microwave signal S 0 .
• the frequency Fj of the output signal of the mixer 205 tends gradually to the product between the value of the division factor Mj and the reference frequency F r .
• this value becomes substantially equal to the ratio between the value of the division factor Mj and the reference frequency F r .
• the resulting phase noise on the generated microwave signal So is reduced by a factor N relative to a conventional phase-locked loop as described in FIG.
• FIG. 4 illustrates, by two diagrams, the phase noise generated on the microwave output signal of the device as a function of the bandwidth of the loop filter 1 02, 202.
• the left part of FIG. 4 represents the phase noise obtained for a conventional phase-locked loop. It is substantially equal to 20.log (Mi.6 r ) in the whole band of the loop filter 1 02, M being the dividing factor of the loop and ⁇ ⁇ the phase noise of the reference signal.
• the right part of FIG. 4 represents the phase noise obtained by using the device according to the invention. It is decreased by a factor N in the whole considered frequency band except in a narrow band around the frequency F 0 of the generated signal which corresponds to the loop band of the local oscillators OLk, typically of a width equal to one hundredth the width of the loop band of the device.
• phase noise affecting the microwave signal is thus reduced in a very large part of the loop band of the device according to the invention.
• the invention also has the advantage of not generating additional intermodulation lines because of the introduction of the second mixer 205. Indeed, these are filtered by the loop filter 202 and it is therefore not necessary to implement bandpass filtering at the output of the second mixer 205, a simple low-pass filter 207 is sufficient to eliminate the frequency component from the mixture 205 which corresponds to the sum of the input frequencies.
• the invention also has the additional advantage of improving the frequency resolution of the generated microwave signal. Indeed, the pitch between two possible generated frequencies becomes equal to F r / N instead of F r for a conventional phase-locked loop.

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• Physics & Mathematics (AREA)
• Spectroscopy & Molecular Physics (AREA)
• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

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• 2011
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• 2012
  • 2012-03-20 US US14/008,996 patent/US9077592B2/en not_active Expired - Fee Related
  • 2012-03-20 WO PCT/EP2012/054922 patent/WO2012130668A1/fr active Application Filing
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