EP2692060A1 - Low phase-noise indirect frequency synthesizer - Google Patents

Low phase-noise indirect frequency synthesizer

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Publication number
EP2692060A1
EP2692060A1 EP12709134.6A EP12709134A EP2692060A1 EP 2692060 A1 EP2692060 A1 EP 2692060A1 EP 12709134 A EP12709134 A EP 12709134A EP 2692060 A1 EP2692060 A1 EP 2692060A1
Authority
EP
European Patent Office
Prior art keywords
frequency
output
signal
mixer
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP12709134.6A
Other languages
German (de)
French (fr)
Inventor
Hervé SIMON
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
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Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Publication of EP2692060A1 publication Critical patent/EP2692060A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/148—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using filters, including PLL-type filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
    • H03D7/161—Multiple-frequency-changing all the frequency changers being connected in cascade
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals

Definitions

  • the present invention relates to the field of the generation of microwave signals by frequency-agile microwave signal synthesizers and more particularly to synthesizers based on the use of a phase-locked loop for controlling, at a reference signal, the microwave signal at the desired frequency.
  • the generation of a microwave signal at a desired frequency is most often implemented using a phase locked loop circuit.
  • a phase locked loop circuit makes it possible to slave the frequency of the output signal to a multiple of the frequency of the reference signal.
  • the output frequency can thus be chosen between several values by modifying only the frequency division value of the feedback loop.
  • a disadvantage of such a circuit is that it generates a significant phase noise on the output signal. Indeed, the output phase noise is increased by a factor equal to the division factor of the phase loop with respect to the phase noise of the reference signal.
  • the invention proposes an indirect frequency synthesizer, based on the principle of a phase-locked loop, but making it possible to considerably reduce the phase noise affecting the output signal while retaining the switching speed of the locking loop. phase between two frequency hopping and maintaining the spectral purity of the generated signal.
  • the invention also makes it possible to improve the fineness of the frequency step of the generated signal.
  • the invention finds its application advantageously for all types of systems requiring the generation of microwave signals that are frequency-agile, of high spectral purity and of low phase noise.
  • the invention applies to the generation of radar transmission signals, frequency synthesizers used in metrology as well as clock circuits of analog-to-digital or digital-to-analog converters.
  • the invention thus relates to a low-noise phase frequency synthesizer comprising, arranged in series, a first mixer receiving at its first input a reference signal at a reference frequency F r , a loop filter and a controlled voltage oscillator outputting a microwave signal at a second frequency F 0 and slaved to a multiple of said reference frequency F r , characterized in that it further comprises:
  • ⁇ means for multiplying the frequency F 0 of said microwave signal by a factor N strictly greater than 1,
  • ⁇ correcting means for the frequency NF 0 the output signal of said multiplication means configured to reduce this frequency NF 0 within a range of variation [F 0m in, F 0m ax] wherein the output frequency F 0 would vary if said multiplication factor N was equal to 1 ,
  • Said frequency dividing means being connected at the output to the second input of the first mixer.
  • the frequency correction means comprise at least a second mixer, a plurality of low noise phase local oscillators and a low-pass filter arranged such that:
  • the second mixer receives at a first input the output of said frequency multiplying means to a first frequency NF 0, and on a second input a signal from one of said local oscillators Foi_ k configured frequency for correcting said first frequency NF 0 for the bring back into the variation interval [F 0m in, F 0m ax] of the output frequency F 0 ,
  • said low-pass filter is configured to remove, from the output of said second mixer, the frequency components higher than the upper bound F ax 0m said interval [0m in F,
  • the value of the frequency of the microwave output signal is obtained by choosing one of the output signals of said local oscillators presented at the second input of said second mixer and by the choice of the value. Mj of frequency division.
  • said local oscillators are local oscillators with dielectric resonator.
  • FIG. 1 a block diagram of a phase-locked loop according to the prior art
  • FIG. 2 a block diagram of the indirect frequency synthesizer device according to the invention
  • FIG. 3 a diagram illustrating the determination of the value of the frequency correction introduced into the feedback loop of the device according to the invention
  • FIG. 1 illustrates, by a block diagram, the principle of a phase-locked loop 100 enabling the servocontrol of a microwave signal S 0 of frequency F 0 to a multiple of the frequency F r of a reference signal S r .
  • the reference signal S r is compared, via a mixer 101, to a signal S, resulting from the frequency division 104 of the output microwave signal S 0 by a factor M 1.
  • the signal produced at the output of the mixer 101 includes the information of the error in phase, or in frequency, between the two signals which it receives as input.
  • This output signal is then filtered 102, and then supplied as input to a voltage-controlled local oscillator 103 which produces at its output the microwave signal S 0 whose frequency is equal to the frequency F r of the reference signal multiplied by the factor M ,.
  • the assembly consisting of the mixer 101 and the filter 102 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,.
  • the closed-loop operation guarantees a convergence of the system to an output signal whose frequency is such that the phase / frequency error at the output of the mixer 101 is substantially zero, to the defects of the components.
  • phase noise is used herein with reference to the power spectral density relative to the signal strength.
  • the integrated phase noise of the microwave signal S 0 becomes important.
  • the phase noise of the output signal is increased by the factor M, relative to that of the reference signal.
  • the only way to reduce the phase noise is to increase the frequency of the reference signal.
  • such a modification is, in most cases, undesirable because it requires the change of the reference signal generating circuit, most often a quartz oscillator, as well as the frequency divider 1 04.
  • the Increasing the reference frequency also introduces the disadvantage of an increase in the pitch of the frequency resolution of the output signal.
  • FIG. 2 illustrates, by a block diagram, the indirect frequency synthesizer device 200 according to the invention.
  • the device 200 receives as input a reference signal S r of frequency F r .
  • the reference signal S r is compared, by means of a mixer 201, to a signal S, coming from the return path of the loop system 200 according to the invention.
  • the signal resulting from the comparison of the signals S r and S is then filtered, by means of a loop filter 202, and then presented at the input of a voltage-controlled local oscillator 203.
  • the microwave signal So at the desired frequency F 0 which is a multiple of the frequency F r of the reference signal, is obtained at the output of the local oscillator 203 which delivers a frequency signal proportional to the voltage applied to its input.
  • the assembly consisting of the mixer 201 and the filter 202 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,. Part of the power of the microwave signal So is then taken and inputted to a frequency multiplier 204 which outputs a signal at the frequency F 0 multiplied by a factor N.
  • a mixer circuit 205 is connected to a first input at the output of the multiplier 204 and at a second input to a switch 206 which is itself connected to one of N, a low-noise phase local oscillator OL ; OL k , OL N.
  • Each of said local oscillators OL k delivers a signal at a predetermined frequency F 0 i_k as a function of the frequency F 0 of the generated microwave signal as well as the range of variations [F 0m in, F 0m ax] of this frequency.
  • Said local oscillators OL k are, for example, local oscillators with dielectric resonator known under the English acronyms DRO (Dielectric Resonator Oscillator) or PDRO (Phase locked Dielectric Resonator Oscillator).
  • the output signal of the mixer 205 comprises at least one component at a frequency equal to the difference in the frequencies of the two signals applied to its input.
  • This output signal is applied at the input of a low pass filter 207 of cut-off frequency equal to F 0m ax in order to keep only the useful frequency component and to filter the component corresponding to the sum of the frequencies of the two input signals. . It is then frequency divided by a factor M j by a divider 208 and then applied to the second input of the mixer 201.
  • One of the objectives of the device 200 according to the invention consists in limiting the phase noise ⁇ 0 on the output signal So, without modifying the frequency of the reference signal S r , nor the values of the frequency divider 208 of the feedback loop. .
  • the introduction of the multiplier 204 has the effect of increasing by a single factor the loop gain of the synthesizer. To correct this phenomenon, it is necessary to correct the frequency of the output signal of the multiplier 204.
  • the correction frequency FoLk is determined so as to reduce the frequency of the output signal of the mixer 205 in the range of variations [F 0m in, F 0m ax] expected by the divider 208 provided for a conventional operation of the state of the art before the invention, that is to say when the multiplier 204 is absent or when the multiplication factor N is equal to 1 .
  • FIG. 3 illustrates, by a diagram, an example of determination of the correction frequency Foi_k- On the frequency axis 300 is represented, on the one hand, the interval 301 of variation of the frequency of the microwave signal S 0 generated and, on the other hand, the interval 302 of variation of the frequency of the output signal of the multiplier 204 itself decomposed into sub-intervals of identical width equal to the width F 0m ax-Fomin of the interval 301.
  • a signal of frequency F 0 i_k is generated for each value of k varying from 0 to N-1, by a separate local oscillator with low phase noise.
  • the output signal of the mixer 205 will, by construction, have a frequency Fj included in the interval 301 of variation of the output microwave signal S 0 .
  • the frequency Fj of the output signal of the mixer 205 tends gradually to the product between the value of the division factor Mj and the reference frequency F r .
  • this value becomes substantially equal to the ratio between the value of the division factor Mj and the reference frequency F r .
  • the resulting phase noise on the generated microwave signal So is reduced by a factor N relative to a conventional phase-locked loop as described in FIG.
  • FIG. 4 illustrates, by two diagrams, the phase noise generated on the microwave output signal of the device as a function of the bandwidth of the loop filter 1 02, 202.
  • the left part of FIG. 4 represents the phase noise obtained for a conventional phase-locked loop. It is substantially equal to 20.log (Mi.6 r ) in the whole band of the loop filter 1 02, M being the dividing factor of the loop and ⁇ ⁇ the phase noise of the reference signal.
  • the right part of FIG. 4 represents the phase noise obtained by using the device according to the invention. It is decreased by a factor N in the whole considered frequency band except in a narrow band around the frequency F 0 of the generated signal which corresponds to the loop band of the local oscillators OLk, typically of a width equal to one hundredth the width of the loop band of the device.
  • phase noise affecting the microwave signal is thus reduced in a very large part of the loop band of the device according to the invention.
  • the invention also has the advantage of not generating additional intermodulation lines because of the introduction of the second mixer 205. Indeed, these are filtered by the loop filter 202 and it is therefore not necessary to implement bandpass filtering at the output of the second mixer 205, a simple low-pass filter 207 is sufficient to eliminate the frequency component from the mixture 205 which corresponds to the sum of the input frequencies.
  • the invention also has the additional advantage of improving the frequency resolution of the generated microwave signal. Indeed, the pitch between two possible generated frequencies becomes equal to F r / N instead of F r for a conventional phase-locked loop.

Abstract

The invention relates to a low phase-noise frequency synthesizer (200), comprising, arranged in series, a first mixer (201) receiving, at the first input thereof, a reference signal (Sr) at a reference frequency Fr, a loop filter (202), and a voltage-controlled oscillator (203) outputting a microwave signal (So) at a second frequency Fo controlled so as to be a multiple of said reference frequency Fr, characterized in that the synthesizer further comprises: a means (204) for multiplying the frequency Fo of said microwave signal (So) by a factor N strictly greater than 1; a means (205, 207, OLk) for correcting the frequency (N.Fo) of the signal output by said multiplication means (204), which is configured to confine said frequency (N.Fo) within an interval [Fomin, Fomax] in which said output frequency Fo would vary if said multiplication factor N were equal to 1; a means (208) for dividing the frequency Fj of the signal output by said correction means (205, 207, OLk) by a factor equal to the expected ratio between said frequency Fj and the reference frequency Fr, said frequency-division means (208) being connected, at the output thereof, to the second input of the first mixer (201).

Description

Synthétiseur indirect de fréquences à faible bruit de phase  Indirect low frequency phase synthesizer
La présente invention se rapporte au domaine de la génération de signaux hyperfréquence par des synthétiseurs de signaux hyperfréquence agiles en fréquence et plus particulièrement aux synthétiseurs basés sur l'utilisation d'une boucle à verrouillage de phase pour asservir, à un signal de référence, le signal hyperfréquence à la fréquence désirée. The present invention relates to the field of the generation of microwave signals by frequency-agile microwave signal synthesizers and more particularly to synthesizers based on the use of a phase-locked loop for controlling, at a reference signal, the microwave signal at the desired frequency.
La génération d'un signal hyperfréquence à une fréquence désirée est le plus souvent mise en œuvre à l'aide d'un circuit à boucle à verrouillage de phase. Un tel circuit permet d'asservir la fréquence du signal en sortie à un multiple de la fréquence du signal de référence. La fréquence de sortie peut ainsi être choisie entre plusieurs valeurs en modifiant uniquement la valeur de division de fréquence de la boucle de retour. Un inconvénient d'un tel circuit est qu'il engendre un bruit de phase important sur le signal de sortie. En effet, le bruit de phase de sortie est augmenté d'un facteur égal au facteur de division de la boucle de phase par rapport au bruit de phase du signal de référence. L'invention propose un synthétiseur indirect de fréquences, basé sur le principe d'une boucle à verrouillage de phase, mais permettant de diminuer considérablement le bruit de phase affectant le signal de sortie tout en conservant la rapidité de commutation de la boucle à verrouillage de phase entre deux sauts de fréquence et en conservant la pureté spectrale du signal généré. L'invention permet également d'améliorer la finesse du pas en fréquence du signal généré. The generation of a microwave signal at a desired frequency is most often implemented using a phase locked loop circuit. Such a circuit makes it possible to slave the frequency of the output signal to a multiple of the frequency of the reference signal. The output frequency can thus be chosen between several values by modifying only the frequency division value of the feedback loop. A disadvantage of such a circuit is that it generates a significant phase noise on the output signal. Indeed, the output phase noise is increased by a factor equal to the division factor of the phase loop with respect to the phase noise of the reference signal. The invention proposes an indirect frequency synthesizer, based on the principle of a phase-locked loop, but making it possible to considerably reduce the phase noise affecting the output signal while retaining the switching speed of the locking loop. phase between two frequency hopping and maintaining the spectral purity of the generated signal. The invention also makes it possible to improve the fineness of the frequency step of the generated signal.
L'invention trouve son application avantageusement pour tous les types de systèmes nécessitant la génération de signaux hyperfréquence agiles en fréquence, de grande pureté spectrale et à faible bruit de phase. En particulier l'invention s'applique à la génération de signaux d'émission radar, aux synthétiseurs de fréquence utilisés en métrologie ainsi qu'aux circuits d'horloges de convertisseurs analogique-numérique ou numérique- analogique. The invention finds its application advantageously for all types of systems requiring the generation of microwave signals that are frequency-agile, of high spectral purity and of low phase noise. In particular the invention applies to the generation of radar transmission signals, frequency synthesizers used in metrology as well as clock circuits of analog-to-digital or digital-to-analog converters.
L'invention a ainsi pour objet un synthétiseur de fréquence, à faible bruit de phase, comportant, agencés en série, un premier mélangeur recevant sur sa première entrée un signal de référence à une fréquence de référence Fr, un filtre de boucle et un oscillateur contrôlé en tension délivrant en sortie un signal hyperfréquence à une deuxième fréquence F0 et asservie sur un multiple de ladite fréquence de référence Fr, caractérisé en ce qu'il comporte en outre : The invention thus relates to a low-noise phase frequency synthesizer comprising, arranged in series, a first mixer receiving at its first input a reference signal at a reference frequency F r , a loop filter and a controlled voltage oscillator outputting a microwave signal at a second frequency F 0 and slaved to a multiple of said reference frequency F r , characterized in that it further comprises:
■ des moyens de multiplication de la fréquence F0 dudit signal hyperfréquence par un facteur N strictement supérieur à 1 , ■ means for multiplying the frequency F 0 of said microwave signal by a factor N strictly greater than 1,
■ des moyens de correction de la fréquence N.F0 du signal de sortie desdits moyens de multiplication configurés pour ramener cette fréquence N.F0 dans un intervalle de variation [F0min, F0max] dans lequel la fréquence de sortie F0 varierait si ledit facteur de multiplication N était égal à 1 ,, ■ correcting means for the frequency NF 0 the output signal of said multiplication means configured to reduce this frequency NF 0 within a range of variation [F 0m in, F 0m ax] wherein the output frequency F 0 would vary if said multiplication factor N was equal to 1 ,,
■ des moyens de division de la fréquence Fj du signal de sortie desdits moyens de correction par un facteur égal au rapport attendu entre ladite fréquence Fj et la fréquence de référence Fr, ■ of the frequency dividing means Fj of the output signal of said correcting means by a factor equal to the ratio between said expected frequency F j and the reference frequency F r,
■ lesdits moyens de division de fréquence étant reliés en sortie à la seconde entrée du premier mélangeur. Said frequency dividing means being connected at the output to the second input of the first mixer.
Dans un aspect particulier de l'invention, les moyens de correction fréquentielle comportent au moins un second mélangeur, une pluralité d'oscillateurs locaux à faible bruit de phase et un filtre passe-bas agencés de telle sorte que :  In a particular aspect of the invention, the frequency correction means comprise at least a second mixer, a plurality of low noise phase local oscillators and a low-pass filter arranged such that:
■ le second mélangeur reçoit, sur une première entrée le signal de sortie desdits moyens de multiplication fréquentielle à une première fréquence N.F0, et sur une seconde entrée un signal délivré par un desdits oscillateurs locaux de fréquence Foi_k configurée pour corriger ladite première fréquence NF0 pour la ramener dans l'intervalle de variation [F0min, F0max] de la fréquence de sortie F0, ■ the second mixer receives at a first input the output of said frequency multiplying means to a first frequency NF 0, and on a second input a signal from one of said local oscillators Foi_ k configured frequency for correcting said first frequency NF 0 for the bring back into the variation interval [F 0m in, F 0m ax] of the output frequency F 0 ,
■ ledit filtre passe-bas est configuré pour éliminer, dans le signal de sortie dudit second mélangeur, les composantes fréquentielles supérieures à la borne supérieure F0max dudit intervalle [F0min, ■ said low-pass filter is configured to remove, from the output of said second mixer, the frequency components higher than the upper bound F ax 0m said interval [0m in F,
Fomax]■ Fomax] ■
Dans une variante de réalisation de l'invention, la valeur de la fréquence du signal hyperfréquence de sortie est obtenue par le choix d'un des signaux de sortie desdits oscillateurs locaux présenté à la seconde entrée dudit second mélangeur et par le choix de la valeur Mj de division en fréquence.  In an alternative embodiment of the invention, the value of the frequency of the microwave output signal is obtained by choosing one of the output signals of said local oscillators presented at the second input of said second mixer and by the choice of the value. Mj of frequency division.
Dans une variante de réalisation de l'invention, lesdits oscillateurs locaux sont des oscillateurs locaux à résonateur diélectrique.  In an alternative embodiment of the invention, said local oscillators are local oscillators with dielectric resonator.
Dans une variante de réalisation de l'invention, la fréquence Foi_k des signaux délivrés par chaque oscillateur local est déterminée, pour k variant de 0 à N-1 , par la relation suivante : F0i_k = (N-1 ). F0min + k. (F0max-Fomin) où k est égal à la partie entière du nombre N. (M» ~ MI avec Mi le rapport entre la fréquence de sortie la plus faible F0min et la fréquence de référence Fr, M2 le rapport entre la fréquence de sortie la plus élevée F0max et la fréquence de référence Fr, M, le rapport entre la fréquence de sortie F0 désirée et la fréquence de référence Fr. In an alternative embodiment of the invention, the frequency Foi_k of the signals delivered by each local oscillator is determined, for k varying from 0 to N-1, by the following relation: F 0 i_k = (N-1). F 0m in + k. (F 0m ax-MIF) where k is the integer part of the number N. (M '~ M I Mi w ith the ratio between the lowest output frequency F in 0m and the reference frequency F r, M 2 the ratio between the highest output frequency F 0m ax and the reference frequency F r , M, the ratio between the desired output frequency F 0 and the reference frequency F r .
Dans une variante de réalisation de l'invention, le facteur de division Mj des moyens (208) est déterminé à l'aide de la relation suivante Mj = N.M, - [(N-1 ).M1 + k.(M2-Mi)]. D'autres caractéristiques et avantages de l'invention apparaîtront à l'aide de la description qui suit, faite en regard de dessins annexés qui représentent : In an alternative embodiment of the invention, the division factor M j means (208) is determined using the following relationship M j = NM, - [(N-1) .M 1 + k. ( M 2 -Mi)]. Other characteristics and advantages of the invention will become apparent with the aid of the description which follows, given with regard to appended drawings which represent:
- la figure 1 , un schéma synoptique d'une boucle à verrouillage de phase selon l'art antérieur, - la figure 2, un schéma synoptique du dispositif synthétiseur indirect de fréquences selon l'invention, FIG. 1, a block diagram of a phase-locked loop according to the prior art, FIG. 2, a block diagram of the indirect frequency synthesizer device according to the invention,
- la figure 3, un diagramme illustrant la détermination de la valeur de la correction fréquentielle introduite dans la boucle de retour du dispositif selon l'invention,  FIG. 3, a diagram illustrating the determination of the value of the frequency correction introduced into the feedback loop of the device according to the invention,
- la figure 4, une illustration de la diminution du bruit de phase sur le signal hyperfréquence généré par comparaison entre les performances des solutions connues et celles de l'invention. La figure 1 illustre, par un schéma synoptique, le principe d'une boucle à verrouillage de phase 100 permettant l'asservissement d'un signal hyperfréquence S0 de fréquence F0 à un multiple de la fréquence Fr d'un signal de référence Sr. - Figure 4, an illustration of the reduction of phase noise on the microwave signal generated by comparison between the performance of known solutions and those of the invention. FIG. 1 illustrates, by a block diagram, the principle of a phase-locked loop 100 enabling the servocontrol of a microwave signal S 0 of frequency F 0 to a multiple of the frequency F r of a reference signal S r .
Le signal de référence Sr est comparé, par l'intermédiaire d'un mélangeur 101 , à un signal S, résultant de la division en fréquence 104 du signal hyperfréquence de sortie S0 d'un facteur M,. Le signal produit en sortie du mélangeur 101 comporte l'information de l'erreur en phase, ou en fréquence, entre les deux signaux qu'il reçoit en entrée. Ce signal de sortie est ensuite filtré 102, puis fourni en entrée d'un oscillateur local 103 contrôlé en tension qui produit à sa sortie le signal hyperfréquence S0 dont la fréquence est égale à la fréquence Fr du signal de référence que multiplie le facteur M,. L'ensemble constitué du mélangeur 101 et du filtre 102 réalise la fonction de comparateur de phase, ou de fréquence, entre le signal de référence Sr et le signal S,. Le fonctionnement en boucle fermée garantie une convergence du système vers un signal de sortie dont la fréquence est telle que l'erreur en phase/fréquence en sortie du mélangeur 101 est sensiblement nulle, aux défauts des composants près. The reference signal S r is compared, via a mixer 101, to a signal S, resulting from the frequency division 104 of the output microwave signal S 0 by a factor M 1. The signal produced at the output of the mixer 101 includes the information of the error in phase, or in frequency, between the two signals which it receives as input. This output signal is then filtered 102, and then supplied as input to a voltage-controlled local oscillator 103 which produces at its output the microwave signal S 0 whose frequency is equal to the frequency F r of the reference signal multiplied by the factor M ,. The assembly consisting of the mixer 101 and the filter 102 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,. The closed-loop operation guarantees a convergence of the system to an output signal whose frequency is such that the phase / frequency error at the output of the mixer 101 is substantially zero, to the defects of the components.
Ainsi, en faisant varier la valeur M, de division de fréquence 104, il est possible de choisir la fréquence du signal de sortie So dans une plage de valeurs [F0min, F0max]= [MiFr> M2Fr]. Le bruit de phase, exprimé en dBc/Hz, affectant le signal de sortie So, dans la bande de fréquences égale à la bande du filtre de boucle 1 02, est égal à θ0 = Qrei + 20.log(F0/Fr)= 6ref + 20.log(Mi) où 6ref représente la somme des bruits de phase du signal de référence et du mélangeur 1 01 . Le terme bruit de phase est utilisé ici en référence à la densité spectrale de puissance relative à la puissance du signal. Lorsque la fréquence F0 est élevée par rapport à la fréquence de référence Fr, le bruit de phase intégré du signal hyperfréquence S0 devient important. De façon générale, le bruit de phase du signal de sortie est augmenté du facteur M, par rapport à celui du signal de référence. La seule façon de réduire le bruit de phase consiste alors à augmenter la fréquence du signal de référence. Or, une telle modification n'est, le plus souvent, pas souhaitable car elle nécessite le changement du circuit générateur du signal de référence, le plus souvent un oscillateur à quartz, ainsi que du diviseur de fréquence 1 04. De plus, l'augmentation de la fréquence de référence introduit également l'inconvénient d'une augmentation du pas de la résolution fréquentielle du signal de sortie. Thus, by varying the frequency division value M 104, it is possible to choose the frequency of the output signal So in a range of values [F 0m in, F 0m ax] = [MiF r> M 2 F r ]. The phase noise, expressed in dBc / Hz, affecting the output signal So, in the frequency band equal to the band of the loop filter 1 02, is equal to θ 0 = Q re i + 20.log (F 0 / F r) = 6 + ref 20.log (Mi) where 6 ref represents the sum of the phase noise of the reference signal and the mixer 1 01. The term phase noise is used herein with reference to the power spectral density relative to the signal strength. When the frequency F 0 is high relative to the reference frequency F r , the integrated phase noise of the microwave signal S 0 becomes important. In general, the phase noise of the output signal is increased by the factor M, relative to that of the reference signal. The only way to reduce the phase noise is to increase the frequency of the reference signal. However, such a modification is, in most cases, undesirable because it requires the change of the reference signal generating circuit, most often a quartz oscillator, as well as the frequency divider 1 04. Moreover, the Increasing the reference frequency also introduces the disadvantage of an increase in the pitch of the frequency resolution of the output signal.
La figure 2 illustre, par un schéma synoptique, le dispositif 200 synthétiseur indirect de fréquences selon l'invention. FIG. 2 illustrates, by a block diagram, the indirect frequency synthesizer device 200 according to the invention.
Le dispositif 200 reçoit en entrée un signal de référence Sr de fréquence Fr. Le signal de référence Sr est comparé, au moyen d'un mélangeur 201 , à un signal S, issu de la voie de retour du système bouclé 200 selon l'invention. Le signal résultant de la comparaison des signaux Sr et S, est ensuite filtré, au moyen d'un filtre de boucle 202, puis présenté en entrée d'un oscillateur local 203 contrôlé en tension. Le signal hyperfréquence So à la fréquence désirée F0, multiple de la fréquence Fr du signal de référence, est obtenu en sortie de l'oscillateur local 203 qui délivre un signal de fréquence proportionnelle à la tension appliquée à son entrée. L'ensemble constitué du mélangeur 201 et du filtre 202 réalise la fonction de comparateur de phase, ou de fréquence, entre le signal de référence Sr et le signal S,. Une partie de la puissance du signal hyperfréquence So est ensuite prélevée et injectée en entrée d'un multiplieur de fréquence 204 qui produit en sortie un signal à la fréquence F0 multipliée par un facteur N. Un circuit mélangeur 205 est relié à une première entrée à la sortie du multiplieur 204 et à une seconde entrée à un commutateur 206 lui-même relié à un, parmi N, oscillateur local à faible bruit de phase OL ; OLk, OLN. Chacun desdits oscillateurs locaux OLk délivre un signal à une fréquence F0i_k prédéterminée en fonction de la fréquence F0 du signal hyperfréquence généré ainsi que de la plage de variations [F0min, F0max] de cette fréquence. Lesdits oscillateurs locaux OLk sont, par exemple, des oscillateurs locaux à résonateur diélectrique connus sous les sigles anglo-saxons DRO (Dielectric Resonator Oscillator) ou PDRO (Phase locked Dielectric Resonator Oscillator). The device 200 receives as input a reference signal S r of frequency F r . The reference signal S r is compared, by means of a mixer 201, to a signal S, coming from the return path of the loop system 200 according to the invention. The signal resulting from the comparison of the signals S r and S is then filtered, by means of a loop filter 202, and then presented at the input of a voltage-controlled local oscillator 203. The microwave signal So at the desired frequency F 0 , which is a multiple of the frequency F r of the reference signal, is obtained at the output of the local oscillator 203 which delivers a frequency signal proportional to the voltage applied to its input. The assembly consisting of the mixer 201 and the filter 202 performs the function of phase comparator, or frequency, between the reference signal S r and the signal S ,. Part of the power of the microwave signal So is then taken and inputted to a frequency multiplier 204 which outputs a signal at the frequency F 0 multiplied by a factor N. A mixer circuit 205 is connected to a first input at the output of the multiplier 204 and at a second input to a switch 206 which is itself connected to one of N, a low-noise phase local oscillator OL ; OL k , OL N. Each of said local oscillators OL k delivers a signal at a predetermined frequency F 0 i_k as a function of the frequency F 0 of the generated microwave signal as well as the range of variations [F 0m in, F 0m ax] of this frequency. Said local oscillators OL k are, for example, local oscillators with dielectric resonator known under the English acronyms DRO (Dielectric Resonator Oscillator) or PDRO (Phase locked Dielectric Resonator Oscillator).
Le signal de sortie du mélangeur 205 comporte au moins une composante à une fréquence égale à la différence des fréquences des deux signaux appliqués à son entrée. Ce signal de sortie est appliqué en entrée d'un filtre passe bas 207 de fréquence de coupure égale à F0max afin de ne conserver que la composante fréquentielle utile et de filtrer la composante correspondant à la somme des fréquences des deux signaux d'entrée. Il est ensuite divisé en fréquence d'un facteur Mj par un diviseur 208 puis appliqué à la seconde entrée du mélangeur 201 . The output signal of the mixer 205 comprises at least one component at a frequency equal to the difference in the frequencies of the two signals applied to its input. This output signal is applied at the input of a low pass filter 207 of cut-off frequency equal to F 0m ax in order to keep only the useful frequency component and to filter the component corresponding to the sum of the frequencies of the two input signals. . It is then frequency divided by a factor M j by a divider 208 and then applied to the second input of the mixer 201.
Un des objectifs du dispositif 200 selon l'invention consiste à limiter le bruit de phase θ0 sur le signal de sortie So, sans modifier la fréquence du signal de référence Sr, ni les valeurs du diviseur de fréquence 208 de la boucle de retour. L'introduction du multiplieur 204 permet de diminuer d'un facteur N le bruit de phase θ0 qui est alors égal à θ0 = (M N) 6ref. One of the objectives of the device 200 according to the invention consists in limiting the phase noise θ 0 on the output signal So, without modifying the frequency of the reference signal S r , nor the values of the frequency divider 208 of the feedback loop. . The introduction of the multiplier 204 makes it possible to reduce by a factor N the phase noise θ 0 which is then equal to θ 0 = (MN) 6 re f.
Cependant l'introduction du multiplieur 204 change le fonctionnement d'une boucle à verrouillage de phase classique et il convient de la modifier pour réaliser la fonction première souhaitée, à savoir la synthèse d'un signal hyperfréquence So à une fréquence F0 multiple, par un facteur M,, de la fréquence Fr de référence et ajustable en fréquence dans une plage de variations [F0min, F0max]= [M-| .Fr, M2.Fr]. En effet, l'introduction du multiplieur 204 a pour effet d'augmenter d'un même facteur le gain de boucle du synthétiseur. Pour corriger ce phénomène, il est nécessaire de corriger la fréquence du signal de sortie du multiplieur 204. La fréquence de correction FoLk est déterminée de façon à ramener la fréquence du signal de sortie du mélangeur 205 dans la plage de variations [F0min, F0max] attendue par le diviseur 208 prévu pour un fonctionnement classique de l'état de l'art avant l'invention c'est-à-dire lorsque le multiplieur 204 est absent ou lorsque le facteur de multiplication N est égal à 1 . However, the introduction of the multiplier 204 changes the operation of a conventional phase-locked loop and it should be modified to achieve the desired first function, namely the synthesis of a microwave signal So at a multiple frequency F 0 , by a factor M ,, of the frequency F r of reference and adjustable in frequency within a range of variations [F 0m in, F 0m ax] = [M- | .F r , M 2 .F r ]. Indeed, the introduction of the multiplier 204 has the effect of increasing by a single factor the loop gain of the synthesizer. To correct this phenomenon, it is necessary to correct the frequency of the output signal of the multiplier 204. The correction frequency FoLk is determined so as to reduce the frequency of the output signal of the mixer 205 in the range of variations [F 0m in, F 0m ax] expected by the divider 208 provided for a conventional operation of the state of the art before the invention, that is to say when the multiplier 204 is absent or when the multiplication factor N is equal to 1 .
La figure 3 illustre, par un diagramme, un exemple de détermination de la fréquence de correction Foi_k- Sur l'axe des fréquences 300 est représenté, d'une part, l'intervalle 301 de variation de la fréquence du signal hyperfréquence S0 généré et, d'autre part, l'intervalle 302 de variation de la fréquence du signal de sortie du multiplieur 204 lui-même décomposé en sous-intervalles de largeur identique égale à la largeur F0max-Fomin de l'intervalle 301 . Le signal en sortie du multiplieur de fréquence 204, de fréquence F,= N. Mi. Fr, comprise dans l'intervalle [N. F0min+k. (F0max-Fomin) ; N. F0min+(k+1 ). (F0max-Fomin)], doit être corrigé d'une fréquence F0Lk = (N- 1 ). F0min + k. (Fomax-Fomin) comme illustré par la figure 3. FIG. 3 illustrates, by a diagram, an example of determination of the correction frequency Foi_k- On the frequency axis 300 is represented, on the one hand, the interval 301 of variation of the frequency of the microwave signal S 0 generated and, on the other hand, the interval 302 of variation of the frequency of the output signal of the multiplier 204 itself decomposed into sub-intervals of identical width equal to the width F 0m ax-Fomin of the interval 301. The output signal of the frequency multiplier 204, of frequency F, = N. Mi. F r , in the range [N. F 0 min + k. (F 0 max-Fomin); N. F 0 min + (k + 1). (F 0 max-Fomin)], must be corrected by a frequency F 0 Lk = (N-1). F 0 min + k. (Fomax-Fomin) as shown in Figure 3.
Ainsi, un signal de fréquence F0i_k est généré pour chaque valeur de k variant de 0 à N-1 , par un oscillateur local distinct à faible bruit de phase. Thus, a signal of frequency F 0 i_k is generated for each value of k varying from 0 to N-1, by a separate local oscillator with low phase noise.
Le signal de sortie du mélangeur 205 aura, par construction, une fréquence Fj comprise dans l'intervalle 301 de variation du signal hyperfréquence S0 de sortie. The output signal of the mixer 205 will, by construction, have a frequency Fj included in the interval 301 of variation of the output microwave signal S 0 .
La valeur de k est déterminée à l'aide de la relation suivante : * = £[jV. (^' " '} 1 , avec M^=F0mir]/Fr et M2=F0max/Fr. The value of k is determined using the following relation: * = £ [ jV ( ^ '"' } 1, where M ^ = F 0mir] / F r and M 2 = F 0 max / Fr.
(M 2 -M (M 2 -M
Une division de fréquence 208 d'une valeur Mj = N. M, - [(N-1 ). M-, + k. (M2- M-i )] est ensuite appliquée pour retrouver un signal, en entrée du comparateur de phase 201 , de fréquence sensiblement identique à la fréquence de référence Fr en régime établi. En régime transitoire, la fréquence Fj du signal de sortie du mélangeur 205 tend progressivement vers le produit entre la valeur du facteur de division Mj et la fréquence de référence Fr. En régime établi, cette valeur devient sensiblement égale au rapport entre entre la valeur du facteur de division Mj et la fréquence de référence Fr. A division of frequency 208 of a value Mj = N. M, - [(N-1). M-, + k. (M 2 - Mi)] is then applied to recover a signal, at the input of the phase comparator 201, with a frequency substantially identical to the reference frequency F r in steady state. In transient mode, the frequency Fj of the output signal of the mixer 205 tends gradually to the product between the value of the division factor Mj and the reference frequency F r . In steady state, this value becomes substantially equal to the ratio between the value of the division factor Mj and the reference frequency F r .
Les avantages de l'invention par rapport aux solutions connues sont multiples. The advantages of the invention over known solutions are many.
En premier lieu, le bruit de phase résultant sur le signal hyperfréquence généré So est diminué d'un facteur N par rapport à une boucle à verrouillage de phase classique telle que décrite selon la figure 1 .  Firstly, the resulting phase noise on the generated microwave signal So is reduced by a factor N relative to a conventional phase-locked loop as described in FIG.
La figure 4 illustre, par deux diagrammes, le bruit de phase généré sur le signal hyperfréquence de sortie du dispositif en fonction de la largeur de bande du filtre de boucle 1 02, 202.  FIG. 4 illustrates, by two diagrams, the phase noise generated on the microwave output signal of the device as a function of the bandwidth of the loop filter 1 02, 202.
La partie gauche de la figure 4 représente le bruit de phase obtenu pour une boucle à verrouillage de phase classique. Il est sensiblement égal à 20.log(Mi.6r) dans toute la bande du filtre de boucle 1 02, M, étant le facteur de division de la boucle et ΘΓ le bruit de phase du signal de référence. The left part of FIG. 4 represents the phase noise obtained for a conventional phase-locked loop. It is substantially equal to 20.log (Mi.6 r ) in the whole band of the loop filter 1 02, M being the dividing factor of the loop and Θ Γ the phase noise of the reference signal.
La partie droite de la figure 4 représente le bruit de phase obtenu en utilisant le dispositif selon l'invention. Il est diminué d'un facteur N dans toute la bande de fréquence considérée sauf dans une bande étroite autour de la fréquence F0 du signal généré qui correspond à la bande de boucle des oscillateurs locaux OLk, typiquement d'une largeur égale à un centième de la largeur de la bande de boucle du dispositif. The right part of FIG. 4 represents the phase noise obtained by using the device according to the invention. It is decreased by a factor N in the whole considered frequency band except in a narrow band around the frequency F 0 of the generated signal which corresponds to the loop band of the local oscillators OLk, typically of a width equal to one hundredth the width of the loop band of the device.
Le bruit de phase affectant le signal hyperfréquence est ainsi diminué dans une très large partie de la bande de boucle du dispositif selon l'invention.  The phase noise affecting the microwave signal is thus reduced in a very large part of the loop band of the device according to the invention.
L'invention présente également l'avantage de ne pas générer de raies d'intermodulations supplémentaires du fait de l'introduction du second mélangeur 205. En effet, celles-ci sont filtrées par le filtre de boucle 202 et il n'est donc pas nécessaire de mettre en œuvre un filtrage passe- bande en sortie du second mélangeur 205, un simple filtre passe-bas 207 est suffisant pour éliminer la composante fréquentielle issue du mélange 205 qui correspond à la somme des fréquences en entrée. The invention also has the advantage of not generating additional intermodulation lines because of the introduction of the second mixer 205. Indeed, these are filtered by the loop filter 202 and it is therefore not necessary to implement bandpass filtering at the output of the second mixer 205, a simple low-pass filter 207 is sufficient to eliminate the frequency component from the mixture 205 which corresponds to the sum of the input frequencies.
L'invention présente encore l'avantage supplémentaire d'améliorer la résolution fréquentielle du signal hyperfréquence généré. En effet, le pas entre deux fréquences générées possibles devient égal à Fr/N au lieu de Fr pour une boucle à verrouillage de phase classique. The invention also has the additional advantage of improving the frequency resolution of the generated microwave signal. Indeed, the pitch between two possible generated frequencies becomes equal to F r / N instead of F r for a conventional phase-locked loop.

Claims

REVENDICATIONS
1 . Synthétiseur de fréquence (200), à faible bruit de phase, comportant, agencés en série, un premier mélangeur (201 ) recevant sur sa première entrée un signal de référence (Sr) à une fréquence de référence Fr, un filtre de boucle (202) et un oscillateur contrôlé en tension (203) délivrant en sortie un signal hyperfréquence (S0) à une deuxième fréquence F0 asservie sur un multiple de ladite fréquence de référence Fr, caractérisé en ce qu'il comporte en outre : 1. Low-noise phase frequency synthesizer (200) comprising, arranged in series, a first mixer (201) receiving at its first input a reference signal (S r ) at a reference frequency F r , a loop filter (202) and a voltage controlled oscillator (203) outputting a microwave signal (S 0 ) at a second frequency F 0 slaved to a multiple of said reference frequency F r , characterized in that it further comprises:
■ des moyens (204) de multiplication de la fréquence F0 dudit signal hyperfréquence (S0) par un facteur N strictement supérieur à 1 , ■ means (204) for multiplying the frequency F 0 of said microwave signal (S 0) by a factor N strictly greater than 1,
■ des moyens (205, 207, OLk) de correction de la fréquence (N.F0) du signal de sortie desdits moyens (204) de multiplication configurés pour ramener cette fréquence (N.F0) dans un intervalle ■ means (205, 207, OLK) for correcting the frequency (NF 0) of the output signal of said means (204) for multiplying configured to reduce this frequency (NF 0) in an interval
[Fomin, Fomax] dans lequel ladite fréquence de sortie F0 varierait si ledit facteur de multiplication N était égal à 1 , [Fomin, Fomax] wherein said output frequency F 0 would vary if said multiplication factor N were equal to 1,
■ des moyens (208) de division de la fréquence Fj du signal de sortie desdits moyens (205, 207, OLk) de correction par un facteur égal au rapport attendu entre ladite fréquence Fj et la fréquence de référence Fr, ■ means (208) for dividing the frequency f of the output signal of said means (205, 207, LO k) and correction by a factor equal to the ratio between said expected frequency Fj and the reference frequency F r,
■ lesdits moyens (208) de division de fréquence étant reliés en sortie à la seconde entrée du premier mélangeur (201 ). Said frequency division means (208) being connected at the output to the second input of the first mixer (201).
2. Synthétiseur de fréquence (200) selon la revendication 1 caractérisé en ce que les moyens (205, 207, OLk) de correction fréquentielle comportent au moins un second mélangeur (205), une pluralité d'oscillateurs locaux (OLk) à faible bruit de phase et un filtre passe-bas (207) agencés de telle sorte que : 2. frequency synthesizer (200) according to claim 1 characterized in that the frequency correction means (205, 207, OLk) comprise at least a second mixer (205), a plurality of local oscillators (OL k ) at low phase noise and a low-pass filter (207) arranged such that:
■ le second mélangeur (205) reçoit, sur une première entrée le signal de sortie desdits moyens (204) de multiplication fréquentielle à une première fréquence N.F0, et sur une seconde entrée un signal délivré par un desdits oscillateurs locaux (OLk) de fréquence F0Lk configurée pour corriger ladite première fréquence NF0 pour la ramener dans l'intervalle de variation [F0min, F0max] de la fréquence de sortie F0, The second mixer (205) receives, on a first input, the output signal of said frequency multiplying means (204) at a first frequency NF 0 , and at a second input a signal delivered by one of said local oscillators (OL k ) of frequency F 0 Lk configured to correct said first frequency NF 0 to bring it back into the range of variation [F 0m in , F 0m ax] of the output frequency F 0 ,
■ ledit filtre (207) passe-bas est configuré pour éliminer, dans le signal de sortie dudit second mélangeur (205), les composantes fréquentielles supérieures à la borne supérieure F0max dudit intervalle [F0min, F0max]- ■ said filter (207) low-pass is configured to remove, from the output of said second mixer (205), the frequency components higher than the upper bound of said interval ax F 0m [F in 0m, 0m F ax] -
3. Synthétiseur de fréquence (200) selon la revendication 2 caractérisé en ce que la valeur de la fréquence du signal hyperfréquence de sortie (S0) est obtenue par le choix d'un des signaux de sortie desdits oscillateurs locaux (OLk) présenté à la seconde entrée dudit second mélangeur (205) et par le choix de la valeur Mj de division en fréquence (208). 3. frequency synthesizer (200) according to claim 2 characterized in that the value of the frequency of the output microwave signal (S 0 ) is obtained by the choice of one of the output signals of said local oscillators (OLk) presented in the second input of said second mixer (205) and the selection of the frequency dividing value M j (208).
4. Synthétiseur de fréquence (200) selon l'une des revendications 2 ou 3 caractérisé en ce que lesdits oscillateurs locaux (OLk) sont des oscillateurs locaux à résonateur diélectrique. 4. frequency synthesizer (200) according to one of claims 2 or 3 characterized in that said local oscillators (OLk) are local oscillators with dielectric resonator.
5. Synthétiseur de fréquence (200) selon l'une des revendications 2, 3 ou 4 caractérisé en ce que la fréquence Foi_k des signaux délivrés par chaque oscillateur local (OLk) est déterminée, pour k variant de 0 à N-1 , par la relation suivante : F0i_k = (N-1 ).F0min + k.(F0max-Fomin) où k est égal à la partie entière du nombre N. (M» ~ MI avec M le rapport entre la 5. Frequency synthesizer (200) according to one of claims 2, 3 or 4 characterized in that the frequency Foi_k of the signals delivered by each local oscillator (OL k ) is determined, for k varying from 0 to N-1, by the following relation:. F 0 I_k = (N-1) .F + k 0m in (F 0m ax-MIF) where k is the integer part of the number N. (M 'M ~ I w ith the M relationship between
(M2 - MX ) (M 2 - M X )
fréquence de sortie la plus faible F0min et la fréquence de référence Fr, M2 le rapport entre la fréquence de sortie la plus élevée F0max et la fréquence de référence Fr, M, le rapport entre la fréquence de sortie F0 désirée et la fréquence de référence Fr. lowest output frequency F 0m in and the reference frequency F r , M 2 the ratio between the highest output frequency F 0m ax and the reference frequency F r , M, the ratio of the output frequency F 0 desired and the reference frequency F r .
6. Synthétiseur de fréquence (200) selon la revendication 5 caractérisé en ce que le facteur de division Mj des moyens (208) est déterminé à l'aide de la relation suivante Mj = N.M, - [(N-1 ).M + k.(M2-M )]. 6. frequency synthesizer (200) according to claim 5 characterized in that the division factor M j means (208) is determined using the following relationship M j = NM, - [(N-1). M + k (M 2 -M)].
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Also Published As

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FR2973610B1 (en) 2013-11-01
WO2012130668A1 (en) 2012-10-04
US9077592B2 (en) 2015-07-07
US20140016727A1 (en) 2014-01-16
FR2973610A1 (en) 2012-10-05

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