EP2603936B1 - Shunting layer arrangement for leds - Google Patents

Shunting layer arrangement for leds Download PDF

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Publication number
EP2603936B1
EP2603936B1 EP11754489.0A EP11754489A EP2603936B1 EP 2603936 B1 EP2603936 B1 EP 2603936B1 EP 11754489 A EP11754489 A EP 11754489A EP 2603936 B1 EP2603936 B1 EP 2603936B1
Authority
EP
European Patent Office
Prior art keywords
contacts
wire bond
metal
current
light blocking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP11754489.0A
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German (de)
English (en)
French (fr)
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EP2603936A1 (en
Inventor
Toni Lopez
Rafael Ignacio Aldaz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Intellectual Property and Standards GmbH
Koninklijke Philips NV
Original Assignee
Philips Intellectual Property and Standards GmbH
Koninklijke Philips NV
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Publication of EP2603936A1 publication Critical patent/EP2603936A1/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/831—Electrodes characterised by their shape
    • H10H20/8316—Multi-layer electrodes comprising at least one discontinuous layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/831—Electrodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/832—Electrodes characterised by their material
    • H10H20/835—Reflective materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
    • H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors

Definitions

  • This invention relates to light emitting diodes (LEDs) and, in particular, to a patterned metal layer on the light emitting surface LED die that improves current distribution yet does not increase light blockage.
  • LEDs light emitting diodes
  • Fig. 1 is a top down view of an LED die 10, and Fig. 2 is a simplified cross-sectional view of the LED 10 along line 2-2 in Fig. 1 .
  • the LED die 10 is GaN based and has its growth substrate removed. The structure is well known.
  • a bottom metal anode electrode 12 is typically bonded directly to a submount pad or to a circuit board.
  • a metal reflector 14 over the electrode 12 reflects light upward.
  • the LED's epitaxially-grown semiconductor layers include a first p-type layer 16, a p-type cladding layer 18, an active layer 20, an n-type cladding layer 22, a first n-type layer 24, and a second n-type layer 26.
  • the various p and n-type layers that interface between the cladding layers and the metal contacts may have different doping amounts and different compositions to achieve different functions such as lattice matching and current spreading. There may be many more layers.
  • the semiconductor layers are transparent.
  • a transparent current spreading layer 28 is formed over the second n-type layer 26, and a metal cathode electrode 30 is electrically connected to an edge of the current spreading layer 28.
  • a wire (not shown) is bonded to the cathode electrode 30.
  • the current-spreading layer material is selected for low optical loss, low resistivity, and good electrical contact. Suitable materials for the current-spreading layer 28 include are Indium Tin Oxide, Zinc Oxide, or other transparent conducting oxides.
  • the current spreading layer 28 is only a few microns thick so has a low vertical resistance and a much higher lateral resistance. It is important that the current distribution over the p-type cladding layer 18 and n-type cladding layer 22 is fairly uniform to achieve uniform light generation across the active layer 20.
  • a low-resistance metal shunting layer 32 is patterned to extend across the current spreading layer 28 yet block only a small amount of light. There is a tradeoff between minimizing current crowding and minimizing light blockage.
  • the shunting pattern shown in Fig. 1 is typical, with metal bus bars along the periphery of the die 10 and perpendicular metal bus bars connecting them. These shunting strips are formed very narrow to minimize light blockage.
  • Fig. 2 shows the current flow through the LED die 10 with thick arrows 36 and some photon trajectories with thin arrows 38. A simplified emitted light pattern 39 is also shown.
  • the top surface of the LED die 10 is roughened to increase light extraction.
  • lateral current between a conductive layer and a metal contact is not uniform across the contact.
  • the voltage is highest near the edge of the contact and drops substantially exponentially with distance.
  • the 1/e distance of the voltage curve is another way to determine transfer length.
  • the curve indicates that for contact widths smaller than 2 L t the contact resistance increases inversely proportional to w , as R C ric ⁇ R s wL L t 2 .
  • the contact resistance approaches the quantity R s 2 L L t as coth w 2 L t tends to 1.
  • the widths of the bus bars in Fig. 1 cannot be made too small or else the contact resistance will be too high, yet narrow widths are desirable to block less light.
  • US 2004/0065891A1 discloses a semiconductor laminating portion including a light emitting layer forming portion having at least an n-type layer and a p-type layer formed on a semiconductor substrate. On the semiconductor laminating portion, there are provided a current blocking layer in a partial portion and a current diffusing electrode on the entire surface thereof that exhibits translucency and electric conductivity.
  • US2005/0224823A1 discloses a semiconductor light emitting diode having a top surface with a current spreading layer and metal contacts thereon, whereby the metal contacts have leg structures which connect to enlarged portions for reducing contact resistance.
  • the shunting pattern comprises an array of metal circular dots having diameters that are wider than the widths of conventional bus bars and cross bars, but are on the order of 2L t -10L t so as not to block a significant amount of light.
  • the radius of each dot is greater than 2L t and less than 10 L t , and preferably less than 5L t .
  • the total dot area is less than the total area of the prior art bus bars and cross bars, so there is less blockage of light.
  • Shapes other than circular dots can be used, such as polygons (e.g., squares and rectangles). All such shapes are referred to herein as dots.
  • the widths of the dots are about 15 microns for the typical metals used and current spreading layer used, in order to ensure low contact resistance.
  • Each dot represents a current injection area.
  • the top surface area of an LED die will have about 1% of its surface covered by the dots.
  • the total area of the dots will be about 0.01 mm 2 .
  • the top surface area of an LED die covered by the dots is preferably less than 5%.
  • the dots are connected with a grid of very thin metal connectors, where the contact resistance between the metal connectors and the current spreading layer is relatively high, due the width of the connectors being much less than 2L t , but has little effect on current injection since the current is being injected by the dots.
  • a wire bond electrode is formed near the middle of the top surface of the LED to create a more uniform current distribution.
  • some dots are also connected to the wire bond electrode with radially extending thin metal connectors to cause the connection resistances between the dots and the wire bond electrode to be more uniform.
  • the dots are formed larger as the dots are located further from the wire bond electrode to create more uniform current distribution over the entire surface of the LED.
  • the dots are spaced closer and closer together as they extend away from the wire bond electrode to create more uniform current distribution.
  • a concentric shunting ring surrounding the wire bond electrode at a certain distance is used to reduce current crowding under and around the periphery of the wire bond electrode.
  • the width of the bar is reduced near the corners to reduce or eliminate current crowding near the corners.
  • an angled mirror structure is formed beneath each dot and connecting grid, The mirror below each dot and connector not only reflects light away from the absorbing underside of each dot/connector but also avoids any current crowding directly below each dot (and to a lesser extend below each connector) by causing the active layer below each dot to not generate light.
  • each mirror is formed in a trench that extends through the active layer below each dot and connector.
  • Fig. 4 illustrates one embodiment of a metal shunting pattern 40 on the top surface of an LED die, in accordance with one embodiment of the invention.
  • the LED die may have the same layers as the prior art LED die in Fig. 2 .
  • Circular contacts 42 are preferred due to their substantially uniform current pattern.
  • I 0 and I 1 are the modified Bessel functions of the first and second kind, respectively.
  • the contact resistance of a circle contact increases dramatically for r c ⁇ 2 L t . Therefore, in the preferred embodiment, the radius of each circular contact is between about 2L t to 10 L t .
  • a shunting layer pattern may consist of a number of geometric shapes whose characteristics allow to selectively control the locations of current injection but are limited in size to not adversely affect light output. This can be applied, for instance, to improve current uniformity through the active layer of the device with minimum metal-semiconductor contact area.
  • Narrow metal connectors 44 are arranged in a grid to connect the contacts 42 together.
  • the connectors 44 have widths preferably less than 2L t since they are not required to inject current into the LED, and wider connectors will increase the blockage of light.
  • the contacts 42 and connectors 44 preferably are a multilayer composition of metals that provide low resistance yet do not migrate into the semiconductor layers.
  • Fig. 5 shows the shunting pattern of Fig. 4 with a relatively large wire bond electrode 46 located near the middle of the LED die surface for substantially uniform current distribution.
  • the size of the electrode 46 is preferably a minimum size to achieve a good wire bond.
  • Fig. 6 shows the shunting pattern of Fig. 5 with additional radial connectors 48 between the wire bond electrode 46 and various contacts 42. These radial connectors 48 provide a parallel connector path to the outer contacts 42 for more uniform current distribution, since the combined resistances of the grid connector 44 paths increase from the wire bond electrode 46.
  • Fig. 7 is a top down view of the top surface of an LED showing a metal shunting pattern having contacts 50 that increase in size (diameter) as the contacts 50 are located further and further away from the wire bond electrode 46.
  • the larger area contacts inherently reduce the space between contacts near the perimeter, this increasing the current injection near the perimeter to offset the increased resistance of the connectors 44 and 48 leading to the outer contacts 50.
  • Fig. 8 is a top down view of the top surface of an LED showing a metal shunting pattern having contacts 54 that increase in density as the contacts 54 are located further and further away from the wire bond electrode 46 to achieve a more uniform current density.
  • Fig. 9 is a top down view of the top surface of an LED die 55 showing a metal shunting pattern having square dots 56, an enlarged center wire bond dot 57, and narrow connectors 58 connecting the dots.
  • the arrangements and widths of the square dots may be similar to those of the circular dots described above.
  • the widths of the dots are about 15 microns for the typical metals used and current spreading layer used, in order to ensure low contact resistance (based on a graph similar to Fig. 3 for the particular materials used).
  • Each dot represents a current injection area.
  • the top surface area of an LED die will have about 1% of its surface covered by the dots.
  • the total area of the dots will be about 0.01 mm 2 . Circular dots of the same width as square dots cover less area, so would block less light.
  • the top surface area of an LED die covered by the dots is preferably less than 5%, such as 2%. Widths of the dots less than 5L t but slightly greater than 2L t are preferred, since widths greater than 2L t do not provide significantly reduced contact resistance, and light blockage should be minimized.
  • Fig. 10 is a cross-sectional view of the wire bond electrode 46 area having an underlying dielectric layer 64 to avoid current crowding under and around the periphery of the electrode 46.
  • the metal contacts the current spreading layer 28 with a ring having a width Wx.
  • Wx is preferably 0.5L t ⁇ Wx ⁇ L t .
  • Also shown is a wire 60 and bond metal 62.
  • Fig. 11 shows a concentric shunting ring 65 surrounding the wire bond electrode 46 at a certain distance.
  • the shunting ring 65 reduces current crowding under and around the periphery of the wire bond electrode 46.
  • the width (Wr) of the shunting ring 65 is proportional to L t , preferable higher than 0.1L t and lower than L t , to provide an adequately low current resistance.
  • the diameter (D) of the ring 65 is preferably at least 20% larger than the diameter of the wire bond electrode 46.
  • Fig. 12 is a top down view of the top surface of a prior art LED die showing a metal shunt 66 that goes around the periphery of the top surface of the LED, similar to Fig. 1 , with a wire bond electrode 68 near one corner. Due to the arms of the shunt 66 approaching each other at each corner, there will be current crowding near the corners, resulting in non-uniform light output and perhaps an over-current in those areas. To substantially prevent such current crowding in the corners, the metal shunt configuration of Fig. 13 may be used.
  • Fig. 13 is a close up of one corner of an LED die, showing that the metal shunt 70 has a reduced width Wc in the corners to reduce the current injection from each arm near the corner.
  • Wc is preferably less than L t (e.g., 0.1L t ) to increase the contact resistance needed to create a substantially uniform current distribution near the corner.
  • the width of the remaining part of the shunt is greater than L t .
  • a wire bond electrode is preferably located midway along a shunt arm to avoid current crowding near a corner. Each corner will be similar to Fig. 13 .
  • the contacts 42, 50, 56 in the middle area of the LED die are connected to the metal shunt 70 using the narrow connectors 44, 48 previously described.
  • Fig. 14 is a cross-sectional view of an LED die in accordance with one embodiment of the invention, where angled mirrors 76 are formed in trenches 78 below each circular contact 80 and grid connector.
  • the mirrors 76 reduce the blockage of light by the overlying circular contacts 80 and connectors and prevent the creation of high current density regions below each circular contact 80 and to a lesser extent below the connectors. Details regarding the formation of such mirrors 76 are found in US Application Serial No. 12/770,550, by Rafael Aldaz, filed on 30 April 2010 .
  • the geometric shapes of the mirrors 76 may be tailored to enhance light extraction efficiency.
  • the top contacts 80 can be combined with the use of mirror walls located in the semiconductor underneath the contacts 80, as depicted in Fig. 14 .
  • the illustration shows a case where the mirror 76 (usually a metal) penetrates into the semiconductor and crosses the active layer 20 in the regions underneath the contacts 80.
  • the mirror 76 is covered with a transparent dielectric 84.
  • the population within the chip of these mirror walls enhances light extraction in detriment of reducing active area where photons generate. Because of this trade-off, it is preferable that the width Ws of each contact 80 is minimized and hence the number of mirrors maximized. This, in turn, translates into the minimization of the distance between mirrors that maximizes light extraction.
  • the pattern of the shunting layer should be designed to optimize the following performance related aspects:

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  • Led Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
EP11754489.0A 2010-08-10 2011-07-25 Shunting layer arrangement for leds Active EP2603936B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US37194410P 2010-08-10 2010-08-10
PCT/IB2011/053304 WO2012020346A1 (en) 2010-08-10 2011-07-25 Shunting layer arrangement for leds

Publications (2)

Publication Number Publication Date
EP2603936A1 EP2603936A1 (en) 2013-06-19
EP2603936B1 true EP2603936B1 (en) 2016-05-11

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Country Status (6)

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US (1) US8975658B2 (enrdf_load_stackoverflow)
EP (1) EP2603936B1 (enrdf_load_stackoverflow)
JP (1) JP5841600B2 (enrdf_load_stackoverflow)
CN (1) CN103201859B (enrdf_load_stackoverflow)
RU (1) RU2566403C2 (enrdf_load_stackoverflow)
WO (1) WO2012020346A1 (enrdf_load_stackoverflow)

Cited By (1)

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WO2020088877A1 (de) * 2018-10-31 2020-05-07 Osram Opto Semiconductors Gmbh Optoelektronischer halbleiterchip und verfahren zur herstellung eines optoelektronischen halbleiterchips

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DE102011111919B4 (de) * 2011-08-30 2023-03-23 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronischer Halbleiterchip
WO2013136684A1 (ja) * 2012-03-13 2013-09-19 パナソニック株式会社 有機エレクトロルミネッセンス素子
CN105609596A (zh) * 2015-09-11 2016-05-25 映瑞光电科技(上海)有限公司 具有电流阻挡结构的led垂直芯片及其制备方法
CN105322068B (zh) * 2015-11-17 2017-12-26 天津三安光电有限公司 发光二极管芯片及其制作方法
CN106972090A (zh) * 2017-04-14 2017-07-21 华南理工大学 一种弧线形n电极及垂直结构led芯片
KR102345618B1 (ko) 2017-09-01 2021-12-31 삼성전자주식회사 발광 다이오드 및 그의 제조 방법
TWI640075B (zh) * 2017-10-31 2018-11-01 友達光電股份有限公司 像素發光裝置
US11196230B2 (en) * 2017-12-27 2021-12-07 Lumentum Operations Llc Impedance compensation along a channel of emitters
US20210074880A1 (en) * 2018-12-18 2021-03-11 Bolb Inc. Light-output-power self-awareness light-emitting device
TWI855134B (zh) * 2020-08-19 2024-09-11 晶元光電股份有限公司 化合物半導體元件及化合物半導體裝置
CN112002789B (zh) * 2020-10-30 2021-01-15 华引芯（武汉）科技有限公司 一种大功率发光芯片及其制作方法

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Cited By (2)

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Publication number Priority date Publication date Assignee Title
WO2020088877A1 (de) * 2018-10-31 2020-05-07 Osram Opto Semiconductors Gmbh Optoelektronischer halbleiterchip und verfahren zur herstellung eines optoelektronischen halbleiterchips
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Also Published As

Publication number Publication date
WO2012020346A1 (en) 2012-02-16
JP2013533643A (ja) 2013-08-22
RU2013110304A (ru) 2014-09-20
US8975658B2 (en) 2015-03-10
CN103201859B (zh) 2016-03-02
CN103201859A (zh) 2013-07-10
EP2603936A1 (en) 2013-06-19
RU2566403C2 (ru) 2015-10-27
US20130187193A1 (en) 2013-07-25
JP5841600B2 (ja) 2016-01-13

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