EP2540139B1 - Mesure de tension pour del - Google Patents

Mesure de tension pour del Download PDF

Info

Publication number
EP2540139B1
EP2540139B1 EP11703901.6A EP11703901A EP2540139B1 EP 2540139 B1 EP2540139 B1 EP 2540139B1 EP 11703901 A EP11703901 A EP 11703901A EP 2540139 B1 EP2540139 B1 EP 2540139B1
Authority
EP
European Patent Office
Prior art keywords
voltage
led
light
emitting diode
current mirror
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP11703901.6A
Other languages
German (de)
English (en)
Other versions
EP2540139A2 (fr
Inventor
Dominique Combet
Thomas Kuch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tridonic AG
Original Assignee
Tridonic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tridonic AG filed Critical Tridonic AG
Publication of EP2540139A2 publication Critical patent/EP2540139A2/fr
Application granted granted Critical
Publication of EP2540139B1 publication Critical patent/EP2540139B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • H05B45/59—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits for reducing or suppressing flicker or glow effects

Definitions

  • the present invention relates to a voltage measuring circuit for one or more light-emitting diodes (LEDs) and to operating circuits for LEDs with such a circuit for measuring the voltage across an LED path which has one or more LEDs.
  • the LEDs can u.a. be organic or inorganic LEDs.
  • a control unit controls a clocked semiconductor power switch, by means of which an inductance is magnetized in its on state, wherein the inductance in the off state of the switch then eg. Via the LED discharges or demagnetizes.
  • the current does not necessarily have to flow through the light-emitting diode path during the switch-on and switch-off phase (see, for example, step-up converter).
  • the use of an operating circuit with control is advantageous. This requires a returned measured variable, for example the voltage drop across the LEDs or current flowing through the LEDs. It is advantageous to know the voltage across the LED track. It may also be advantageous to use the LED voltage for fault monitoring (eg short-circuit detection, overload detection, etc.).
  • DE 102006034371 A1 shows an operating circuit for measuring the voltage across the LED track, as in the adjacent Figure 5 is shown.
  • a switch S1 By means of a switch S1, an inductance L1 is selectively charged and discharged, which forms a freewheeling path with a diode D1 and the LED path L.
  • a filter / smoothing capacitor C1 Parallel to the LED path L, a filter / smoothing capacitor C1 is connected.
  • Bus voltage V in ie, a DC supply voltage
  • V kath the LED cathode voltage
  • a control unit determines from the difference between the two values the voltage U LED across the LED path L, which has one or more LEDs connected in series.
  • the measurement of the bus voltage V in takes place in this prior art via a Meßabgriff M1 at the midpoint of a two resistors R10, R11 having voltage divider ST1, which is connected in parallel to a supply voltage source VQ.
  • the measurement of the LED cathode voltage V kath takes place at a measuring tap M2 at the midpoint of a voltage divider ST2 having two resistors R20, R21, which is connected in series with the LED path L on the cathode side.
  • a power loss occurs at each voltage measuring tap M1, M2, that is to say at both voltage dividers ST1, ST2.
  • Such power dissipation may be, for example, up to several 100mW per LED channel, i. per LED track, with LED lighting means having multiple of these channels.
  • the cathode-side potential is pulled to zero because of the fact that the filter capacitor C1 is charged via the voltage divider ST2, while an arbitrarily high supply voltage (for example 400 volts) is applied to the anode side ) may be present.
  • an arbitrarily high supply voltage for example 400 volts
  • hot-swapping i.
  • the LED can be destroyed by high pulse currents, which are caused by the discharge of the filter capacitor.
  • the invention is therefore based on the object to provide a voltage measuring circuit, in which at least one of the above-mentioned problems is rudimentary reduced.
  • the invention deals with a voltage measuring circuit for a light-emitting diode path with at least one light-emitting diode.
  • a DC voltage is supplied to the light-emitting diode path.
  • Parallel to the light-emitting diode path the primary side of a current mirror is connected.
  • On the secondary side of the current mirror is now according to the invention at a measuring resistor to a Voltage drop across the LED strip proportional measuring voltage tapped.
  • the current mirror has at least two transistors. Of these, preferably one each connected to the primary and one on the secondary side of the current mirror. To improve the behavior of the current mirror but also circuits come with a larger number of transistors in question.
  • the transistors may be bipolar transistors and / or field-effect transistors.
  • the at least two transistors can also have identical electrical properties. They can be designed as an integrated component.
  • the measuring resistor on the secondary side of the current mirror is connected in a preferred embodiment in series with the secondary-side transistor.
  • Another resistor on the primary side of the current mirror is preferably connected in series with the primary-side transistor. This serves to dimension the current to be mirrored.
  • the invention deals with an operating circuit for at least a light-emitting diode path with at least one light-emitting diode.
  • This operating circuit has a switching regulator circuit.
  • the switching regulator circuit is supplied with a DC voltage.
  • the switching regulator circuit provides a constant current for the at least one light emitting diode path.
  • Parallel to the light-emitting diode path the primary side of a current mirror is connected. On the secondary side is at a resistor a tapped to the voltage drop across the LED strip proportional measurement voltage.
  • the operating circuit may have a voltage measuring circuit according to the invention, as has been described above.
  • the current flowing through the light-emitting diode path is preferably set by means of a coil and the timing of a switch controlled by a control and / or regulating circuit.
  • the measuring voltage can be compared as a feedback signal with a setpoint to clock depending on a possible difference as a control variable the switch. It serves as a monitor, for example as an error detection or shutdown (e.g., short circuit detection, overload detection, etc.). All evaluation functions, i. Control and fault monitoring and possibly shutdown) can be integrated in the example. As IC running control / regulating device.
  • the control and / or regulating circuit can determine the time duration between a switch-off and a subsequent switch-on of the switch as a function of the voltage across the at least one light-emitting diode and a time-constant characteristic variable of the coil.
  • the control and / or regulating circuit can also detect the coil characteristic via the rising slope of the coil current and by the inclusion of the coil voltage.
  • control and / or regulating circuit does not detect the current through the at least one light-emitting diode.
  • the control and / or regulating circuit may be an integrated circuit.
  • the control and / or regulating circuit can control the switch in the form of PWM-modulated signals.
  • the switching regulator may be, for example, a boost converter, a buck converter, a flyback converter, etc.
  • a capacitor is preferably connected, in particular for smoothing the DC voltage.
  • the invention also relates to an LED module, comprising at least one LED, which is supplied by the operating circuit.
  • the invention also relates to a lighting device, comprising an LED module with at least one LED, which is supplied by the operating circuit.
  • the invention also relates to a method for measuring voltage for a light-emitting diode path with at least one light emitting diode, the LED is supplied with a DC voltage, and parallel to the light emitting diode path, the primary side of a current mirror is connected, wherein on the secondary side of the current mirror to a measuring resistor to a voltage drop across the LED strip proportional measuring voltage is tapped.
  • FIGS. 1 to 4 show embodiments of the inventive LED voltage measuring circuit 1.
  • the LED voltage measuring circuit 1 is designed such that no measuring resistor (R20, R21) in series with the LED line L is required.
  • the LED voltage U LED reproducing, measuring signal U MESS coupled by means of a current mirror S.
  • FIGS. 2 to 4 show examples of possible embodiments of the current mirror S, wherein, however, any further embodiments of current mirrors, for example, can also be found with an even higher number of transistors, application.
  • the current mirror is formed with three transistors T1, T2, T3, of which two T2, T3 are arranged on the secondary side P2 of the current mirror, wherein the transistors T1, T2, T3 are formed as bipolar transistors.
  • the current mirror S is constructed with a transistor T1 on the primary side P1 and a transistor T2 on the secondary side P2, wherein the transistors T1, T2 are formed as bipolar transistors.
  • the current mirror S is constructed with a transistor T1 on the primary side P1 and a transistor T2 on the secondary side P2, wherein the transistors T1, T2 are formed as MOSFETs.
  • a current mirror S can also be constructed with three MOSFETs.
  • the LED voltage measuring circuit 1 according to the invention is used in an operating circuit 2 which is designed to operate a light-emitting diode path L.
  • the voltage measuring circuit according to the invention is not limited to the operating circuit 2, but rather can be used in any circuit in which a voltage measurement is to be made.
  • the invention is not limited to the field of LEDs, but can be used in a circuit with any load.
  • the operating circuit 2 is supplied with an input DC voltage Vin or a rectified AC voltage.
  • a switching regulator circuit SRS has a series connection between a semiconductor power switch S1 (for example, a MOSFET) and a freewheeling diode D1.
  • the series circuit magnetizes in the on state of the switch S1, an inductor L1 by means of the Switch S1 flowing current.
  • the energy stored in the coil L1 discharges in the form of a falling current i through the light-emitting diode path LED (the coil L1 is demagnetized). This results in a current profile in which rising cycles and declining cycles alternate with the periodicity of the switch control. Decisive for the light output is the temporally averaged current.
  • the triangular current through the light-emitting diode path can be smoothed by a filter capacitor C1.
  • a control and / or regulating circuit SR which sets the clocking of the switch S1, for example in the form of PWM-modulated signals as a manipulated variable of the control of the LED power.
  • the feedback signal to which is regulated (and which, for example, is compared with a target value) at least the current flowing through the LED path L is measured. This LED current can be measured at any point in the LED current path.
  • the voltage across the LED path is of interest for the correct operation of the LEDs.
  • the voltage across the LED track is measured by means of the current mirror circuit described.
  • the light-emitting diode path has one or more parallel, but preferably in series LEDs and / or OLEDs. These may be, for example, monochromatic LEDs, color-converted white LEDs and / or RGB-LED modules. In the case of the latter, it is particularly advantageous if each luminous color is arranged in a separate LED segment ("LED channel") and each LED segment is regulated via its own feedback signal, such as the current flowing in the LED segment.
  • the current mirror can have a transistor T1, T2 and a series-connected resistor R1, R2 on the primary side as well as on the secondary side.
  • the transistors in the embodiment of FIG Figure 4 to field effect transistors (FETs), in particular MOSFETs.
  • FETs field effect transistors
  • the current mirror can also be any other embodiment known from the prior art.
  • the actual measurement of the LED voltage takes place through the secondary side P2 of the current mirror S. Due to the current mirror function, the identical current flows on the secondary side as on the primary side of the current mirror S and thus through a secondary-side measuring resistor R2. The voltage Umess at this resistor R2 thus reflects the LED voltage Uled again.
  • the resistor R1 on the primary side P1 serves to dimension the measuring voltage Umess picked up at the resistor R2.
  • the measured voltage Umess is thus proportional to the voltage Uled, wherein the factor between the two voltages can be adjusted by the size of the resistors R1 and R2.
  • the measurement of the LED voltage for fault monitoring such as e.g. Short circuit detection or overload detection can be used on the LED track or in the output circuit or the wiring.
  • the measurement of the LED voltage can be used for the determination of the LED current or the LED temperature, so it can be done an indirect detection of the LED current or the LED temperature. It can be concluded by means of value tables or stored characteristics or formulas with the aid of the measured LED voltage on the LED current or the LED temperature.
  • the charge i. the voltage across the capacitor C1 parallel to the LED discharged via the resistor R1 of the primary side P1 of the current mirror S.
  • the voltage across the LED goes to zero.
  • the power loss in standby mode goes to zero stationary.
  • the light-emitting diode path L is no longer connected to ground via a measuring circuit on the cathode side, the problem of unwanted glaring of the LEDs is also reduced.
  • Another advantage is that when the LED is removed from the circuit, the voltage across the capacitor C1 is discharged through the resistor R1 on the primary side P1 of the current mirror. When the LED is then reinserted, the voltage of the charged capacitor C1 does not drop off directly, but rather a voltage across the LED will be applied again when it is switched on again.
  • the problem is that when re-inserting the cathode-side potential is pulled to zero due to the measuring channel, while the anode side, the supply voltage of, for example, 400 volts applied, thus resolved.
  • a so-called 'hot-swapping' which corresponds to the removal and re-insertion of an LED during operation, there is the risk that the LED will be destroyed becomes significantly smaller than in the prior art.
  • the 'hot-swapping' is electrically synonymous with an interrupt error, ie that the LED link is interrupted and then again supply voltage.
  • the voltage measuring circuit counteracts this risk in the case of 'hot-swapping', since the voltage across the capacitor C1 is discharged through the resistor R1 on the primary side P1 of the current mirror.
  • the two transistors T1 and T2 of the current mirror should have identical electrical properties, the two transistors are preferably integrated in one component.
  • a method for measuring voltage for a light-emitting diode path L with at least one light-emitting diode LED is possible, wherein the light-emitting diode is supplied with a DC voltage.
  • the primary side P1 of a current mirror S is connected.
  • a measuring voltage UMESS proportional to the voltage drop ULED across the light-emitting diode path L is tapped on a measuring resistor R2.
  • the current mirror measurement can be used to measure a DC current in a measuring branch P2 which is not connected in series with the light-emitting diode path. There is also no difference measurement (bus voltage minus cathode voltage) instead, but a direct measurement of the voltage across the LED track.
  • a measurement of the light-emitting diode path voltage is performed by means of a measuring resistor, which is not connected in series with the light-emitting diode path. But it is also no measurement of the LED current by means of a measuring resistor, which is connected in series with the light-emitting diode path, necessary by the voltage measuring circuit according to the invention.

Landscapes

  • Circuit Arrangement For Electric Light Sources In General (AREA)
  • Measurement Of Current Or Voltage (AREA)

Claims (13)

  1. Circuit de mesure de tension pour une ligne de diodes électroluminescentes (L) avec au moins une diode électroluminescente (LED), à laquelle est appliquée une tension continue,
    caractérisé en ce que
    parallèlement à la ligne de diodes électroluminescentes (1), le côté primaire (P1) d'un miroir de courant (S) est branché et, sur le côté secondaire (P2) du miroir de courant (S), au niveau d'une résistance de mesure (R2), est prélevée une tension de mesure (UMESS) proportionnelle à la chute de tension (ULED) sur la ligne de diodes électroluminescentes (L).
  2. Circuit de mesure de tension selon la revendication 1,
    caractérisé en ce que
    le miroir de courant (S) comprend au moins deux transistors (T1, T2), de préférence trois transistors (T1, T2, T3), dont au moins un est branché sur le côté primaire (P1) et au moins un est branché sur le côté secondaire (P2) du miroir de courant (S).
  3. Circuit de mesure de tension selon l'une des revendications précédentes, caractérisé en ce que
    les deux transistors (T1, T2) sont des transistors bipolaires ou des transistors à effet de champ.
  4. Circuit de mesure de tension selon l'une des revendications précédentes, caractérisé en ce que
    au moins deux transistors (T1, T2) présentent des propriétés identiques et sont conçus de préférence comme un composant intégré.
  5. Circuit de mesure de tension selon l'une des revendications précédentes, caractérisé en ce que
    la résistance de mesure (R2) est branchée sur le côté secondaire (P2) du miroir de courant en série avec le transistor branché sur le côté secondaire.
  6. Circuit de mesure de tension selon l'une des revendications précédentes, caractérisé en ce que
    une résistance (R1) est branché sur le côté primaire (P1) du miroir de courant (S) en série avec le transistor (T1) branché sur le côté primaire, qui sert à dimensionner la tension de mesure (Umess).
  7. Circuit d'exploitation pour au moins une ligne de diodes électroluminescentes (L) avec au moins une diode électroluminescente (LED), comprenant un circuit régulateur de commande (SRS) auquel est appliquée une tension continue (VIN) et qui génère un courant constant en moyenne dans le temps pour l'au moins une ligne de diodes électroluminescentes (L),
    comprenant en outre un circuit de mesure de tension selon l'une des revendications précédentes.
  8. Circuit d'exploitation selon la revendication 7,
    caractérisé en ce que le circuit d'exploitation comprend un circuit de mesure de tension selon les revendications 1 à 6.
  9. Circuit d'exploitation selon la revendication 7 ou 8,
    caractérisé en ce que
    le courant s'écoulant à travers la ligne de diodes électroluminescentes (L) est réglé au moyen d'une bobine (L1) et d'un commutateur (S1) cadencé par un circuit de commande et/ou de régulation (SR).
  10. Circuit d'exploitation selon l'une des revendications 7 à 9, caractérisé en ce que la tension de mesure (Umess) est utilisée en tant que signal de retour pour la surveillance, la détection d'une erreur, pour l'arrêt ou pour la régulation du cadencement du commutateur (S1).
  11. Module à LED comprenant au moins une diode électroluminescente (LED), qui est alimentée par un circuit d'exploitation selon l'une des revendications 7 à 10.
  12. Circuit d'exploitation comprenant un module à LED avec au moins une diode électroluminescente (LED), qui est alimentée par un circuit d'exploitation selon l'une des revendications 7 à 10.
  13. Procédé de mesure de tension pour une ligne de diodes électroluminescentes (L) avec au moins une diode électroluminescente (LED), une tension continue étant appliquée à la diode électroluminescente et, parallèlement à la ligne de diodes électroluminescentes (L), est branché le côté primaire (P1) d'un miroir de courant (S), caractérisé en ce que, sur le côté secondaire (P2) du miroir de courant (S), au niveau d'une résistance de mesure (R2), est prélevée une tension de mesure (UMESS) proportionnelle à la chute de tension (ULED) sur la ligne de diodes électroluminescentes (L).
EP11703901.6A 2010-02-18 2011-02-17 Mesure de tension pour del Active EP2540139B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102010002081A DE102010002081A1 (de) 2010-02-18 2010-02-18 LED-Spannungsmessung
PCT/EP2011/052329 WO2011101398A2 (fr) 2010-02-18 2011-02-17 Mesure de tension pour del

Publications (2)

Publication Number Publication Date
EP2540139A2 EP2540139A2 (fr) 2013-01-02
EP2540139B1 true EP2540139B1 (fr) 2016-10-05

Family

ID=44044112

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11703901.6A Active EP2540139B1 (fr) 2010-02-18 2011-02-17 Mesure de tension pour del

Country Status (3)

Country Link
EP (1) EP2540139B1 (fr)
DE (2) DE102010002081A1 (fr)
WO (1) WO2011101398A2 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011116231B4 (de) * 2011-10-17 2017-12-21 Austriamicrosystems Ag Beleuchtungsanordnung und Verfahren zum Erkennen eines Kurzschlusses bei Dioden
DE102012220761A1 (de) * 2012-11-14 2014-05-15 Bag Engineering Gmbh Multifunktionales Betriebsgerät zum Versorgen eines Verbrauchers wie einer LED-Einrichtung
CN104838725A (zh) * 2012-12-06 2015-08-12 赤多尼科两合股份有限公司 用于发光机构的操作装置
AT13688U1 (de) * 2012-12-06 2014-06-15 Tridonic Gmbh & Co Kg Betriebsgerät für Leuchtmittel
DE102020208944A1 (de) 2020-07-16 2022-01-20 Osram Gmbh Verfahren und schaltungsanordnung zur detektion eines teilausfalls eines leuchtmittels mit mindestens einem strang von halbleiterlichtquellen
DE102020008118A1 (de) 2020-12-08 2022-06-09 Elmos Semiconductor Se Verfahren zur sicherheitsrelevanten Erfassung des Spannungsabfalls über ein Leuchtmittel in einem Fahrzeug
DE102020132666B3 (de) 2020-12-08 2022-03-10 Elmos Semiconductor Se Vorrichtung und Verfahren zur sicherheitsrelevanten Erfassung des Spannungsabfalls über ein Leuchtmittel in einem Fahrzeug
CN113193910B (zh) * 2021-04-12 2022-10-18 武汉船舶通信研究所（中国船舶重工集团公司第七二二研究所） 一种led电光调制频率特性的自动测量装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2991893B2 (ja) * 1993-05-31 1999-12-20 富士通株式会社 発光素子の駆動回路及びこれを用いた光増幅中継器
JPH0792205A (ja) * 1993-09-27 1995-04-07 Matsushita Electric Works Ltd 電源電圧検知装置
JP3417891B2 (ja) * 1999-10-27 2003-06-16 株式会社オートネットワーク技術研究所 電流検出装置
DE10140331C2 (de) * 2001-08-16 2003-11-06 Siemens Ag Lichtzeichen zur Verkehrssteuerung und Verfahren zur Funktionsüberwachung eines solchen Zeichens
DE102004027676B4 (de) * 2004-04-30 2006-06-14 Siemens Ag Verfahren und Vorrichtung zum Prüfen wenigstens eines LED-Strangs
DE102006034371B4 (de) 2006-04-21 2019-01-31 Tridonic Ag Betriebsschaltung und Betriebsverfahren für Leuchtdioden
US7884557B2 (en) * 2006-07-14 2011-02-08 Wolfson Microelectronics Plc Protection circuit and method
AT504949B1 (de) * 2007-02-20 2008-11-15 Zizala Lichtsysteme Gmbh Schaltungsanordnung zur erkennung eines kurzschlusses von leuchtdioden
DE202007007777U1 (de) * 2007-06-01 2007-08-16 Conwys Ag Schaltungsanordnung
DE202007007776U1 (de) * 2007-06-01 2007-08-09 Conwys Ag Anhängeranschlußgerät
US8421375B2 (en) * 2007-06-25 2013-04-16 Ingersoll-Rand Company Amplification circuit and heat sink used with a light emitting apparatus having varying voltages
JP4994253B2 (ja) * 2008-01-24 2012-08-08 株式会社ジャパンディスプレイイースト 液晶表示装置

Also Published As

Publication number Publication date
DE102010002081A1 (de) 2011-08-18
WO2011101398A3 (fr) 2014-03-13
EP2540139A2 (fr) 2013-01-02
DE112011100594A5 (de) 2013-01-24
DE112011100594B4 (de) 2015-09-03
WO2011101398A2 (fr) 2011-08-25

Similar Documents

Publication Publication Date Title
EP2540139B1 (fr) Mesure de tension pour del
DE102005012625B4 (de) Verfahren sowie Schaltungsanordnung zur Ansteuerung von Leuchtdioden
EP2888800B1 (fr) Appareil de lumière de secours
DE19841490B4 (de) Schaltungsanordnung zum Schutz einer Serienschaltung aus mindestens zwei Leuchdioden vor dem Ausfall
DE102006013524B4 (de) Schaltwandler mit mehreren Wandlerstufen
DE102012107882A1 (de) Treiberschaltung zum effizienten Ansteuern einer grossen Anzahl von LEDs
WO2008116866A1 (fr) Convertisseur de tension pourvu de condensateurs mis en circuit et dispositif pour compenser des tensions de condensateur
DE19732828A1 (de) Schaltungsanordnung zur Ansteuerung eines Leuchtdioden-Arrays
DE102010008275B4 (de) Vorrichtung zur Energieversorgung von mehreren LED-Einheiten
DE19600074C2 (de) Fahrzeugbordnetz
DE102005056338B4 (de) Spannungskonverter und Verfahren zur Spannungskonversion
DE102012205349A1 (de) Schaltungsanordnung für eine LED-Lampe, LED-Lampe und entsprechendes Verfahren
DE102010048951A1 (de) Stromquelle mit Dimmvorrichtung
DE19841270A1 (de) Ansteuerschaltung zum Erzeugen eines konstanten Stromes durch zumindest eine Leuchtdiode
DE10030176A1 (de) Entladungslampen-Lichtstromkreis
DE10206178A1 (de) Entladungslampen-Zündschaltung
EP2416624A1 (fr) Agencement de commutation et procédé de fonctionnement d'au moins une première et une seconde DEL
DE112015007243B4 (de) Festkörperbeleuchtungsanordnung
EP3393207B1 (fr) Régulateur de commutation destiné au fonctionnement de moyens lumineux à suppression de luminescence résiduelle
DE102016210736A1 (de) Anordnung und Verfahren zum Betreiben von LEDs
DE102014206438A1 (de) Schaltungsanordnung zum Betreiben von n Lasten
DE102013210641A1 (de) Verfahren zum Einstellen einer Stromstärke zum Betreiben einer Halbleiterlichtquelle einer Beleuchtungseinrichtung
DE10235787B4 (de) Last-Treibervorrichtung für ein Fahrzeug
WO2012010591A2 (fr) Convertisseur abaisseur de tension pour fournir un courant pour au moins une del
DE102019107039B4 (de) LED-Treiber mit gesteuertem Spannungsvervielfacher

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20120809

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

DAX Request for extension of the european patent (deleted)
R17D Deferred search report published (corrected)

Effective date: 20140313

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20160621

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: DE

Ref legal event code: R108

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 835566

Country of ref document: AT

Kind code of ref document: T

Effective date: 20161015

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: LANGUAGE OF EP DOCUMENT: GERMAN

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20161005

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 7

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170106

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170105

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170205

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170228

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170206

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170105

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

26N No opposition filed

Effective date: 20170706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170228

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170228

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170217

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20170228

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 8

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170217

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: AT

Payment date: 20180226

Year of fee payment: 8

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20110217

REG Reference to a national code

Ref country code: AT

Ref legal event code: MM01

Ref document number: 835566

Country of ref document: AT

Kind code of ref document: T

Effective date: 20190217

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190217

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161005

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20220224

Year of fee payment: 12

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230530

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230228

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20240220

Year of fee payment: 14