EP2467855A4 - In-situ memory annealing - Google Patents

In-situ memory annealing

Info

Publication number
EP2467855A4
EP2467855A4 EP10810328.4A EP10810328A EP2467855A4 EP 2467855 A4 EP2467855 A4 EP 2467855A4 EP 10810328 A EP10810328 A EP 10810328A EP 2467855 A4 EP2467855 A4 EP 2467855A4
Authority
EP
European Patent Office
Prior art keywords
memory device
memory
another
event
heated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP10810328.4A
Other languages
German (de)
French (fr)
Other versions
EP2467855A1 (en
Inventor
Ian Shaeffer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rambus Inc
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Publication of EP2467855A1 publication Critical patent/EP2467855A1/en
Publication of EP2467855A4 publication Critical patent/EP2467855A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

In a system having a memory device, an event is detected during system operation. The memory device is heated to reverse use-incurred degradation of the memory device in response to detecting the event. Tn another system, the memory device is heated to reverse use incurred, degradation concurrently with execution of a data access operation within another memory device of the system. In another system having a memory controller coupled to first and second memory devices, data is evacuated from the first memory device to the second memory device in response to determining that a maintenance operation is needed within the first memory device.
EP10810328.4A 2009-08-21 2010-06-29 In-situ memory annealing Withdrawn EP2467855A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US23596409P 2009-08-21 2009-08-21
US24347909P 2009-09-17 2009-09-17
PCT/US2010/040322 WO2011022123A1 (en) 2009-08-21 2010-06-29 In-situ memory annealing

Publications (2)

Publication Number Publication Date
EP2467855A1 EP2467855A1 (en) 2012-06-27
EP2467855A4 true EP2467855A4 (en) 2013-08-21

Family

ID=43607275

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10810328.4A Withdrawn EP2467855A4 (en) 2009-08-21 2010-06-29 In-situ memory annealing

Country Status (5)

Country Link
EP (1) EP2467855A4 (en)
JP (1) JP2013502647A (en)
KR (1) KR20120059569A (en)
CN (1) CN102576569A (en)
WO (1) WO2011022123A1 (en)

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US8824212B2 (en) 2011-05-02 2014-09-02 Macronix International Co., Ltd. Thermally assisted flash memory with segmented word lines
US9001590B2 (en) 2011-05-02 2015-04-07 Macronix International Co., Ltd. Method for operating a semiconductor structure
US8724393B2 (en) 2011-05-02 2014-05-13 Macronix International Co., Ltd. Thermally assisted flash memory with diode strapping
US8488387B2 (en) * 2011-05-02 2013-07-16 Macronix International Co., Ltd. Thermally assisted dielectric charge trapping flash
TWI508075B (en) * 2011-06-09 2015-11-11 Macronix Int Co Ltd Thermally assisted dielectric charge trapping flash
CN102831923B (en) * 2011-06-14 2015-09-30 旺宏电子股份有限公司 Heat assists dielectric charge catch flash memory
TWI514387B (en) * 2012-02-09 2015-12-21 Macronix Int Co Ltd Thermally assisted flash memory with segmented word lines
CN102662799B (en) * 2012-04-13 2015-01-21 华为技术有限公司 Data backup method, server and hot backup system
US9348748B2 (en) 2013-12-24 2016-05-24 Macronix International Co., Ltd. Heal leveling
US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND
KR102142590B1 (en) 2014-06-16 2020-08-07 삼성전자 주식회사 Resistive Memory Device and Operating Method thereof
US9792227B2 (en) * 2014-08-19 2017-10-17 Samsung Electronics Co., Ltd. Heterogeneous unified memory
WO2016051512A1 (en) * 2014-09-30 2016-04-07 株式会社日立製作所 Distributed storage system
US9043638B1 (en) * 2014-11-14 2015-05-26 Quanta Computer Inc. Method for enhancing memory fault tolerance
US9563505B2 (en) * 2015-05-26 2017-02-07 Winbond Electronics Corp. Methods and systems for nonvolatile memory data management
US9836349B2 (en) 2015-05-29 2017-12-05 Winbond Electronics Corp. Methods and systems for detecting and correcting errors in nonvolatile memory
US10552320B2 (en) * 2016-04-01 2020-02-04 Intel Corporation Using a projected out of memory score to selectively terminate a process without transitioning to a background mode
KR20180058456A (en) * 2016-11-24 2018-06-01 삼성전자주식회사 Method and apparatus for managing a memory
CN110659226A (en) * 2018-06-28 2020-01-07 晨星半导体股份有限公司 Method for accessing data and related circuit
KR20200034499A (en) * 2018-09-21 2020-03-31 삼성전자주식회사 Data processing device and method of communicating with memory device
KR20220150552A (en) * 2021-05-04 2022-11-11 에스케이하이닉스 주식회사 Semiconductor memory device and operating method thereof
US20230134957A1 (en) * 2021-10-29 2023-05-04 Macronix International Co., Ltd. 3d flash memory module chip and method of fabricating the same
CN114944354B (en) * 2022-07-21 2022-09-27 江苏邑文微电子科技有限公司 Abnormity checking method and device for wafer annealing equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060184718A1 (en) * 2005-02-16 2006-08-17 Sinclair Alan W Direct file data programming and deletion in flash memories
US20090125671A1 (en) * 2006-12-06 2009-05-14 David Flynn Apparatus, system, and method for storage space recovery after reaching a read count limit

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JP3561002B2 (en) * 1994-05-18 2004-09-02 富士通株式会社 Disk unit
JP2004310930A (en) * 2003-04-08 2004-11-04 Renesas Technology Corp Nonvolatile semiconductor storage device
US7092288B2 (en) * 2004-02-04 2006-08-15 Atmel Corporation Non-volatile memory array with simultaneous write and erase feature
US7072219B1 (en) * 2004-12-28 2006-07-04 Macronix International Co., Ltd. Method and apparatus for operating a non-volatile memory array
US7495954B2 (en) * 2006-10-13 2009-02-24 Sandisk Corporation Method for partitioned erase and erase verification to compensate for capacitive coupling effects in non-volatile memory
US8008643B2 (en) * 2007-02-21 2011-08-30 Macronix International Co., Ltd. Phase change memory cell with heater and method for fabricating the same
US7876621B2 (en) * 2007-04-23 2011-01-25 Sandisk Il Ltd. Adaptive dynamic reading of flash memories
KR101469831B1 (en) * 2007-04-30 2014-12-09 삼성전자주식회사 Multi-level phase change memory device with improved read performance
JP2009037670A (en) * 2007-07-31 2009-02-19 Toshiba Corp Flash memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060184718A1 (en) * 2005-02-16 2006-08-17 Sinclair Alan W Direct file data programming and deletion in flash memories
US20090125671A1 (en) * 2006-12-06 2009-05-14 David Flynn Apparatus, system, and method for storage space recovery after reaching a read count limit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2011022123A1 *

Also Published As

Publication number Publication date
KR20120059569A (en) 2012-06-08
EP2467855A1 (en) 2012-06-27
JP2013502647A (en) 2013-01-24
WO2011022123A1 (en) 2011-02-24
CN102576569A (en) 2012-07-11

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