CN114944354B - Abnormity checking method and device for wafer annealing equipment - Google Patents

Abnormity checking method and device for wafer annealing equipment Download PDF

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CN114944354B
CN114944354B CN202210856156.4A CN202210856156A CN114944354B CN 114944354 B CN114944354 B CN 114944354B CN 202210856156 A CN202210856156 A CN 202210856156A CN 114944354 B CN114944354 B CN 114944354B
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万军
孙文彬
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Wuxi Yiwen Microelectronics Technology Co ltd
Jiangsu Yiwen Microelectronics Technology Co Ltd
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Jiangsu Yiwen Microelectronics Technology Co Ltd
Advanced Materials Technology and Engineering Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
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    • H01L21/67098Apparatus for thermal treatment
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract

The invention provides an abnormality checking method and device for wafer annealing equipment, wherein the method comprises the following steps: acquiring a reference code pointing to an abnormal check code corresponding to each IO point from an equipment control code module mapped by each IO point contained in the current process environment; based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to all IO point positions from an abnormal check code set uniformly packaged in an abnormal judgment module of the PLC control system; after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on an exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment. The invention reduces the maintenance cost and the possibility of error and leakage modification of the abnormal check code when the components are changed, and ensures the correctness of the integral abnormal check logic of the wafer annealing equipment.

Description

Abnormity checking method and device for wafer annealing equipment
Technical Field
The invention relates to the technical field of semiconductors, in particular to an abnormity checking method and device for wafer annealing equipment.
Background
Wafer annealing is an important process in semiconductor manufacturing, which can realize rapid temperature change in a short time and can precisely regulate and control the temperature, thereby forming an oxide film with thickness and uniformity meeting the process requirements. As semiconductor manufacturing processes have higher and higher requirements for the quality (thickness and uniformity) of oxide films, a plurality of sensors are required to be disposed in the wafer annealing equipment to acquire real-time states of the respective sub-equipment, such as an electrical cabinet door switch state, a PM cavity door switch state, a cavity vacuum state, and the like, and a PLC (Programmable Logic Controller) control system is used to perform exception checking on the real-time states so as to ensure the correct operation of the wafer annealing process. If the real-time state returned by the sensor is abnormal, the PLC control system needs to give an alarm or immediately interrupt the wafer annealing process, so that the safety production of the annealing machine is ensured.
In a traditional abnormal checking mode, an abnormal checking code of a real-time state acquired by each sensor is written in a process code corresponding to a sub-device arranged on the sensor. For example, an exception check code for chamber vacuum conditions may be explicitly deployed in the corresponding process code for the chamber. Therefore, the exception checking logic is executed at a fixed time in the process flow of the corresponding sub-equipment.
Therefore, in the conventional method, the exception checking code is deeply coupled with the process code of the corresponding sub-device. In a wafer annealing process scene, continuous debugging is often needed according to user requirements and an operation environment, part of components in the wafer annealing process can be changed or newly added in the debugging process, and the change or the addition of the components inevitably causes the need of rewriting abnormal verification codes and updating original sub-equipment process codes. Therefore, the change of the abnormal check code of a certain unitary device can be dragged to move the whole body, but the abnormal check code deeply coupled with the process code is distributed at various positions and is difficult to modify and maintain, once a fault and a leak occur, danger is caused in the code testing process, and the safety production of an annealing machine is influenced.
In addition, there may be a certain logical association between the abnormal check codes of different sensor data, for example, after the first sensor data is abnormal, the second sensor data is subjected to abnormal check. That is, the execution timing of the abnormal check code of different sensor data needs to satisfy a certain rule, so as to ensure the correctness of the entire abnormal check logic of the wafer annealing equipment. However, the execution timing of the abnormal checking code coupled to the process code is difficult to determine, and it cannot be guaranteed that the execution timing of the abnormal checking code distributed everywhere meets the preset rule.
Disclosure of Invention
The invention provides an abnormal checking method and device for wafer annealing equipment, which are used for solving the defects that in the prior art, abnormal checking codes are deeply coupled with process codes of corresponding sub-equipment, the abnormal checking codes are difficult to modify and maintain, and the execution time of the abnormal checking codes distributed everywhere can not be ensured to accord with preset rules.
The invention provides an abnormity checking method of wafer annealing equipment, which is applied to a PLC control system connected with the wafer annealing equipment and comprises the following steps:
acquiring equipment control code modules mapped by each IO point in the current process environment, and acquiring reference codes pointing to abnormal check codes corresponding to each IO point from the equipment control code modules mapped by each IO point;
based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to the IO points from an abnormal check code set which is packaged in an abnormal judgment module of a PLC control system in a unified manner;
and after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on an exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment.
According to the abnormality checking method for the wafer annealing equipment provided by the invention, when a component is newly added or replaced in the wafer annealing equipment, the abnormality checking method further comprises the following steps:
setting IO point positions for the newly added components or the replaced components, and adding mapping between the IO point positions of the newly added components or the replaced components and the equipment control code module;
and determining an abnormal check code corresponding to the newly added component or the replaced component in the abnormal judgment module, and modifying a reference code in an equipment control code module of the newly added component or the replaced component based on an address of the abnormal check code corresponding to the newly added component or the replaced component.
According to the abnormality checking method for the wafer annealing equipment, provided by the invention, the abnormality checking is performed on the IO signal value of each IO point based on the abnormality checking code corresponding to each IO point to obtain the abnormality checking result of the wafer annealing equipment, and the method specifically comprises the following steps:
a checking step: carrying out effective marking on the abnormal check codes corresponding to the IO point locations, moving the abnormal check codes marked as effective into an effective space, and carrying out abnormal check on the IO signal values corresponding to the IO point locations based on the abnormal check codes in the effective space; for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check codes which are preconditions as effective, and marking independent abnormal check codes which are not mutually exclusive with any abnormal check codes as effective; the temporary space comprises the abnormal check codes corresponding to the IO points in an initial state;
iteration step: and repeating the checking step until the temporary space is empty.
According to the exception checking method for the wafer annealing equipment provided by the invention, for any plurality of logically mutually exclusive exception checking codes in the current temporary space, the exception checking code which is a precondition is marked to be effective, and the independent exception checking code which is not mutually exclusive with any exception checking code is marked to be effective, and the method specifically comprises the following steps:
determining a sensor mutual exclusion condition between sensors corresponding to the IO points based on the current process type;
determining the mutual exclusion relationship among the abnormal check codes based on the mutual exclusion condition of the sensors to obtain the abnormal check codes which are logically mutually exclusive and the independent abnormal check codes which are not mutually exclusive with any abnormal check codes;
and marking the abnormal check code which is a precondition in the abnormal check codes which are logically mutually exclusive as effective, and marking the independent abnormal check code which is not mutually exclusive with any abnormal check code as effective.
According to the abnormity verification method of the wafer annealing equipment, provided by the invention, the mutual exclusion condition of the sensor is configured in an IO point location record file; and when a component is newly added or replaced in the wafer annealing equipment, updating the mutual exclusion condition of the sensor on the basis of the newly added component or the replaced component in the IO point location record file.
According to the abnormality checking method for the wafer annealing equipment, provided by the invention, each IO point included in the current process environment and the corresponding equipment information are also configured in the IO point record file.
According to the exception checking method for the wafer annealing equipment, provided by the invention, for any plurality of logically mutually exclusive exception checking codes in the current temporary space, the exception checking code which is a precondition is marked to be effective, and the independent exception checking code which is not mutually exclusive with any exception checking code is marked to be effective, and the method specifically comprises the following steps:
acquiring the current process step of the wafer annealing equipment;
based on the current process step, marking the exception check code which is a precondition in the exception check codes which are mutually exclusive of the plurality of logics and part of the code segments which correspond to the current process step in the independent exception check codes as effective.
The invention also provides an abnormality checking device of the wafer annealing equipment, which is applied to a PLC control system connected with the wafer annealing equipment and comprises:
the reference code acquisition module is used for acquiring the equipment control code module mapped by each IO point in the current process environment and acquiring a reference code pointing to the abnormal check code corresponding to each IO point from the equipment control code module mapped by each IO point;
a check code obtaining module, configured to screen an abnormal check code corresponding to each IO point from an abnormal check code set uniformly packaged in an abnormal determination module of a PLC control system based on the current stage of the wafer annealing device and the reference code;
and the abnormality checking module is used for performing abnormality checking on the IO signal value of each IO point based on the abnormality checking code corresponding to each IO point after reading the IO signal value of each IO point based on the sensor preset in the wafer annealing equipment to obtain an abnormality checking result of the wafer annealing equipment.
The invention also provides electronic equipment which comprises a memory, a processor and a computer program which is stored on the memory and can run on the processor, wherein the processor executes the program to realize the abnormality checking method of the wafer annealing equipment.
The present invention also provides a non-transitory computer readable storage medium, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the method for checking the abnormality of the wafer annealing apparatus as described in any one of the above.
The invention also provides a computer program product, which comprises a computer program, wherein the computer program is used for realizing the abnormality checking method of the wafer annealing equipment when being executed by a processor.
The abnormal checking method and the device of the wafer annealing equipment provided by the invention can acquire the reference code pointing to the abnormal checking code corresponding to each IO point from the equipment control code module mapped by each IO point in the current process environment, screen the abnormal checking code corresponding to each IO point from the abnormal checking code set uniformly packaged in the abnormal judging module of the PLC control system based on the reference code, so as to carry out the abnormal checking on the IO signal value of each IO point, wherein all the abnormal checking codes are uniformly packaged in the abnormal judging module of the PLC control system, so that the uniform maintenance can be conveniently carried out on each abnormal checking code, when a component is newly added or changed, the abnormal checking code corresponding to the component does not need to be rewritten, but only the reference code pointing to the corresponding abnormal checking code is newly added in the equipment control code module of the component, the maintenance cost of the abnormal check code and the possibility of error and leakage modification during component conversion are greatly reduced, and the accuracy and the safety of the abnormal check logic of the wafer annealing equipment are guaranteed; and all the abnormal checking codes are packaged at one position, so that the abnormal checking codes with logic correlation are conveniently mined and the execution sequence among the abnormal checking codes with mutual correlation is set, thereby ensuring that the execution time of the abnormal checking codes meets the preset rule and ensuring the correctness of the integral abnormal checking logic of the wafer annealing equipment.
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In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a schematic flow chart illustrating an anomaly checking method for wafer annealing equipment according to the present invention;
FIG. 2 is a schematic structural diagram of an anomaly checking device of the wafer annealing apparatus according to the present invention;
fig. 3 is a schematic structural diagram of an electronic device provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
In a traditional abnormal checking mode, an abnormal checking code in a real-time state acquired by each sensor is written in a process code corresponding to a sub-device arranged in the sensor, so that the abnormal checking code is deeply coupled with the process code of the corresponding sub-device. However, due to the change or addition of components in the debugging process, the abnormal check code needs to be rewritten and the original sub-equipment process code needs to be updated. However, the change of the deeply coupled code may lead the whole body to be moved, and the abnormal check code deeply coupled with the process code is distributed everywhere, so that the modification and maintenance are difficult, and the error and the leakage are easy to generate. In addition, under the scenario that logical association exists between the abnormal verification codes of different sensor data, the execution time of the abnormal verification code coupled in the process code is difficult to judge, the execution time of the abnormal verification code distributed everywhere cannot be guaranteed to meet the preset rule, and the accuracy of the overall verification logic of the wafer annealing equipment cannot be guaranteed.
Therefore, the invention provides an abnormity checking method of wafer annealing equipment, which is applied to a PLC control system connected with the wafer annealing equipment. Fig. 1 is a schematic flow chart of an abnormality checking method of a wafer annealing apparatus according to the present invention, as shown in fig. 1, the method includes:
step 110, obtaining the device control code module mapped by each IO point included in the current process environment, and obtaining a reference code pointing to the abnormal check code corresponding to each IO point from the device control code module mapped by each IO point.
Specifically, any IO point corresponds to a certain sensor, and for the current process environment, the sensor to be deployed may be determined based on the current process requirement, and a corresponding IO point is set for each deployed sensor. Each IO point included in the current process environment can be recorded in an IO point record file, and the device information corresponding to each IO point is recorded, so that the sensor corresponding to the IO point can be determined to be deployed in which sub-device (for example, a cavity door, an electric cabinet door, and the like) of the wafer annealing device according to the IO point information.
And then, determining the equipment control code module mapped by the IO points contained in the current process environment according to the IO points contained in the current process environment and the mapping relation between each IO point and the equipment control code module of each piece of sub-equipment, which is established in advance. For example, the device control code module mapped by each IO point location may be determined based on the device information corresponding to the IO point location recorded in the IO point location recording file. The equipment control code module of any piece of sub-equipment comprises a process code of the corresponding sub-equipment and a reference code of an abnormal check code of sensor data acquired by each sensor in the sub-equipment. Here, the reference code of the exception checking code only includes address information corresponding to the exception checking code, and is used to point to one or more exception checking codes in the exception determining module described later, and does not include any exception checking logic itself. Therefore, the reference code pointing to the abnormal check code corresponding to each IO point can be obtained from the device control code module mapped by each IO point. And the current state of the wafer annealing equipment (process pretreatment/in-process/after-process)
And 120, screening the abnormal check codes corresponding to the IO points from an abnormal check code set which is packaged in an abnormal judgment module of the PLC control system in a unified manner based on the current stage of the wafer annealing equipment and the reference codes.
Specifically, the exception checking codes corresponding to all IO point locations are uniformly packaged in the exception judgment module of the PLC control system. Wherein, the exception judging module can package standard exception checking logic suitable for various scenes. When the device control code module of each piece of sub-device is written, a proper abnormal check code can be selected from the abnormal check code set packaged in the abnormal judgment module, and the corresponding address and the applicable process stage (in process preprocessing/in process/after process) are arranged in the device control code module in a code reference mode.
All the abnormal check codes are uniformly packaged in the abnormal judgment module of the PLC control system, so that the uniform maintenance of all the abnormal check codes is facilitated. When the component is newly added or changed, if the abnormal judgment module already contains the standard abnormal check logic suitable for the new component, the abnormal check code corresponding to the component does not need to be rewritten, but only the reference code pointing to the corresponding abnormal check code is newly added in the equipment control code module of the component, so that the maintenance cost and the possibility of error and leakage modification of the abnormal check code during the component conversion are greatly reduced, and the accuracy and the safety of the abnormal check logic of the wafer annealing equipment are ensured. In addition, all the abnormal checking codes are packaged at one position, so that the abnormal checking codes with logic correlation are conveniently mined and the execution sequence among the abnormal checking codes with mutual correlation is set, the execution time of the abnormal checking codes can be guaranteed to meet the preset rule, and the correctness of the integral abnormal checking logic of the wafer annealing equipment is guaranteed.
According to the current stage (in process pretreatment/treatment/after treatment) of the wafer annealing equipment and the reference code, the abnormal checking code corresponding to each IO point position applicable to the current stage can be obtained from the abnormal judging module through addressing, and the abnormal checking code is used as the integral abnormal checking logic of the current stage of the wafer annealing equipment to carry out the next abnormal checking.
Step 130, after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing device, performing exception checking on the IO signal value of each IO point based on an exception checking code corresponding to each IO point to obtain an exception checking result of the wafer annealing device.
Specifically, the IO signal value of each IO point is read according to each sensor deployed in the wafer annealing equipment, and the IO signal value of each IO point is subjected to abnormal verification based on the abnormal verification code corresponding to each IO point to obtain the abnormal verification result of the wafer annealing equipment, so that the safe operation of the wafer annealing equipment is guaranteed.
The method provided by the embodiment of the invention obtains the reference code pointing to the abnormal check code corresponding to each IO point from the equipment control code module mapped by each IO point in the current process environment, and screens the abnormal check code corresponding to each IO point from the abnormal check code set uniformly packaged in the abnormal judgment module of the PLC control system based on the reference code so as to perform abnormal check on the IO signal value of each IO point, wherein all the abnormal check codes are uniformly packaged in the abnormal judgment module of the PLC control system, so that the uniform maintenance is convenient for each abnormal check code, when a component is newly added or changed, the abnormal check code corresponding to the component does not need to be rewritten, but only the reference code pointing to the corresponding abnormal check code is newly added in the equipment control code module of the component, thereby greatly reducing the maintenance cost and the possibility of error and omission of modification of the abnormal check code when the component is changed, the accuracy and the safety of the abnormal check logic of the wafer annealing equipment are guaranteed; and all the abnormal checking codes are packaged at one position, so that the abnormal checking codes with logic correlation are conveniently mined and the execution sequence among the abnormal checking codes with mutual correlation is set, thereby ensuring that the execution time of the abnormal checking codes meets the preset rule and ensuring the correctness of the integral abnormal checking logic of the wafer annealing equipment.
Based on the above embodiment, after newly adding components or replacing components in the wafer annealing equipment, the method further includes:
setting IO point positions for the newly added components or the replaced components, and adding mapping between the IO point positions of the newly added components or the replaced components and the equipment control code module;
and determining an abnormal check code corresponding to the newly added component or the replaced component in the abnormal judgment module, and modifying a reference code in an equipment control code module of the newly added component or the replaced component based on an address of the abnormal check code corresponding to the newly added component or the replaced component.
Specifically, after a component is newly added or replaced, an IO point location and device information corresponding to the IO point location can be set for the newly added component or the replaced component in the IO point location record file. In addition, mapping can be added between the IO point positions of the newly added components or the replaced components and the equipment control code module, so that the equipment control code module mapped by the IO point positions of the newly added components or the replaced components can be obtained conveniently.
And selecting an abnormal check code suitable for the newly added component or the replaced component from an abnormal check code set packaged in the abnormal judgment module, and modifying a reference code in an equipment control code module of the newly added component or the replaced component based on the address of the abnormal check code corresponding to the newly added component or the replaced component in the abnormal judgment module to enable the reference code to point to the corresponding abnormal check code.
Based on any one of the embodiments, performing exception checking on the IO signal value of each IO point based on the exception checking code corresponding to each IO point to obtain an exception checking result of the wafer annealing equipment specifically includes:
a checking step: carrying out effective marking on the abnormal check codes corresponding to the IO point locations, moving the abnormal check codes marked as effective into an effective space, and carrying out abnormal check on the IO signal values corresponding to the IO point locations based on the abnormal check codes in the effective space; for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check codes which are preconditions as effective, and marking independent abnormal check codes which are not mutually exclusive with any abnormal check codes as effective; the temporary space comprises the abnormal check codes corresponding to the IO points in an initial state;
iteration step: and repeating the checking step until the temporary space is empty.
Specifically, considering that there is a logical association between the exception checking codes corresponding to the IO points, the execution sequence of the exception checking codes should follow a certain rule, so as to ensure the accuracy of the overall exception checking logic. For this reason, the abnormal check codes corresponding to each IO point may be all placed in a global temporary space. And then, carrying out effective marking on the abnormal check codes in the temporary space, and transferring the abnormal check codes marked as effective into the effective space, thereby carrying out abnormal check on the IO signal values of the corresponding IO points based on the abnormal check codes in the effective space. And then repeating the checking step until the temporary space is empty. The abnormal checking codes corresponding to the IO points can be processed in batches in the effective marking mode, so that the execution sequence of the abnormal checking codes corresponding to the IO points is set, the execution sequence of the abnormal checking codes corresponding to the IO points can be guaranteed to follow a preset rule, and the accuracy of the whole abnormal checking logic of the wafer annealing equipment is guaranteed.
When the execution sequence of the abnormal check codes corresponding to the IO points is set based on the mode of the effective mark, the abnormal check codes which are the precondition are marked to be effective for any plurality of logic mutually exclusive abnormal check codes in the current temporary space, and the independent abnormal check codes which are not mutually exclusive with any abnormal check codes are marked to be effective, so that the rationality of the whole abnormal check logic is ensured. Here, logically mutually exclusive exception checking codes have a dependency relationship therebetween and cannot be executed simultaneously. For example, exception checking code 1: when the switch is closed, heating is controlled; exception checking code 2: detecting whether the oxygen concentration reaches xx concentration, wherein the two abnormal check codes are logically mutually exclusive, and the dependence relationship between the two abnormal check codes is as follows: exception checking code 2
Figure SYM_220628111906001
And (4) judging whether the switch is closed or not when the abnormal check code 1 is detected, namely the oxygen concentration reaches xx concentration, thereby controlling heating.
According to the method provided by the embodiment of the invention, the abnormal check codes corresponding to each IO point are marked to be effective, the abnormal check codes which are preconditioned in the abnormal check codes with mutual exclusion of a plurality of logics are marked to be effective, the independent abnormal check codes which are not mutually exclusive with any abnormal check codes are marked to be effective, the abnormal check codes marked to be effective are moved into an effective space, the IO signal values of the corresponding IO points are subjected to abnormal check based on the abnormal check codes in the effective space, and the abnormal check codes corresponding to the IO points are processed in batches, so that the execution sequence of the abnormal check codes corresponding to the IO points is set, the execution sequence of the abnormal check codes corresponding to the IO points can be ensured to follow the preset rule, and the accuracy of the whole abnormal check logic of the wafer annealing equipment is ensured.
Based on any of the above embodiments, for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check code as a precondition as valid, and marking an independent abnormal check code which is not mutually exclusive with any abnormal check code as valid specifically includes:
determining a sensor mutual exclusion condition between sensors corresponding to the IO points based on the current process type;
determining the mutual exclusion relationship among the abnormal check codes based on the mutual exclusion condition of the sensors to obtain the abnormal check codes which are logically mutually exclusive and the independent abnormal check codes which are not mutually exclusive with any abnormal check codes;
and marking the abnormal check code which is a precondition in the abnormal check codes which are mutually exclusive of the logic as effective, and marking the independent abnormal check code which is not mutually exclusive with any abnormal check code as effective.
Specifically, the sensor mutual exclusion condition between the sensors corresponding to the IO points may be determined based on the current process type. The mutual-dependency relationship between the sensor data corresponding to each sensor is defined in the sensor mutual-exclusion condition. The mutual exclusion conditions of the sensors can be uniformly configured in the IO point location record file. When a component is newly added or replaced in the wafer annealing equipment, the mutual exclusion condition of the sensor can be updated on the basis of the newly added component or the replaced component in the IO point location record file.
Based on the mutual exclusion condition of the sensors, the mutual exclusion relationship between the abnormal verification codes corresponding to the IO points can be determined, so that the abnormal verification codes with logical mutual exclusion and the independent abnormal verification codes which are not mutually exclusive with any abnormal verification codes are obtained. Then, the exception check code which is a precondition in the exception check codes which are logically mutually exclusive can be marked as valid, and the independent exception check code which is not mutually exclusive with any exception check code can be marked as valid.
Based on any of the above embodiments, for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check code as a precondition as valid, and marking an independent abnormal check code which is not mutually exclusive with any abnormal check code as valid specifically includes:
acquiring the current process step of the wafer annealing equipment;
based on the current process step, marking the exception check code which is a precondition in the exception check codes which are mutually exclusive of the plurality of logics and part of the code segments which correspond to the current process step in the independent exception check codes as effective.
Specifically, the sensor data that needs to be subjected to the anomaly verification at different process steps in the process flow may be different, so that the corresponding anomaly verification codes may be set to be in an effective state respectively according to the different process steps to perform the anomaly verification. Specifically, the current process step of the wafer annealing equipment may be acquired, and then based on the current process step, the exception checking code which is a precondition in the plurality of logically mutually exclusive exception checking codes and a part of the code segment corresponding to the current process step in the independent exception checking code are marked to be in effect.
The abnormality checking device of the wafer annealing equipment provided by the invention is described below, and the abnormality checking device of the wafer annealing equipment described below and the abnormality checking method of the wafer annealing equipment described above can be referred to correspondingly.
Based on any of the above embodiments, fig. 2 is a schematic structural diagram of an abnormality checking apparatus for a wafer annealing device, which is applied to a PLC control system connected to the wafer annealing device, and as shown in fig. 2, the apparatus includes: a reference code acquisition module 210, a check code acquisition module 220, and an exception check module 230.
The reference code obtaining module 210 is configured to obtain an equipment control code module mapped by each IO point included in a current process environment, and obtain, from the equipment control code module mapped by each IO point, a reference code pointing to an abnormal check code corresponding to each IO point;
the check code obtaining module 220 is configured to screen an abnormal check code corresponding to each IO point from an abnormal check code set that is uniformly encapsulated in an abnormal determination module of the PLC control system based on the current stage of the wafer annealing apparatus and the reference code;
the abnormal checking module 230 is configured to, after reading an IO signal value of each IO point based on a sensor preset in the wafer annealing device, perform abnormal checking on the IO signal value of each IO point based on an abnormal checking code corresponding to each IO point to obtain an abnormal checking result of the wafer annealing device.
The device provided by the embodiment of the invention obtains the reference code pointing to the abnormal check code corresponding to each IO point from the equipment control code module mapped by each IO point in the current process environment, screens the abnormal check code corresponding to each IO point from the abnormal check code set uniformly packaged in the abnormal judgment module of the PLC control system based on the reference code so as to carry out abnormal check on the IO signal value of each IO point, wherein all the abnormal check codes are uniformly packaged in the abnormal judgment module of the PLC control system, so that the uniform maintenance is convenient for each abnormal check code, when a component is newly increased or changed, the abnormal check code corresponding to the component does not need to be rewritten, but only the reference code pointing to the corresponding abnormal check code is newly added in the equipment control code module of the component, the maintenance cost and the possibility of error and omission of modification of the abnormal check code during the component transformation are greatly reduced, the accuracy and the safety of the abnormal check logic of the wafer annealing equipment are guaranteed; and all the abnormal checking codes are packaged at one position, so that the abnormal checking codes with logic correlation are conveniently mined and the execution sequence among the abnormal checking codes with mutual correlation is set, thereby ensuring that the execution time of the abnormal checking codes meets the preset rule and ensuring the correctness of the integral abnormal checking logic of the wafer annealing equipment.
Based on any of the above embodiments, the apparatus further includes an updating unit, and when a component is newly added or replaced in the wafer annealing device, the updating unit is further configured to:
setting IO point positions for the newly added components or the replaced components, and adding mapping between the IO point positions of the newly added components or the replaced components and the equipment control code module;
and determining an abnormal check code corresponding to the newly added component or the replaced component in the abnormal judgment module, and modifying a reference code in an equipment control code module of the newly added component or the replaced component based on an address of the abnormal check code corresponding to the newly added component or the replaced component.
Based on any one of the embodiments, performing exception checking on the IO signal value of each IO point based on the exception checking code corresponding to each IO point to obtain an exception checking result of the wafer annealing equipment specifically includes:
a checking step: carrying out effective marking on the abnormal check codes corresponding to the IO point locations, moving the abnormal check codes marked as effective into an effective space, and carrying out abnormal check on the IO signal values corresponding to the IO point locations based on the abnormal check codes in the effective space; for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check codes which are preconditions as effective, and marking independent abnormal check codes which are not mutually exclusive with any abnormal check codes as effective; the temporary space comprises the abnormal check codes corresponding to the IO points in an initial state;
iteration step: and repeating the checking step until the temporary space is empty.
According to the device provided by the embodiment of the invention, the abnormal check codes corresponding to each IO point are marked to be effective, the abnormal check codes which are preconditioned in the plurality of logically mutually exclusive abnormal check codes are marked to be effective, the independent abnormal check codes which are not mutually exclusive with any abnormal check code are marked to be effective, the abnormal check codes marked to be effective are moved to the effective space, the IO signal values of the corresponding IO points are subjected to abnormal check based on the abnormal check codes in the effective space, the abnormal check codes corresponding to each IO point are processed in batches, and thus the execution sequence of the abnormal check codes corresponding to each IO point is set, the execution sequence of the abnormal check codes corresponding to each IO point can be ensured to follow the preset rule, and the accuracy of the whole abnormal check logic of the wafer annealing equipment is ensured.
Based on any of the above embodiments, for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check code as a precondition as valid, and marking an independent abnormal check code which is not mutually exclusive with any abnormal check code as valid specifically includes:
determining a sensor mutual exclusion condition between sensors corresponding to the IO points based on the current process type;
determining mutual exclusion relation among the abnormal check codes based on the mutual exclusion condition of the sensor to obtain logically mutually exclusive abnormal check codes and independent abnormal check codes which are not mutually exclusive with any abnormal check codes;
and marking the abnormal check code which is a precondition in the abnormal check codes which are mutually exclusive of the logic as effective, and marking the independent abnormal check code which is not mutually exclusive with any abnormal check code as effective.
Based on any one of the above embodiments, the sensor mutual exclusion condition is configured in an IO point location record file; and when a component is newly added or replaced in the wafer annealing equipment, updating the mutual exclusion condition of the sensor on the basis of the newly added component or the replaced component in the IO point location record file.
Based on any of the above embodiments, each IO point included in the current process environment and the corresponding device information are further configured in the IO point record file.
Based on any of the above embodiments, for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check code as a precondition as valid, and marking an independent abnormal check code which is not mutually exclusive with any abnormal check code as valid specifically includes:
acquiring the current process step of the wafer annealing equipment;
based on the current process step, marking the exception check code which is a precondition in the exception check codes which are mutually exclusive of the plurality of logics and part of the code segments which correspond to the current process step in the independent exception check codes as effective.
Fig. 3 is a schematic structural diagram of an electronic device provided in the present invention, and as shown in fig. 3, the electronic device may include: a processor (processor)310, a memory (memory)320, a communication Interface (Communications Interface)330 and a communication bus 340, wherein the processor 310, the memory 320 and the communication Interface 330 communicate with each other via the communication bus 340. The processor 310 may invoke logic instructions in the memory 320 to perform a method of exception checking for a wafer annealing apparatus, the method comprising: acquiring equipment control code modules mapped by each IO point in a current process environment, and acquiring reference codes pointing to abnormal check codes corresponding to each IO point from the equipment control code modules mapped by each IO point; based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to the IO point positions from an abnormal check code set packaged in an abnormal judgment module of a PLC control system in a unified mode; and after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on an exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment.
In addition, the logic instructions in the memory 320 may be implemented in the form of software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, the computer program product includes a computer program stored on a non-transitory computer readable storage medium, the computer program includes program instructions, when the program instructions are executed by a computer, the computer can execute the method for checking the abnormality of the wafer annealing apparatus provided by the above methods, the method includes: acquiring equipment control code modules mapped by each IO point in a current process environment, and acquiring reference codes pointing to abnormal check codes corresponding to each IO point from the equipment control code modules mapped by each IO point; based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to the IO points from an abnormal check code set which is packaged in an abnormal judgment module of a PLC control system in a unified manner; and after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on an exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment.
In yet another aspect, the present invention further provides a non-transitory computer readable storage medium, on which a computer program is stored, the computer program being implemented by a processor to perform the method for checking the abnormality of the wafer annealing apparatus provided in the above aspects, the method comprising: acquiring equipment control code modules mapped by each IO point in a current process environment, and acquiring reference codes pointing to abnormal check codes corresponding to each IO point from the equipment control code modules mapped by each IO point; based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to the IO points from an abnormal check code set which is packaged in an abnormal judgment module of a PLC control system in a unified manner; and after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on the exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. Based on the understanding, the above technical solutions substantially or otherwise contributing to the prior art may be embodied in the form of a software product, which may be stored in a computer-readable storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the various embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. An abnormity checking method of wafer annealing equipment is applied to a PLC control system connected with the wafer annealing equipment, and is characterized by comprising the following steps:
acquiring equipment control code modules mapped by each IO point in a current process environment, and acquiring reference codes pointing to abnormal check codes corresponding to each IO point from the equipment control code modules mapped by each IO point; wherein, the reference code of the abnormal check code only contains the address information of the corresponding abnormal check code;
based on the current stage of the wafer annealing equipment and the reference code, screening abnormal check codes corresponding to the IO points from an abnormal check code set which is packaged in an abnormal judgment module of a PLC control system in a unified manner;
and after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment, performing exception verification on the IO signal value of each IO point based on an exception verification code corresponding to each IO point to obtain an exception verification result of the wafer annealing equipment.
2. The method for checking the abnormality of the wafer annealing equipment according to claim 1, wherein when a component is newly added or replaced in the wafer annealing equipment, the method further comprises:
setting IO point positions for the newly added components or the replaced components, and adding mapping between the IO point positions of the newly added components or the replaced components and the equipment control code module;
and determining an abnormal check code corresponding to the newly added component or the replaced component in the abnormal judgment module, and modifying a reference code in an equipment control code module of the newly added component or the replaced component based on an address of the abnormal check code corresponding to the newly added component or the replaced component.
3. The method according to claim 1 or 2, wherein the performing the abnormal verification on the IO signal value of each IO point based on the abnormal verification code corresponding to each IO point to obtain the abnormal verification result of the wafer annealing equipment specifically includes:
a checking step: carrying out effective marking on the abnormal check codes corresponding to the IO point locations, moving the abnormal check codes marked as effective into an effective space, and carrying out abnormal check on the IO signal values corresponding to the IO point locations based on the abnormal check codes in the effective space; for any plurality of logically mutually exclusive abnormal check codes in the current temporary space, marking the abnormal check codes which are preconditions as effective, and marking independent abnormal check codes which are not mutually exclusive with any abnormal check codes as effective; the temporary space comprises the abnormal check codes corresponding to the IO points in an initial state;
iteration step: and repeating the checking step until the temporary space is empty.
4. The method as claimed in claim 3, wherein the step of marking the exception checking code as valid for any plurality of logically mutually exclusive exception checking codes in the current temporary space, and marking an independent exception checking code as valid, which is not mutually exclusive with any exception checking code, comprises:
determining a sensor mutual exclusion condition between sensors corresponding to the IO points based on the current process type;
determining the mutual exclusion relationship among the abnormal check codes based on the mutual exclusion condition of the sensors to obtain the abnormal check codes which are logically mutually exclusive and the independent abnormal check codes which are not mutually exclusive with any abnormal check codes;
and marking the abnormal check code which is a precondition in the abnormal check codes which are mutually exclusive of the logic as effective, and marking the independent abnormal check code which is not mutually exclusive with any abnormal check code as effective.
5. The abnormality checking method of wafer annealing equipment according to claim 4, wherein the sensor mutual exclusion condition is configured in an IO point location record file; and when a component is newly added or replaced in the wafer annealing equipment, updating the mutual exclusion condition of the sensor on the basis of the newly added component or the replaced component in the IO point location record file.
6. The method for checking the abnormality of wafer annealing equipment according to claim 5, wherein each IO point included in the current process environment and the equipment information corresponding to the IO point are also configured in the IO point record file.
7. The method as claimed in claim 3, wherein the step of marking the exception checking code as valid for any plurality of logically mutually exclusive exception checking codes in the current temporary space, and marking an independent exception checking code as valid, which is not mutually exclusive with any exception checking code, comprises:
acquiring the current process step of the wafer annealing equipment;
based on the current process step, marking the exception check code which is a precondition in the exception check codes which are mutually exclusive of the plurality of logics and part of the code segments which correspond to the current process step in the independent exception check codes as effective.
8. An abnormity verifying device of wafer annealing equipment is applied to a PLC control system connected with the wafer annealing equipment, and is characterized in that the device comprises:
the reference code acquisition module is used for acquiring the equipment control code module mapped by each IO point in the current process environment and acquiring a reference code pointing to the abnormal check code corresponding to each IO point from the equipment control code module mapped by each IO point; wherein, the reference code of the abnormal check code only contains the address information of the corresponding abnormal check code;
a check code obtaining module, configured to screen an abnormal check code corresponding to each IO point from an abnormal check code set uniformly encapsulated in an abnormal determination module of a PLC control system based on the current stage of the wafer annealing apparatus and the reference code;
and the abnormal checking module is used for performing abnormal checking on the IO signal value of each IO point based on an abnormal checking code corresponding to each IO point after reading the IO signal value of each IO point based on a sensor preset in the wafer annealing equipment to obtain an abnormal checking result of the wafer annealing equipment.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of abnormality checking for a wafer annealing apparatus as claimed in any one of claims 1 to 7 when executing the program.
10. A non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method for abnormality checking of a wafer annealing apparatus according to any one of claims 1 to 7.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05345929A (en) * 1992-06-12 1993-12-27 Kawasaki Steel Corp Detection of abnormality of value registered by radiation thermometer for continuous annealing furnace
CN102576569A (en) * 2009-08-21 2012-07-11 拉姆伯斯公司 In-situ memory annealing
CN103760934A (en) * 2014-02-20 2014-04-30 北京七星华创电子股份有限公司 Method and system used for monitoring temperature of semiconductor heat treatment equipment
CN114256105A (en) * 2021-12-01 2022-03-29 长江存储科技有限责任公司 Method, device and system for detecting semiconductor process abnormity
CN114760103A (en) * 2022-03-21 2022-07-15 广州大学 Industrial control system abnormity detection system, method, equipment and storage medium

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05345929A (en) * 1992-06-12 1993-12-27 Kawasaki Steel Corp Detection of abnormality of value registered by radiation thermometer for continuous annealing furnace
CN102576569A (en) * 2009-08-21 2012-07-11 拉姆伯斯公司 In-situ memory annealing
CN103760934A (en) * 2014-02-20 2014-04-30 北京七星华创电子股份有限公司 Method and system used for monitoring temperature of semiconductor heat treatment equipment
CN114256105A (en) * 2021-12-01 2022-03-29 长江存储科技有限责任公司 Method, device and system for detecting semiconductor process abnormity
CN114760103A (en) * 2022-03-21 2022-07-15 广州大学 Industrial control system abnormity detection system, method, equipment and storage medium

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