EP2453433B1 - Système et procédé pour compenser les non-uniformités dans des dispositifs d'affichage électroluminescents - Google Patents

Système et procédé pour compenser les non-uniformités dans des dispositifs d'affichage électroluminescents Download PDF

Info

Publication number
EP2453433B1
EP2453433B1 EP11189176.8A EP11189176A EP2453433B1 EP 2453433 B1 EP2453433 B1 EP 2453433B1 EP 11189176 A EP11189176 A EP 11189176A EP 2453433 B1 EP2453433 B1 EP 2453433B1
Authority
EP
European Patent Office
Prior art keywords
data
degradation
pixels
display
compensation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP11189176.8A
Other languages
German (de)
English (en)
Other versions
EP2453433A2 (fr
EP2453433A3 (fr
Inventor
Arokia Nathan
Gholamreza Chaji
Stefan Alexander
Peyman Servati
Richard I-Heng Huang
Corbin Church
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ignis Innovation Inc
Original Assignee
Ignis Innovation Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/946,601 external-priority patent/US20110199395A1/en
Application filed by Ignis Innovation Inc filed Critical Ignis Innovation Inc
Publication of EP2453433A2 publication Critical patent/EP2453433A2/fr
Publication of EP2453433A3 publication Critical patent/EP2453433A3/fr
Application granted granted Critical
Publication of EP2453433B1 publication Critical patent/EP2453433B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/048—Preventing or counteracting the effects of ageing using evaluation of the usage time
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0428—Gradation resolution change

Definitions

  • the present invention relates to display technologies, more specifically a method and system for compensating for non-uniformities of elements in light emitting device displays.
  • AMOLED Active-matrix organic light-emitting diode
  • TFTLCD thin film transistor liquid crystal display
  • All AMOLED displays regardless of backplane technology used, exhibit differences in luminance on a pixel to pixel basis, primarily as a result of process or construction inequalities, or from aging caused by operational use over time. Luminance non-uniformities in a display may also arise from natural differences in chemistry and performance from the OLED materials themselves. These non-uniformities must be managed by the AMOLED display electronics in order for the display device to attain commercially acceptable levels of performance for mass-market use.
  • FIG. 1 illustrates an operational flow of a conventional AMOLED display 10.
  • a video source 12 contains luminance data for each pixel and sends the luminance data in the form of digital data 14 to a digital data processor 16.
  • the digital data processor 16 may perform some data manipulation functions, such as scaling the resolution or changing the color of the display.
  • the digital data processor 16 sends digital data 18 to a data driver integrated circuit (IC) 20.
  • the data driver IC 20 converts that digital data 18 into an analog voltage or current 22, which is sent to thin film transistors (TFTs) 26 in a pixel circuit 24.
  • TFTs 26 convert that voltage or current 22 into another current 28 which flows through an organic light-emitting diode (OLED) 30.
  • OLED organic light-emitting diode
  • the OLED 30 converts the current 28 into visible light 36.
  • the OLED 30 has an OLED voltage 32, which is the voltage drop across the OLED.
  • the OLED 30 also has an efficiency 34, which is a ratio of the amount of light emitted to the current through the OLED.
  • the digital data 14, analog voltage/current 22, current 28, and visible light 36 all contain the exact same information (i.e. luminance data). They are simply different formats of the initial luminance data that came from the video source 12. The desired operation of the system is for a given value of luminance data from the video source 12 to always result in the same value of the visible light 36.
  • the TFTs will output lower current 28 for the same input from the data driver IC 20.
  • the OLED 30 will consume greater voltage 32 for the same input current. Because the TFT 26 is not a perfect current source, this will actually reduce the input current 28 slightly. With continued usage, the OLED 30 will lose efficiency 34, and emit less visible light for the same current.
  • the visible light output 36 will be less over time, even with the same luminance data being sent from the video source 12.
  • different pixels may have different amounts of degradation.
  • FIG. 2 illustrates an operational flow of a conventional AMOLED display 40 that includes the feedback loop.
  • a light detector 42 is employed to directly measure the visible light 36.
  • the visible light 36 is converted into a measured signal 44 by the light detector 42.
  • a signal converter 46 converts the measured visible light signal 44 into a feedback signal 48.
  • the signal converter 46 may be an analog-to-digital converter, a digital-to-analog converter, a microcontroller, a transistor, or another circuit or device.
  • the feedback signal 48 is used to modify the luminance data at some point along its path, such as an existing component (e.g. 12, 16, 20, 26, 30), a signal line between components (e.g. 14, 18, 22, 28, 36), or combinations thereof.
  • the luminance data may be modified based on the feedback signal 48 from the signal converter 46.
  • the luminance signal may be increased to compensate for the degradation of the TFT 26 or the OLED 30. This results in that the visible light 36 will be constant regardless of the degradation.
  • This compensation scheme is often known as Optical Feedback (OFB).
  • OFB Optical Feedback
  • the light detector 42 must be integrated onto a display, usually within each pixel and coupled to the pixel circuitry. Not considering the inevitable issues of yield when integrating a light detector into each pixel, it is desirable to have a light detector which does not degrade itself, however such light detectors are costly to implement, and not compatible with currently installed TFT-LCD fabrication infrastructure.
  • AMOLED displays are conventionally operated according to digital data from a video source.
  • the OLEDs within the display can be programmed to emit light with luminance according to a programming voltage or a programming current.
  • the programming current or programming voltage are conventionally set by a display driver that takes digital data as input and has an analog output for sending the programming current or programming voltage to pixel circuits.
  • the pixel circuits are configured to drive current through OLEDs based on the programming current or programming voltage.
  • US 2005/280615 A1 describes a method for the correction of brightness and uniformity variations in OLED displays, comprising: a) providing an OLED display having a plurality of light-emitting elements with a common power signal and local control signals; b) providing a digital input signal for displaying information on each light-emitting element, the signal having a first bit depth; c) transforming the digital input signal into a transformed digital signal having a second bit depth greater than the first bit depth; and d) correcting the transformed signal for one or more light-emitting elements of the display by applying a local correction factor to produce a corrected digital signal.
  • US 2009/146926 A1 describes a driving apparatus for an organic light emitting device including pixels with light-emitting devices and a method of making such apparatus.
  • the uniform values based on voltages for each frame corresponding to grays of input image signals are calculated and summed, and data voltages are increased when the sum exceeds a predetermined value.
  • the apparatus aims at helping to maintain the desired brightness in an organic light emitting diode display device through the lifespan of the device.
  • US 2005/007392 A1 describes an electro-optical device that stabilizes display quality by performing correction processing corresponding to a plurality of disturbance factors.
  • a grayscale characteristic generating unit can generate conversion data having grayscale characteristics obtained by changing the grayscale characteristics of display data that defines the grayscales of pixels with reference to a conversion table whose description contents include correction factors.
  • a data line driving circuit can drive the pixels after correcting the grayscale characteristics of the conversion data by the correction factors using other processing different from the that performed by the grayscale characteristic generating unit.
  • WO 2006/108277 A1 describes a method and system for compensation of non-uniformities in light emitting device displays is provided. The system includes a module for estimating degradation of an entire pixel circuit based on measurement of a part of the pixel circuit. Based on the estimation, a correction factor is produced to correct non-uniformity of the display.
  • US 2010/225630 A1 describes an electroluminescent subpixel, such as an organic light-emitting diode subpixel, that is compensated for aging effects such as threshold voltage Vth shift, EL voltage Voled shift, and OLED efficiency loss.
  • the drive current of the subpixel is measured at one or more measurement reference gate voltages to form a status signal representing the characteristics of the drive transistor and EL emitter of the subpixel.
  • Current measurements are taken in the linear region of drive transistor operation to improve signal-to-noise ratio in systems such as modern LTPS PMOS OLED displays, which have relatively small Voled shift over their lifetimes and thus relatively small current change due to channel-length modulation.
  • Various sources of noise are also suppressed to further increase signal-to-noise ratio.
  • CA 2 541 531 A1 describes a method and system for compensation of non-uniformities in light emitting device displays.
  • the system includes a module for estimating degradation of an entire pixel circuit based on measurement of a part of the pixel circuit. Based on the estimation, a correction factor is produced to correct non-uniformity of the display.
  • the present disclosure provides a method of maintaining uniform luminosity of an AMOLED display.
  • the AMOLED display includes an array of pixels having light emitting devices.
  • the light emitting devices are configured to emit light according to digital input from a video source.
  • the video source includes digital data corresponding to a desired luminance of each pixel in the AMOLED display. Over time, aspects within the light emitting devices and their associated driving circuits degrade and require compensation to continue to emit light with the same luminance for a given digital input.
  • Degradation of the pixels in the light emitting display are compensated by incrementing the digital inputs of the pixels according to a measured or estimated degradation of the pixels.
  • the digital input is compressed to a range of values less than an available range. Compressing the digital input is carried out according to a compression factor, which is a number less than one.
  • the digital inputs are multiplied by the compression factor, which compresses the digital input to a range less than the available range. The remaining portion of the digital range can be used to provide compensation to degraded pixels based on measured or estimated degradation of the pixels.
  • the present disclosure provides methods for setting and adjusting the compression factor to dynamically adjust the compression factor and provide compensation to the display by incrementing the digital signals before the signals are sent to the driving circuits.
  • Embodiments of the present invention are described using an AMOLED display which includes a pixel circuit having TFTs and an OLED.
  • the transistors in the pixel circuit may be fabricated using amorphous silicon, nano/micro crystalline silicon, poly silicon, organic semiconductors technologies (e.g. organic TFT), NMOS technology, CMOS technology (e.g. MOSFET), or combinations thereof.
  • the transistors may be a p-type transistor or n-type transistor.
  • the pixel circuit may include a light emitting device other than OLED. In the description below, "pixel” and “pixel circuit” may be used interchangeably.
  • FIG. 3 illustrates the operation of a light emitting display system 100 to which a compensation scheme in accordance with an embodiment of the present invention is applied.
  • a video source 102 contains luminance data for each pixel and sends the luminance data in the form of digital data 104 to a digital data processor 106.
  • the digital data processor 106 may perform some data manipulation functions, such as scaling the resolution or changing the color of the display.
  • the digital data processor 106 sends digital data 108 to a data driver IC 110.
  • the data driver IC 110 converts that digital data 108 into an analog voltage or current 112.
  • the analog voltage or current 112 is applied to a pixel circuit 114.
  • the pixel circuit 114 includes TFTs and an OLED.
  • the pixel circuit 114 outputs a visible light 126 based on the analog voltage or current 112.
  • one pixel circuit is shown as an example.
  • the light emitting display system 100 includes a plurality of pixel circuits.
  • the video source 102 may be similar to the video source 12 of FIGS. 1 and 2 .
  • the data driver IC 110 may be similar to the data driver IC 20 of FIGS. 1 and 2 .
  • a compensation functions module 130 is provided to the display.
  • the compensation functions module 130 includes a module 134 for implementing an algorithm (referred to as TFT-to-pixel circuit conversion algorithm) on measurement 132 from the pixel circuit 114 (referred to as degradation data, measured degradation data, measured TFT degradation data, or measured TFT and OLED degradation data), and outputs calculated pixel circuit degradation data 136.
  • TFT-to-pixel circuit conversion algorithm module and “TFT-to-pixel circuit conversion algorithm” may be used interchangeably.
  • the degradation data 132 is electrical data which represents how much a part of the pixel circuit 114 has been degraded.
  • the data measured from the pixel circuit 114 may represent, for example, one or more characteristics of a part of the pixel circuit 114.
  • the degradation data 132 is measured from, for example, one or more thin-film-transistors (TFTs), an organic light emitting diode (OLED) device, or a combination thereof. It is noted that the transistors of the pixel circuit 114 are not limited to TFTs, and the light emitting device of the pixel circuit 114 is not limited to an OLED.
  • the measured degradation data 132 may be digital or analog data.
  • the system 100 provides compensation data based on measurement from a part of the pixel circuit (e.g. TFT) to compensate for non-uniformities in the display.
  • the non-uniformities may include brightness non-uniformity, color non-uniformity, or a combination thereof. Factors for causing such non-uniformities may include, but are not limited to, process or construction inequalities in the display, aging of pixels, etc.
  • the degradation data 132 may be measured at a regular timing or a dynamically regulated timing.
  • the calculated pixel circuit degradation data 136 may be compensation data to correct non-uniformities in the display.
  • the calculated pixel circuit degradation data 136 may include any parameters to produce the compensation data.
  • the compensation data may be used at a regular timing (e.g. each frame, regular interval, etc.) or dynamically regulated timing.
  • the measured data, compensation data, or a combination thereof may be stored in a memory (e.g. 142 of FIG. 8 ).
  • the TFT-to-pixel circuit conversion algorithm module 134 or the combination of the TFT-to-pixel circuit conversion algorithm module 134 and the digital data processor 106 estimates the degradation of the entire pixel circuit based on the measured degradation data 132. Based on this estimation, the entire degradation of the pixel circuit 114 is compensated by adjusting, at the digital data processor 106, the luminance data (digital data 104) applied to a certain pixel circuit(s).
  • the system 100 may modify or adjust luminance data 104 applied to a degraded pixel circuit or non-degraded pixel circuit. For example, if a constant value of visible light 126 is desired, the digital data processor 106 increases the luminance data for a pixel that is highly degraded, thereby compensating for the degradation.
  • the TFT-to-pixel circuit conversion algorithm module 134 is provided separately from the digital data processor 106. However, the TFT-to-pixel circuit conversion algorithm module 134 may be integrated into the digital data processor 106.
  • FIG. 4 illustrates an example of the system 100 of FIG. 3 .
  • the pixel circuit 114 of FIG. 4 includes TFTs 116 and OLED 120.
  • the analog voltage or current 112 is provided to the TFTs 116.
  • the TFTs 116 convert that voltage or current 112 into another current 118 which flows through the OLED 120.
  • the OLED 120 converts the current 118 into the visible light 126.
  • the OLED 120 has an OLED voltage 122, which is the voltage drop across the OLED.
  • the OLED 120 also has an efficiency 134, which is a ratio of the amount of light emitted to the current through the OLED 120.
  • the system 100 of FIG. 4 measures the degradation of the TFTs only.
  • the degradation of the TFTs 116 and the OLED 120 are usage-dependent, and the TFTs 116 and the OLED 120 are always linked in the pixel circuit 114. Whenever the TFT 116 is stressed, the OLED 120 is also stressed. Therefore, there is a predictable relationship between the degradation of the TFTs 116, and the degradation of the pixel circuit 114 as a whole.
  • the TFT-to-pixel circuit conversion algorithm module 134 or the combination of the TFT-to-pixel circuit conversion algorithm module 134 and the digital data processor 106 estimates the degradation of the entire pixel circuit based on the TFT degradation only.
  • An embodiment of the present invention may also be applied to systems that monitor both TFT and OLED degradation independently.
  • the pixel circuit 114 has a component that can be measured.
  • the measurement obtained from the pixel circuit 114 is in some way related to the pixel circuit's degradation.
  • FIG. 5 illustrates an example of the pixel circuit 114 of FIG. 4 .
  • the pixel circuit 114 of FIG. 5 is a 4-T pixel circuit.
  • the pixel circuit 114A includes a switching circuit having TFTs 150 and 152, a reference TFT 154, a dive TFT 156, a capacitor 158, and an OLED 160.
  • the gate of the switch TFT 150 and the gate of the feedback TFT 152 are connected to a select line Vsel.
  • the first terminal of the switch TFT 154 and the first terminal of the feedback TFT 152 are connected to a data line Idata.
  • the second terminal of the switch TFT 150 is connected to the gate of the reference TFT 154 and the gate of the drive TFT 156.
  • the second terminal of the feedback TFT 152 is connected to the first terminal of the reference TFT 154.
  • the capacitor 158 is connected between the gate of the drive TFT 156 and ground.
  • the OLED 160 is connected between voltage supply Vdd and the drive TFT 156.
  • the OLED 160 may also be connected between drive TFT 156 and ground in other systems (i.e. drain-connected format).
  • Vsel When programming the pixel circuit 114A, Vsel is high and a voltage or current is applied to the data line Idata.
  • the data Idata initially flows through the TFT 150 and charges the capacitor 158.
  • the TFT 154 begins to turn on and Idata starts to flow through the TFTs 152 and 154 to ground.
  • the capacitor voltage stabilizes at the point when all of Idata flows through the TFTs 152 and 154.
  • the current flowing through the TFT 154 is mirrored in the drive TFT 156.
  • the current flowing into the Idata node can be measured.
  • the voltage at the Idata node can be measured.
  • the analog voltage/current 112 shown in FIG. 4 is connected to the Idata node. The measurement of the voltage or current can occur anywhere along the connection between the data diver IC 110 and the TFTs 116.
  • the TFT-to-pixel circuit conversion algorithm is applied to the measurement 132 from the TFTs 116.
  • current/voltage information read from various places other than TFTs 116 may be usable.
  • the OLED voltage 122 may be included with the measured TFT degradation data 132.
  • FIG. 6 illustrates a further example of the system 100 of FIG. 3 .
  • the system 100 of FIG. 6 measures the OLED voltage 122.
  • the measured data 132 is related to the TFT 116 and OLED 120 degradation ("measured TFT and OLED voltage degradation data 132A" in FIG. 6 ).
  • the compensation functions module 130 of FIG. 6 implements the TFT-to-pixel circuit conversion algorithm 134 on the signal related to both the TFT degradation and OLED degradation.
  • the TFT-to-pixel circuit conversion algorithm module 134 or the combination of the TFT-to-pixel circuit conversion algorithm module 134 and the digital data processor 106 estimates the degradation of the entire pixel circuit based on the TFT degradation and the OLED degradation.
  • the TFT degradation and OLED degradation may be measured separately and independently.
  • FIG. 7 illustrates an example of the pixel circuit 114 of FIG. 6 .
  • the pixel circuit 114B of FIG. 7 is a 4-T pixel circuit.
  • the pixel circuit 114B includes a switching circuit having TFTs 170 and 172, a reference TFT 174, a drive TFT 176, a capacitor 178, and an OLED 180.
  • the gate of the switch TFT 170 and the gate of the switch TFT 172 are connected to a select line Vsel.
  • the first terminal of the switch TFT 172 is connected to a data line Idata while the first terminal of the switch TFT 170 is connected to the second terminal of the switch TFT 172 which is connected to the gate of the reference TFT 174 and the gate of the dive TFT 176.
  • the second terminal of the switch TFT 170 is connected to the first terminal of the reference TFT 174.
  • the capacitor 178 is connected between the gate of the dive TFT 176 and ground.
  • the first terminal of the dive TFT 176 is connected to voltage supply Vdd.
  • the second terminal of the reference TFT 174 and the second terminal of the drive TFT 176 are connected to the OLED 180.
  • Vsel When programming the pixel circuit 114B, Vsel is high and a voltage or current is applied to the data line Idata.
  • the data Idata initially flows through the TFT 172 and charges the capacitor 178.
  • the TFT 174 begins to turn on and Idata starts to flow through the TFTs 170 and 174 and OLED 180 to ground.
  • the capacitor voltage stabilizes at the point when all of Idata flows through the TFTs 170 and 174.
  • the current flowing through the TFT 174 is mirrored in the drive TFT 176.
  • the current flowing into the Idata node can be measured.
  • the voltage at the Idata node can be measured. As the TFTs degrade, the measured voltage (or current) will change, allowing a measure of the degradation to be recorded. It is noted that unlike the pixel circuit 114A of FIG. 5 , the current now flows through the OLED 180. Therefore the measurement made at the Idata node is now partially related to the OLED voltage, which will degrade over time. In the pixel circuit 114B, the analog voltage/current 112 shown in FIG. 6 is connected to the Idata node. The measurement of the voltage or current can occur anywhere along the connection between the data driver IC 110 and the TFTs 116.
  • the pixel circuit 114 may allow the current out of the TFTs 116 to be measured, and to be used as the measured TFT degradation data 132.
  • the pixel circuit 114 may allow some part of the OLED efficiency to be measured, and to be used as the measured TFT degradation data 132.
  • the pixel circuit 114 may also allow a node to be charged, and the measurement may be the time it takes for this node to discharge.
  • the pixel circuit 114 may allow any parts of it to be electrically measured. Also, the discharge/charge level during a given time can be used for aging detection.
  • the compensation functions module 130 of FIG. 8 includes an analog/digital (A/D) converter 140.
  • the A/D converter 140 converts the measured TFT degradation data 132 into digital measured TFT voltage/current 112 shown in FIG. 4 is connected to the Idata node.
  • the measurement of the voltage or current can occur anywhere along the connection between the data driver IC 110 and the TFTs 116.
  • the TFT-to-pixel circuit conversion algorithm is applied to the measurement 132 from the TFTs 116.
  • current/voltage information read from various places other than TFTs 116 may be usable.
  • the OLED voltage 122 may be included with the measured TFT degradation data 132.
  • FIG. 6 illustrates a further example of the system 100 of FIG. 3 .
  • the system 100 of the FIG. 6 measured the OLED voltage 122.
  • the measured data 132 is related to the TFT 116 and OLED 120 degradation ("measured TFT and OLED voltage degradation data 132A" in FIG. 6 ).
  • the compensation functions module 130 of FIG. 6 implements the TFT-to-pixel circuit conversion algorithm 134 on the signal related to both the TFT degradation and OLED degradation.
  • the TFT-to-pixel circuit conversion algorithm module 134 or the combination of the TFT-to-pixel circuit conversion algorithm module 134 and the digital data processor 106 estimates the degradation fo the entire pixel circuit based on the TFT degradation and the OLED degradation.
  • the TFT degradation and OLED degradation may be measured separately and independently.
  • FIG. 7 illustrates an example of the pixel circuit 114 of FIG. 6 .
  • the pixel circuit 114B of FIG. 7 is a 4-T pixel circuit.
  • the pixel circuit 114B includes a switching circuit having TFTs 170 and 172, a reference TFT 174, a drive TFT 176, a capacitor 178, and an OLED 180.
  • the gate of the switch TFT 170 and the gate of the switch TFT 172 are connected to a select line Vsel.
  • the first terminal of the switch TFT 172 is connected to a data line Idata while the first terminal of the switch TFT 170 is connected to the second terminal of the switch TFT 172, which is connected to the gate of the reference TFT 174 and the gate of the drive TFT 176.
  • the second terminal of the switch TFT 170 is connected to the first terminal of the reference TFT 174.
  • the capacitor 178 is connected between the gate of the drive TFT 176 and ground.
  • the first terminal of the drive TFT 176 is connected to voltage supply Vdd.
  • the second terminal of the reference TFT 174 and the second terminal of the drive TFT 176 are connected to the OLED 180.
  • Vsel When programming the pixel circuit 114B, Vsel is high and a voltage or current is applied to the data line Idata.
  • the data Idata initially flows through the TFT 172 and charges the capacitor 178.
  • the TFT 174 begins to turn on and Idata starts to flow through the TFTs 170 and 174 and OLED 180 to ground.
  • the capacitor voltage stabilizes at the point when all of Idata flows through the TFTs 152 and 154.
  • the current flowing through the TFT 154 is mirrored in the drive TFT 156.
  • the current flowing into the Idata node can be measured.
  • the voltage at the Idata node can be measured. As the TFTs degrade, the measured voltage (or current) will change, allowing a measure of the degradation to be recorded. It is noted that unlike the pixel circuit 114A of FIG. 5 , the current now flows through the OLED 180. Therefore the measurement made at the Idata node is now partially related to the OLED voltage, which will degrade over time. In the pixel circuit 114B, the analog voltage/current 112 shown in FIG. 6 is connected to the Idata node. The measurement of the voltage or current can occur anywhere along the connection between the data driver IC 110 and the TFTs 116.
  • the pixel circuit 114 may allow the current out of the TFTs 116 to be measured, and to be used as the measured TFT degradation data 132.
  • the pixel circuit 114 may allow some part of the OLED efficiency to be measured, and to be used as the measured TFT degradation data 132.
  • the pixel circuit 114 may also allow a node to be charged, and the measurement may be the time it takes for this node to discharge.
  • the pixel circuit 114 may allow any parts of it to be electrically measured. Also, the discharge/charge level during a given time can be used for aging detection.
  • the compensation functions module 130 of FIG. 8 includes an analog/digital (A/D) converter 140.
  • the A/D converter 140 converts the measured TFT degradation data 132 into digital measured TFT degradation data 132B.
  • the digital measured TFT degradation data 132B is converted into the calculated pixel circuit degradation data 136 at the TFT-to-pixel circuit conversion algorithm module 134.
  • the calculated pixel circuit degradation data 136 is stored in a lookup table 142. Since measuring TFT degradation data from some pixel circuits may take a long time, the calculated pixel circuit degradation data 136 is stored in the lookup table 142 for use.
  • the TFT-to-pixel circuit conversion algorithm 134 is a digital algorithm.
  • the digital TFT-to-pixel circuit conversion algorithm 134 may be implemented, for example, on a microprocessor, an FPGA, a DSP, or another device, but not limited to these examples.
  • the lookup table 142 may be implemented using memory, such as SRAM or DRAM. This memory may be in another device, such as a microprocessor or FPGA, or may be an independent device.
  • the calculated pixel circuit degradation data 136 stored in the lookup table 142 is always available for the digital data processor 106.
  • the TFT degradation data 132 for each pixel does not have to be measured every time the digital data processor 106 needs to use the data.
  • the degradation data 132 may be measured infrequently (for example, once every 20 hours, or less). Using a dynamic time allocation for the degradation measurement is another case, more frequent extraction at the beginning and less frequent extraction after the aging gets saturated.
  • the digital data processor 106 may include a compensation module 144 for taking input luminance data for the pixel circuit 114 from the video source 102, and modifying it based on degradation data for that pixel circuit or other pixel circuit.
  • the module 144 modifies luminance data using information from the lookup table 142.
  • FIG. 8 is applicable to the system of FIGS. 3 and 6 . It is noted that the lookup table 142 is provided separately from the compensating functions module 130, however, it may be in the compensating functions module 130. It is noted that the lookup table 142 is provided separately from the digital data processor 106, however, it may be in the digital data processor 106.
  • the output of the TFT-to-pixel circuit conversion algorithm module 134 is an integer value.
  • This integer is stored in a lookup table 142A (corresponding to 142 of FIG. 8 ). Its location in the lookup table 142A is related to the pixel's location on the AMOLED display. Its value is a number, and is added to the digital luminance data 104 to compensate for the degradation.
  • digital luminance data may be represented to use 8-bits (256 values) for the brightness of a pixel.
  • a value of 246 may represent maximum luminance for the pixel.
  • a value of 128 may represent approximately 50% luminance.
  • the value in the lookup table 142A may be the number that is added to the luminance data 104 to compensate for the degradation. Therefore, the compensation module (144 of FIG. 7 ) in the digital data processor 106 may be implemented by a digital adder 144A.
  • digital luminance data may be represented by any number of bits, depending on the driver IC used (for example, 6-bit, 8-bit, 10-bit, 14-bit, etc.).
  • the TFT-to-pixel circuit conversion algorithm module 134 has the measured TFT degradation data 132 or 132A as an input, and the calculated pixel circuit degradation data 136 as an output. However, there may be other inputs to the system to calculate compensation data as well, as shown in FIG. 10.
  • FIG. 10 illustrates an example of inputs to the TFT-to-pixel circuit conversion algorithm module 134.
  • the TFT-to-pixel circuit conversion algorithm module 134 processes the measured data (132 of FIGS. 3 , 4 , 8 , and 9 ; 132A of FIG. 5 ; 132B of FIGS 8 and 9 ) based on additional inputs 190 (e.g. temperature, other voltages, etc.), empirical constants 192, or combinations thereof.
  • the additional inputs 190 may include measured parameters such as a voltage reading from current-programming pixels and a current reading from voltage-programming pixels. These pixels may be different from a pixel circuit from which the measured signal is obtained. For example, a measurement is taken from a "pixel under test” and is used in combination with another measurement from a "reference pixel.” As described below, in order to determine how to modify luminance data to a pixel, data from other pixels in the display may be used.
  • the additional inputs 190 may include light measurements, such as measurement of an ambient light in a room. A discrete device or some kind of test structure around the periphery of the panel may be used to measure the ambient light.
  • the additional inputs may include humidity measurements, temperature readings, mechanical stress readings, other environmental stress readings, and feedback from test structures on the panel
  • empirical parameters 192 such as the brightness loss in the OLED due to decreasing efficiency ( ⁇ L), the shift in OLED voltage over time ( ⁇ Voled), dynamic effects of Vt shift, parameters related to TFT performance such as Vt, ⁇ Vt, mobility ( ⁇ ), inter-pixel non-uniformity, DC bias voltages in the pixel circuit, changing gain of current-mirror based pixel circuits, short-term and long-term based shifts in pixel circuit performance, pixel
  • the TFT-to-pixel-circuit conversion algorithm in the module 134 and the compensation algorithm 144 in the digital data processor 106 work together to convert the measured TFT degradation data 132 into a luminance correction factor.
  • the luminance correction factor has information about how the luminance data for a given pixel is to be modified, to compensate for the degradation in the pixel.
  • the majority of this conversion is done by the TFT-to-pixel-circuit conversion algorithm module 134. It calculates the luminance correction values entirely, and the digital adder 144A in the digital data processor 106 simply adds the luminance correction values to the digital luminance data 104.
  • the system 100 may be implemented such that the TFT-to-pixel circuit conversion algorithm module 134 calculates only the degradation values, and the digital data processor 106 calculates the luminance correction factor from that data.
  • the TFT-to-pixel circuit conversion algorithm 134 may employ fuzzy logic, neural networks, or other algorithm structures to convert the degradation data into the luminance correction factor.
  • the value of the luminance correction factor may allow the visible light to remain constant, regardless of the degradation in the pixel circuit.
  • the value of the luminance correction factor may allow the luminance of degraded pixels not to be altered at all; instead, the luminance of the non-degraded pixels to be decreased. In this case, the entire display may gradually lose luminance over time, however the uniformity may be high.
  • the calculation of a luminance correction factor may be implemented in accordance with a compensation of non-uniformity algorithm, such as a constant brightness algorithm, a decreasing brightness algorithm, or combinations thereof.
  • the constant brightness algorithm and the decreasing brightness algorithm may be implemented on the TFT-to-pixel circuit conversion algorithm module (e.g. 134 of FIG. 3 ) or the digital data processor (e.g. 106 of FIG. 3 ).
  • the constant brightness algorithm is provided for increasing brightness of degraded pixels so as to match nondegraded pixels.
  • the decreasing brightness algorithm is provided for decreasing brightness of non-degraded pixels 244 so as to match degraded pixels.
  • These algorithm may be implemented by the TFT-to-pixel circuit conversion algorithm module, the digital data processor (such as 144 of FIG. 8 ), or combinations thereof. It is noted that these algorithms are examples only, and the compensation of non-uniformity algorithm is not limited to these algorithms.
  • an AMOLED display includes a plurality of pixel circuits, and is driven by a system as shown in FIGS. 3 , 4 , 6 , 8 and 9 . It is noted that the circuitry to drive the AMOLED display is not shown in FIGS. 11A-11E .
  • the video source (102 of FIGS. 3 , 4 , 7 , 8 and 9 ) initially outputs maximum luminance data to each pixel. No pixels are degraded since the display 240 is new. The result is that all pixels output equal luminance and thus all pixels show uniform luminance.
  • FIG. 11B schematically illustrates the AMOLED display 240 which has operated for a certain period where maximum luminance data is applied to pixels in the middle of the display.
  • the video source outputs maximum luminance data to pixels 242, while it outputs minimum luminance data (e.g. zero luminance data) to pixels 244 around the outside of the pixels 242. It maintains this for a long period of time, for example 1000 hours. The result is that the pixels 242 at maximum luminance will have degraded, and the pixels 244 at zero luminance will have no degradation.
  • the video source outputs maximum luminance data to all pixels.
  • the results are different depending on the compensation algorithm used, as shown in FIGS. 11C-11E .
  • FIGS. 11C schematically illustrates the AMOLED display 240 to which no compensation algorithm is applied. As shown in FIG. 11C , if there was no compensation algorithm, the degraded pixels 242 would have a lower brightness than the non-degraded pixels 244.
  • FIG. 11D schematically illustrates the AMOLED display 240 to which the constant brightness algorithm is applied.
  • the constant brightness algorithm is implemented for increasing luminance data to degraded pixels, such that the luminance data of the degraded pixels 242 matches that of non-degraded pixels 244.
  • the increasing brightness algorithm provides increasing currents to the stressed pixels 242, and constant current to the unstressed pixels 244. Both degraded and non-degraded pixels have the same brightness.
  • the display 240 is uniform. Differential aging is compensated, and brightness is maintained, however more current is required. Since the current to some pixels is being increased, this will cause the display to consume more current over time, and therefore more power over time because power consumption is related to the current consumption.
  • FIG. 11E schematically illustrates the AMOLED display 240 to which the decreasing brightness algorithm is applied.
  • the decreasing brightness algorithm decreases luminance data to non-degraded pixels, such that the luminance data of the non-degraded pixels 244 match that of degraded pixels 242.
  • the decreasing brightness algorithm provides constant OLED current to the stressed pixels 242, while decreasing current to the unstressed pixels 244. Both degraded and non-degraded pixels have the same brightness.
  • the display 240 is uniform. Differential aging is compensated, and it requires a lower Vsupply, however brightness decrease over time. Because this algorithm does not increase the current to any of the pixels, it will not result in increased power consumption.
  • components such as the video source 102 and the data driver IC 110, may use only 8-bits, or 256 discrete luminance values. Therefore if the video source 102 outputs maximum brightness (a luminance value of 255), there is no way to add any additional luminance, since the pixel is already at the maximum brightness supported by the components in the system. Likewise, if the video source 102 outputs minimum brightness (a luminance value of 0), there is no way to subtract any luminance.
  • the digital data processor 106 may implement a grayscale compression algorithm to reserve some grayscales.
  • FIG. 12 illustrates an implementation of the digital data processor 106 which includes a grayscale compression algorithm module 250.
  • the grayscale compression algorithm 250 takes the video signal 104 represented by 256 luminance values (251), and transforms it to use less luminance values (252). For example, instead of minimum brightness represented by grayscale 0, minimum brightness may be represented by grayscale 50. Likewise, maximum brightness may be represented by grayscale 200. In this way, there are some grayscales reserved for future increase (254) and decrease (253). It is noted that the shift in grayscales does not reflect the actual expected shift in grayscales.
  • the scheme of estimating (predicting) the degradation of the entire pixel circuit and generating a luminance correction factor ensures uniformities in the display.
  • the aging of some components or entire circuit can be compensated, thereby ensuring uniformity of the display.
  • the TFT-to-pixel circuit conversion algorithm allows for improved display parameters, for example, including constant brightness uniformity and color uniformity across the panel over time. Since the TFT-to-pixel circuit conversion algorithm takes in additional parameters, for example, temperature and ambient light, any changes in the display due to these additional parameters may be compensated for.
  • the TFT-to-Pixel circuit conversion algorithm module (134 of FIGS. 3 , 4 , 6 , 8 and 9 ), the compensation module (144 of FIG. 8 , 144A of FIG. 9 , the compensation of non-uniformity algorithm, the constant brightness algorithm, the decreasing brightness algorithm and the grayscale compression algorithm may be implemented by any hardware, software or a combination of hardware and software having the above described functions.
  • the software code, instructions and/or statements, either in its entirety or a part thereof, may be stored in a computer readable memory.
  • a computer data signal representing the software code, instructions and/or statements, which may be embedded in a carrier wave may be transmitted via a communication network.
  • Such a computer readable memory and a computer data signal and/or its carrier are also within the scope of the present invention, as well as the hardware, software and the combination thereof.
  • FIG. 3 illustrates the operation of the light emitting display system 100 by applying a compensation algorithm to digital data 104.
  • FIG. 3 illustrates the operation of a pixel in an active matrix organic light emitting diode (AMOLED) display.
  • the display system 100 includes an array of pixels.
  • the video source 102 includes luminance input data for the pixels.
  • the luminance data is sent in the form of digital input data 104 to the digital data processor 106.
  • the digital input data 104 can be eight-bit data represented as integer values existing between 0 and 255, with greater integer values corresponding to higher luminance levels.
  • the digital data processor 106 can optionally manipulate the digital input data 104 by, for example, scaling the resolution of the video source 102 to a native screen resolution, adjusting the color balance, or applying a gamma correction to the video source 102.
  • the digital data processor 106 can also apply degradation corrections to the digital input data 104 based on degradation data 136.
  • the digital data processor 106 sends the resulting digital data 108 to the data driver integrated circuit (IC) 110.
  • the data driver IC 110 converts the digital data 108 into the analog voltage or current output 112.
  • the data driver IC 110 can be implemented, for example, as a module including a digital to analog converter.
  • the analog voltage or current 112 is provided to the pixel circuit 114.
  • the pixel circuit 114 can include an organic light emitting diode (OLED) and thin film transistors (TFTs).
  • OLED organic light emitting diode
  • TFTs thin film transistors
  • One of the TFTs in the pixel circuit 114 can be a drive TFT that applies a drive current to the OLED.
  • the OLED emits visible light 126 responsive to the drive current flowing to the OLED.
  • the visible light 126 is emitted with a luminance related to the amount of current flowing to the OLED through the drive TFT.
  • the drive TFT within the pixel circuit 114 can supply the OLED according to the analog voltage or current 112 by, for example, biasing the gate of the drive TFT with the programming voltage.
  • the pixel circuit 114 can also operate where the analog voltage or current 112 is a programming current applied to each pixel rather than a programming voltage.
  • a display system 100 utilizing programming currents can use current mirrors in each pixel circuit 114 to apply a drive current to the OLED through the drive TFT according to the programming current applied to each pixel.
  • the luminance of the emitted visible light 126 is affected by aspects within the pixel circuit 114 including the gradual degradation of hardware within the pixel circuit 114.
  • the drive TFT has a threshold voltage, and the threshold voltage can change over time due to aging and stressing of the drive TFT.
  • the luminance of the emitted visible light 126 can be influenced by the threshold voltage of the drive TFT, the voltage drop across the OLED, and the efficiency of the OLED.
  • the efficiency of the OLED is a ratio of the luminance of the emitted visible light 126 to the drive current flowing through the OLED.
  • the degradation can generally be non-uniform across the display system 100 due to, for example, manufacturing tolerances of the drive TFTs and OLEDs and differential aging of pixels in the display system 100.
  • Non-uniformities in the display 100 are generally referred to as display mura or defects.
  • display mura or defects In a display 100 with an array of OLEDs having uniform light emitting efficiency and threshold voltages driven by TFTs having uniform gate threshold voltages, the luminance of the display will be uniform when all the pixels in the display are programmed with the same analog voltage or current 112. However, as the OLEDs and TFTs in each pixel age and the degradation characteristics change, the luminance of the display ceases to be uniform when programmed the same.
  • the degradation can be compensated for by increasing the amount of drive current sent through the OLED in the pixel circuit 114.
  • compensation for the degradation of the display 100 can be carried out by adjusting the digital data 108 output from the digital data processor 106.
  • the digital data processor 106 receives the degradation data 136 from the compensation module 130.
  • the compensation module 130 receives degradation data 132 based on measurements of parameters within the pixel circuit 114.
  • the degradation data 132 sent to the compensation module 130 can be based on estimates of expected performance of the hardware aspects within the pixel circuit 114.
  • the compensation module 130 includes the module 134 for implementing the algorithm 134, such as the TFT-to-pixel circuit conversion algorithm.
  • the degradation data 132 can be electrical data that represents how much a hardware aspect of the pixel circuit 114 has been degraded.
  • the degradation data 132 measured or estimated from the pixel circuit 114 can represent one or more characteristics of the pixel circuit 114.
  • the programming voltage is generally determined by the digital input data 104, which is converted to a voltage in the data driver IC 110.
  • the present disclosure provides a method of compensating for non-uniform characteristics in each pixel circuit 114 that affect the luminance of the emitted visible light 126 from each pixel. Compensation is performed by adjusting the digital input data 104 in the digital data processor 106 before the digital data 108 is passed to the data driver IC 110.
  • FIG. 13 is a data flow chart showing the compression and compensation of luminosity input data 304 used to drive an AMOLED display.
  • the data flow chart shown in FIG. 13 includes a digital data processor block 306 that can be considered an implementation of the digital data processor 106 shown in FIG. 3 .
  • a video source provides the luminosity input data 304.
  • the input data 304 is a set of eight-bit integer values.
  • the input data 304 includes integer values that exist between 0 and 255, with the values representing 256 possible programmable luminosity values of the pixels in the AMOLED display. For example, 255 can correspond to a pixel programmed with maximum luminance, and 127 can correspond to a pixel programmed with roughly half the maximum luminance.
  • the input data 304 is similar to the digital input data 104 shown in FIG. 3 .
  • the input data 304 is sent to the digital data processor block 306.
  • the input data 304 is multiplied by four (310) in order to translate the eight-bit input data 304 to ten-bit resulting data 312.
  • the resulting data 312 is a set of ten-bit integers existing between 0 and 1020.
  • the resulting data 312 can be manipulated for compensation of luminance degradation with finer steps than can be applied to the eight-bit input data 304.
  • the ten-bit resulting data 312 can also be more accurately translated to programming voltages according to a gamma correction.
  • the gamma correction is a non-linear, power law correction as is appreciated in the art of display technology. Applying the gamma correction to the input data can be advantageous, for example, to account for the logarithmic nature of the perception of luminosity in the human eye. According to an aspect of the present disclosure, multiplying the input data 304 by four (310) translates the input data 304 into a higher quantized domain.
  • the input data 304 can be multiplied by any number to translate the input data 310 into a higher quantized domain.
  • the translation can advantageously utilize multiplication by a power of two, such as four, but the present disclosure is not so limited.
  • the resulting data 312 is multiplied by a compression factor, K (314).
  • the compression factor, K is a number with a value less than one.
  • Multiplying the resulting data 312 by K (314) allows for scaling the ten-bit resulting data 312 into compressed data 316.
  • the compressed data 316 is a set of ten-bit integers having values ranging from 0 to the product of K and 1020.
  • the compressed data 316 is compensated for degradations in the display hardware (318).
  • the compressed data 316 is compensated by adding additional data increments to the integers corresponding to the luminance of each pixel (318).
  • the compensation for degradation is performed according to degradation data 336 that is sent to the digital data processor block 306.
  • the degradation data 336 is digital data representing an amount of compensation to be applied to the compressed data 316 within the digital data processor block 306 according to degradations in the display hardware corresponding to each pixel.
  • compensated data 308 is output.
  • the compensated data 208 is a set of ten-bit integer values with possible values between 0 and 1023.
  • the compensated data 308 is similar in some respects to the digital data 108 output from the digital data processor 106 in FIG. 3 .
  • the compensated data 308 is supplied to a display driver, such as a display driver incorporating a digital to analog converter, to create programming voltages for pixels in the AMOLED display.
  • the degradations in the display hardware can be from mura defects (non-uniformities), from the OLED voltage drop, from the voltage threshold of the drive TFT, and from changes in the OLED light emitting efficiency.
  • the degradations in the display hardware each generally correspond to an additional increment of voltage that is applied to the pixel circuit in order to compensate for the degradations.
  • the increments of additional voltage necessary to compensate for the hardware degradations can be referred to as: V mura , V Th , V OLED , and V efficiency .
  • Each of the hardware degradations can be mapped to corresponding increments in data steps according to a function of V mura , V Th , V OLED , V efficiency , D(V mura , V Th , V OLED , V efficiency ).
  • V mura , V Th , V OLED , V efficiency int[(2 nBits - 1) (V mura + V Th + V OLED + V efficiency ) / V Max ]
  • nBits is the number of bits in the data set being compensated
  • V Max is the maximum programming voltage.
  • int[ ] is a function that evaluates the contents of the brackets and returns the nearest integer.
  • the degradation data 336 sent to the digital data processor block 306 can be digital data created according to the relationship for D(V mura , V Th , V OLED , V efficiency ) provided in Expression 1.
  • the degradation data 336 can be an array of digital data corresponding to an amount of compensation to be applied to the compressed data of each pixel in an AMOLED display.
  • the array of digital data is a set of offset increments that can be applied to the compressed data by adding the offset increments to the compressed data of each pixel or by subtracting the offset increments from the compressed data of each pixel.
  • the set of offset increments can generally be a set of digital data with entries corresponding to an amount of compensation needed to be applied to each pixel in the AMOLED display.
  • the amount of compensation can be the amount of increments in data steps needed to compensate for a degradation according to Expression 1.
  • locations in the array of the degradation data 336 can correspond to locations of pixels in the AMOLED display.
  • Table 1 below provides a numerical example of the compression of input data according to FIG. 13 .
  • Table 1 provides example values for a set of input data 304 following the multiplication by four (310) and the multiplication by K (314).
  • K has a value of 0.75.
  • the first column provides example values of integer numbers in the set of input data 304.
  • the second column provides example values of integer numbers in the set of resulting data 312 created by multiplying the corresponding input data values by four (310).
  • the third column provides example values of numbers in the set of compressed data 316 created by multiplying the corresponding values of the resulting data 312 by K, where K has an example value of 0.75.
  • the final column is the output voltage corresponding to the example compressed data 316 shown in the third column when no compensation is applied.
  • the final column is created for an example display system having a maximum programming voltage of 18 V.
  • the programming output voltage corresponding to the input data with the maximum input of two-hundred fifty-five is more than 4.5 V below the maximum voltage.
  • the 4.5 V can be considered the compensation budget of the display system, and can be referred to as the voltage headroom, V headroom .
  • the 4.5 V is used to provide compensation for degradation of pixels in the AMOLED display.
  • Table 1 Numerical Example of Input Data Compression Input Data Resulting Data ( ⁇ 4) Compressed Data ( ⁇ 0.75) Output Voltage (without degradation compensation) 255 1020 765 13.46 V 254 1016 762 13.40 V 253 1012 759 13.35 V ... ... ... ... 2 8 6 0.10 V 1 4 3 0.05 V 0 0 0 0.00 V
  • the amount of voltage available for providing compensation degradation is V headroom .
  • An amount of V headroom can be advantageously reserved to compensate for a degradation of a pixel in an AMOLED display with the most severe luminance degradation.
  • V mura , V Th , V OLED , and V efficiency can each be an array of values corresponding to the amount of additional voltage necessary to compensate the pixels in the display, and the entries in the arrays of values can correspond to individual pixels in the display. That is, V mura can be an array of voltages required to compensate display mura or non-uniform defects; V Th can be an array of voltage thresholds of drive TFTs of pixels in the display; V OLED can be an array of OLED voltages of the pixels in the display; and V efficiency can be an array of voltages required to compensate for OLED efficiency degradations of pixels in the display.
  • max[ ] is a function evaluating an array of values in the brackets and returning the maximum value in the array.
  • the choice of K affects the amount of V headroom available to compensate for degradations in the display. Choosing a lower value of K leads to a greater amount of V headroom .
  • the value of K can be advantageously decreased over time according to the degradation of the display over time. Decreasing K enables uniformity compensation across the display such that pixels receiving the same digital input data actually emit light with the same luminance, but the uniformity compensation comes at the cost of overall luminance reduction for the entire display.
  • FIGS. 14 through 17 provide methods for selecting and adjusting K.
  • FIG. 14 is a flowchart illustrating a method for selecting the compression factor according to display requirements and the design of the pixel circuit.
  • the display requirements and pixel circuit design of a display are analyzed to estimate maximum values of V mura , V Th , V OLED , and V efficiency for the pixels in the display (405).
  • the estimation (405) can be carried out based on, for example, empirical data from experimental results related to the aging of displays incorporating pixel circuits similar to the pixel circuit in the display 100.
  • the estimation (405) can be carried out based on numerical models or software-based simulation models of anticipated performances of the pixel circuit in the display 100.
  • the estimation (405) can also account for an additional safety margin of headroom voltage to account for statistically predictable variations amongst the pixel circuits in the display 100.
  • the required voltage headroom is calculated (410).
  • the required voltage headroom, V headroom is calculated according to Expression 2.
  • the compression factor, K is then set (420) for use in the compression and compensation algorithm, such as the compression algorithm illustrated in the data flow chart in FIG. 13 .
  • FIG. 15 is a flowchart illustrating a method for selecting the compression factor according to a pre-determined headroom adjustment profile.
  • a headroom adjustment profile is selected (505).
  • the first block 505 in the flowchart in FIG. 15 graphically illustrates three possible headroom adjustment profiles as profile 1, profile 2, and profile 3.
  • the profiles illustrated are graphs of K versus time.
  • the time axis can be, for example, a number of hours of usage of the display 100.
  • K decreases over time.
  • V headroom an additional amount of voltage
  • the example profiles in the first block 505 include profile 1, which maintains K at a constant level until a time threshold is reached and K decreases linearly with usage time thereafter.
  • Profile 2 is a stair step profile, which maintains K at a constant level for a time, and then decreases K to a lower value, when it is maintained until another time, at which point it is decreased again.
  • Profile 3 is a linear decrease profile, which provides for K to gradually decrease linearly with usage time.
  • the profile can be selected by a user profile setting according to a user's preferences for the compensation techniques employed over the life of the display. For example, a user may want to maintain an overall maximum luminance for the display for a specific amount of usage hours before dropping the luminance. Another user may be fine with gradually dropping the luminance from the beginning of the display's lifetime.
  • the display usage time is monitored (510).
  • the value of the compression factor, K is determined according to the usage time and selected profile (515).
  • the compression factor, K is then set (520), and the display usage time continues to be monitored (510).
  • K can be used in the compression and compensation algorithm, such as the compression algorithm illustrated in the data flow chart in FIG. 13 .
  • the method of setting and adjusting K shown in FIG. 15 is a dynamic method of setting and adjusting K, because the value of K is updated over time according to the usage time of the display 100.
  • K new K old / A - B, where K new is the new value of K, K old is the old value of K, and A and B are values set for applications and different technologies. For example, A and B can be set based on empirical results from experiments examining the characteristic degradation due to aging of pixel circuits similar to those used in the display 100 to drive OLEDs in each pixel.
  • the compression factor, K is then set (625) for use in the compression and compensation algorithm, such as the compression algorithm illustrated in the data flow chart in FIG. 13 .
  • Degradation measurements continue to be measured (605), ⁇ V headroom continues to be calculated (610), and K is updated according to Expression 6 whenever ⁇ V headroom exceeds V thresh (620).
  • the method of adjusting K shown in FIG. 16 is a dynamic method of adjusting K, because the value of K is updated over time according to degradation measurements gathered from the pixel circuits within the display 100.
  • the compression factor can be modified (620) according to Expression 3 based on the measured V headroom .
  • the value of K is maintained until a threshold event occurs (615), when K is modified (620).
  • Implementing the method provided in FIG. 16 for adjusting the compression factor, K can result in K being decreased over time according to a stair step profile.
  • FIG. 17 is a flowchart illustrating a method for selecting the compression factor according to dynamic measurements of degradation data exceeding a previously measured maximum. Measurements are taken from aspects of the pixel circuits of the pixels in the display 100 to measure V mura , V Th , V OLED , and V efficiency (605). The measurements of V mura , V Th , V OLED , and V efficiency are referred to as degradation measurements. The maximum values of the degradation measurements are selected (710). The maximum values of the degradation can be selected according to Expression 2. The combination of measuring the degradation measurements (605) and selecting the maximum values (710) provides for ascertaining the maximum compensation applied to pixels within the display. The maximum values are compared to previously measured maximum values of previously measured degradation measurements (715).
  • V headroom is calculated according to Expression 2 (410) based on the present degradation measurements.
  • the compression factor, K is determined according to Expression 3 (720).
  • the compression factor is set (725) and the maximum values are updated for comparison with new maximum values (715).
  • the compression factor is set (725) for use in the compression and compensation algorithm, such as the compression algorithm illustrated in the data flow chart in FIG. 13 . Similar to the method provided in FIG. 16 , the method shown illustrated by the flowchart in FIG. 17 is a dynamic method of adjusting K based on degradation measurements continually gathered from the pixel circuits within the display 100.
  • the present disclosure can be implemented by combining the above disclosed methods for setting and adjusting the compression factor, K, in order to create an adequate amount of voltage headroom that allows for compensation to be applied to the digital data before it is passed to the data driver IC.
  • a method of setting and adjusting K according to FIG. 16 or FIG. 17 can also incorporate a user selected profile as in FIG. 15 .
  • the methods of selecting and adjusting the compression factor, K, provided in FIGS. 14 through 17 can be used in conjunction with the digital data manipulations illustrated in FIG. 13 to operate a display while maintaining the uniform luminosity of the display.
  • the above described methods allow for maintaining the relative luminosity of a display by compensating for degradations to pixels within the display.
  • the above described methods allow for maintaining the luminosity of a pixel in a display array for a given digital input by compensating for degradations within the pixel's pixel circuit.
  • the present disclosure describes maintaining uniform luminosity of an AMOLED display, but the techniques presented are not so limited.
  • the disclosure is applicable to a range of systems incorporating arrays of devices having a characteristic stimulated responsive to a data input, and where the characteristic is sought to be maintained uniformly.
  • the present disclosure applies to sensor arrays, memory cells, and solid state light emitting diode displays.
  • the present disclosure provides for modifying the data input that stimulates the characteristic of interest in order to maintain uniformity.
  • the present disclosure for compressing and compensating digital luminosity data to maintain a luminosity of an AMOLED display is described as utilizing TFTs and OLEDs, the present disclosure applies to a similar apparatus having a display including an array of light emitting devices.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Claims (15)

  1. Procédé de compensation de la dégradation d'une pluralité de pixels (114) possédant chacun un circuit d'attaque destiné à générer du courant au travers d'un dispositif électroluminescent sur la base d'une entrée, le procédé comprenant :
    la réception de données de luminosité (104 ; 304) pour la pluralité de pixels (114),
    la mise à l'échelle des données de luminosité (104 ; 304) reçues en multipliant les données de luminosité reçues par un nombre pour obtenir des données résultantes présentant un nombre plus grand de bits et en multipliant les données résultantes par un facteur de compression présentant une valeur inférieure à un afin de créer des données compressées (316),
    l'application d'une compensation en ajoutant des incréments de données supplémentaires aux données compressées de sorte à créer des données compensées (108 ; 308), et
    la délivrance des données compensées (108 ; 308) aux circuits d'attaque de la pluralité de pixels (114), chaque circuit d'attaque étant configuré pour délivrer le courant d'attaque au travers du dispositif électroluminescent sur la base des données compensées (108 ; 308) reçues,
    caractérisé par
    l'exécution d'une mesure de la dégradation de la pluralité de pixels (114), et
    le réglage et l'ajustement dynamique du facteur de compression en fonction de la dégradation de la pluralité de pixels (114) afin de créer une valeur adéquate de marge de tension qui autorise l'application de la compensation,
    dans lequel les incréments de données supplémentaires sont fondés sur la dégradation de la pluralité de pixels (114) .
  2. Procédé selon la revendication 1, dans lequel le nombre est un entier constant.
  3. Procédé selon l'une quelconque des revendications 1 et 2, dans lequel le facteur de compression est en outre déterminé sur la base d'un profil sélectionné d'utilisateur et d'une durée d'utilisation du pixel (114), ou bien il est en outre déterminé sur la base d'une estimation de la dégradation du pixel (114) et sur une exigence d'affichage, et où l'estimation est fondée sur une conception d'aspects matériels du pixel (114) et du circuit d'attaque.
  4. Procédé selon l'une quelconque des revendications 1 à 3, comprenant en outre :
    l'établissement d'une compensation maximale appliquée à la pluralité de pixels (114), et
    l'ajustement du facteur de compression sur la base de la compensation maximale déterminée.
  5. Procédé selon la revendication 2, dans lequel les données de luminosité (104 ; 304) incluent des nombres entiers sur huit bits.
  6. Procédé selon l'une quelconque des revendications 1 à 5, dans lequel au moins un transistor à couches minces (116) est utilisé pour générer le courant au travers du dispositif électroluminescent, et où la dégradation est due à un seuil de tension du ou des transistors à couches minces (116) ou bien est due à une dérive du seuil de tension du ou des transistors à couches minces (116).
  7. Procédé selon l'une quelconque des revendications 1 à 6, dans lequel le dispositif électroluminescent est une diode électroluminescente organique (120), et où la dégradation est due à la tension de fonctionnement de la diode électroluminescente organique (120) ou bien est due à une dérive de la tension de fonctionnement de la diode électroluminescente organique (120).
  8. Procédé selon l'une quelconque des revendications 1 à 7, dans lequel la compensation de la dégradation est appliquée à une pluralité de pixels (114) dans un afficheur (100), le procédé comprenant en outre :
    la mise en oeuvre de l'afficheur (100) en fonction d'un premier facteur de compression :
    en recevant un premier ensemble de données de luminosité (104 ; 304) pour la pluralité de pixels (114),
    en mettant à l'échelle le premier ensemble de données de luminosité (104 ; 304) par le premier facteur de compression afin de créer un premier ensemble de données compressées (316),
    en compensant une première dégradation de la pluralité de pixels (114) en ajustant le premier ensemble de données compressées (316) sur la base d'un premier ensemble d'incréments de décalage afin de créer un premier ensemble de données compensées (108 ; 308), et
    en alimentant les circuits d'attaque avec le premier ensemble de données compensées (108 ; 308),
    la détermination d'un second facteur de compression fondé sur une seconde dégradation de la pluralité de pixels (114), et
    la mise en oeuvre de l'afficheur (100) en fonction du second facteur de compression :
    en recevant un second ensemble de données de luminosité (104 ; 304) pour la pluralité de pixels (114),
    en mettant à l'échelle le second ensemble de données de luminosité (104 ; 304) par le second facteur de compression afin de créer un second ensemble de données compressées (316),
    en compensant la seconde dégradation de la pluralité de pixels (114) en ajustant le second ensemble de données compressées (316) sur la base d'un second ensemble d'incréments de décalage afin de créer un second ensemble de données compensées (108 ; 308), et
    en alimentant les circuits d'attaque avec le second ensemble de données compensées (108 ; 308).
  9. Procédé selon la revendication 8, dans lequel l'ajustement du premier ensemble de données compressées (316) est réalisé en ajoutant le premier ensemble d'incréments de décalage au premier ensemble de données compressées (316) afin de créer le premier ensemble de données compensées (108 ; 308), et où l'ajustement du second ensemble de données compressées (316) est réalisé en ajoutant le second ensemble d'incréments de décalage au second ensemble de données compressées (316) afin de créer le second ensemble de données compensées (108 ; 308).
  10. Appareil de compensation de dégradation d'afficheur destiné à compenser la dégradation d'une pluralité de pixels (114) d'un afficheur (100), la pluralité de pixels (114) possédant des circuits d'attaque destinés à générer du courant au travers de dispositifs électroluminescents sur la base d'entrées, l'appareil de compensation de dégradation d'afficheur comprenant :
    un module processeur de données numériques (106 ; 306) conçu pour recevoir des données de luminosité (104 ; 304) pour les pixels (114), pour mettre à l'échelle les données de luminosité (104 ; 304) reçues afin de créer des données compressées, la mise à l'échelle étant réalisée en multipliant les données de luminosité par un nombre pour créer des données résultantes présentant un nombre plus grand de bits et en multipliant les données résultantes par un facteur de compression présentant une valeur inférieure à un afin de créer les données compressées (316), ainsi que pour appliquer une compensation en ajoutant des incréments de données supplémentaires aux données compressées de sorte à créer des données compensées (108 ; 308), et
    un circuit d'attaque d'afficheur conçu pour recevoir les données compensées (108 ; 308) et les délivrer aux entrées des circuits d'attaque des pixels (114),
    caractérisé en ce que
    l'appareil de compensation de dégradation d'afficheur comprend en outre un module de compensation (130) configuré pour effectuer une mesure de la dégradation de la pluralité de pixels (114) et pour régler et ajuster dynamiquement le facteur de compression en fonction de la dégradation de la pluralité de pixels (114) afin de créer une valeur adéquate de marge de tension qui autorise l'application de la compensation,
    dans lequel les incréments de données supplémentaires sont fondés sur la dégradation de la pluralité de pixels (114) .
  11. Appareil de compensation de dégradation d'afficheur selon la revendication 10, dans lequel le module processeur de données numériques (106 ; 306) inclut un additionneur numérique destiné à ajouter les incréments de données supplémentaires aux données compressées (316) afin de créer les données compensées (108 ; 308).
  12. Appareil de compensation de dégradation d'afficheur selon l'une quelconque des revendications 10 et 11, dans lequel le module de compensation (130) est configuré pour déterminer le facteur de compression conformément à une fonction incluant une mesure de la dégradation de la pluralité de pixels (114).
  13. Appareil de compensation de dégradation d'afficheur selon l'une quelconque des revendications 10 à 12, dans lequel le module de compensation (130) est configuré pour ajuster en outre dynamiquement le facteur de compression conformément à une entrée spécifiée par un utilisateur et conformément à la durée d'utilisation de l'afficheur (100), ou bien conformément à une fonction incluant une mesure de la dégradation de la pluralité de pixels (114).
  14. Appareil de compensation de dégradation d'afficheur selon l'une quelconque des revendications 10 à 13, dans lequel le module processeur de données numériques (106 ; 306) est configuré pour recevoir des données de luminance sur huit bits et pour délivrer en sortie des données compensées (108 ; 308) sur dix bits.
  15. Afficheur comprenant :
    un appareil de compensation de dégradation d'afficheur conforme à l'une quelconque des revendications 10 à 14, et
    une pluralité de pixels (114) incluant chacun un dispositif électroluminescent, au moins l'un des dispositifs électroluminescents étant une diode électroluminescente organique (120), ainsi que des circuits d'attaque destinés à générer des courants au travers des dispositifs électroluminescents sur la base d'entrées reçues en provenance de l'appareil de compensation de dégradation d'afficheur.
EP11189176.8A 2010-11-15 2011-11-15 Système et procédé pour compenser les non-uniformités dans des dispositifs d'affichage électroluminescents Active EP2453433B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/946,601 US20110199395A1 (en) 2005-04-12 2010-11-15 System and method for compensation of non-uniformities in light emitting device displays

Publications (3)

Publication Number Publication Date
EP2453433A2 EP2453433A2 (fr) 2012-05-16
EP2453433A3 EP2453433A3 (fr) 2014-06-18
EP2453433B1 true EP2453433B1 (fr) 2018-10-10

Family

ID=45023678

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11189176.8A Active EP2453433B1 (fr) 2010-11-15 2011-11-15 Système et procédé pour compenser les non-uniformités dans des dispositifs d'affichage électroluminescents

Country Status (2)

Country Link
EP (1) EP2453433B1 (fr)
CN (2) CN105845083B (fr)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101893128B1 (ko) 2009-10-21 2018-08-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 아날로그 회로 및 반도체 장치
KR102074719B1 (ko) 2013-10-08 2020-02-07 엘지디스플레이 주식회사 유기 발광 표시 장치
KR102223552B1 (ko) 2013-12-04 2021-03-04 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동 방법
US9741282B2 (en) * 2013-12-06 2017-08-22 Ignis Innovation Inc. OLED display system and method
CN103761933A (zh) * 2013-12-30 2014-04-30 深圳市华星光电技术有限公司 液晶显示面板的不良显示修复系统及修复方法
CN103985356B (zh) * 2014-05-26 2016-06-15 合肥工业大学 一种oled灰阶丢失补偿的方法
CN105225621B (zh) * 2014-06-25 2020-08-25 伊格尼斯创新公司 提取有机发光器件的相关曲线的系统和方法
KR102287907B1 (ko) * 2015-06-22 2021-08-10 삼성디스플레이 주식회사 유기 발광 다이오드 표시 장치의 열화 보상기
CN104978947B (zh) 2015-07-17 2018-06-05 京东方科技集团股份有限公司 显示状态的调节方法、显示状态调节装置及显示装置
CN105096834B (zh) * 2015-08-26 2017-05-17 京东方科技集团股份有限公司 一种有源矩阵有机发光二极管显示装置及其亮度补偿方法
CN109643438A (zh) 2016-10-06 2019-04-16 惠普发展公司，有限责任合伙企业 调节显示像素的操纵频率
KR102618389B1 (ko) * 2017-11-30 2023-12-27 엘지디스플레이 주식회사 전계 발광 표시장치와 그 구동 방법
CN108962110B (zh) * 2018-08-09 2021-04-27 京东方科技集团股份有限公司 获取液晶面板充电率的方法
CN111445844B (zh) * 2019-01-17 2021-09-21 奇景光电股份有限公司 累积亮度补偿系统与有机发光二极管显示器
CN109637499B (zh) * 2019-01-17 2021-08-31 硅谷数模半导体（北京）有限公司 显示面板亮度的控制方法及装置
CN111554236A (zh) * 2019-02-12 2020-08-18 陕西坤同半导体科技有限公司 有机发光二极体显示面板的老化补偿数据传输装置
CN109686306B (zh) * 2019-03-05 2020-12-01 京东方科技集团股份有限公司 补偿因子获取方法及装置、驱动方法、显示设备
CN110602496B (zh) * 2019-08-29 2022-05-31 Tcl华星光电技术有限公司 显示系统的压缩方法
US20210304673A1 (en) * 2020-03-31 2021-09-30 Apple Inc. Configurable pixel uniformity compensation for oled display non-uniformity compensation based on scaling factors
CN111462260B (zh) * 2020-04-26 2024-01-30 芯颖科技有限公司 显示面板的mura补偿方法、装置和电子设备
CN114783375B (zh) * 2022-03-31 2023-09-26 深圳市华星光电半导体显示技术有限公司 像素驱动电路、像素驱动方法和显示面板
CN114708828B (zh) * 2022-04-29 2023-05-30 深圳市华星光电半导体显示技术有限公司 像素电路及显示面板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006108277A1 (fr) * 2005-04-12 2006-10-19 Ignis Innovation Inc. Procédé et système permettant de compenser des non-uniformités dans des écrans à dispositifs électroluminescents

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4036142B2 (ja) * 2003-05-28 2008-01-23 セイコーエプソン株式会社 電気光学装置、電気光学装置の駆動方法および電子機器
US6989636B2 (en) * 2004-06-16 2006-01-24 Eastman Kodak Company Method and apparatus for uniformity and brightness correction in an OLED display
CA2541531C (fr) * 2005-04-12 2008-02-19 Ignis Innovation Inc. Methode et systeme pour compenser le manque d'uniformite dans les affichages del
KR20090058694A (ko) * 2007-12-05 2009-06-10 삼성전자주식회사 유기 발광 표시 장치의 구동 장치 및 구동 방법
US8217928B2 (en) * 2009-03-03 2012-07-10 Global Oled Technology Llc Electroluminescent subpixel compensated drive signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006108277A1 (fr) * 2005-04-12 2006-10-19 Ignis Innovation Inc. Procédé et système permettant de compenser des non-uniformités dans des écrans à dispositifs électroluminescents

Also Published As

Publication number Publication date
EP2453433A2 (fr) 2012-05-16
EP2453433A3 (fr) 2014-06-18
CN102663976A (zh) 2012-09-12
CN105845083B (zh) 2018-09-04
CN102663976B (zh) 2016-06-29
CN105845083A (zh) 2016-08-10

Similar Documents

Publication Publication Date Title
EP2453433B1 (fr) Système et procédé pour compenser les non-uniformités dans des dispositifs d'affichage électroluminescents
US10235933B2 (en) System and method for compensation of non-uniformities in light emitting device displays
US10699624B2 (en) Method and system for programming, calibrating and/or compensating, and driving an LED display
US20130286055A1 (en) System and method for compensation of non-uniformities in light emitting device displays
CA2541531C (fr) Methode et systeme pour compenser le manque d'uniformite dans les affichages del
US10012678B2 (en) Method and system for programming, calibrating and/or compensating, and driving an LED display
CN108369792B (zh) 显示装置及其驱动方法
CN106030690B (zh) 发光器件显示装置非均匀性的补偿方法及系统
US11410614B2 (en) System and method for loading image correction data for displays
EP2404292B1 (fr) Signal de commande compensé pour sous-pixel électroluminescent
JP5416229B2 (ja) エレクトロルミネッセントディスプレイ補償済み駆動信号
US8077123B2 (en) Emission control in aged active matrix OLED display using voltage ratio or current ratio with temperature compensation
US11270621B2 (en) Method and system for programming, calibrating and/or compensating, and driving an LED display
US20230136688A1 (en) High efficiency stress history modelling and compensation
JP2015106096A (ja) 表示装置及びその補償データ算出方法及びその駆動方法
KR20150064481A (ko) 표시장치의 휘도 편차 보상장치 및 보상방법
JP2015106082A (ja) 表示装置及びその補償データ算出方法及びその駆動方法

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: IGNIS INNOVATION INC.

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RIC1 Information provided on ipc code assigned before grant

Ipc: G09G 3/32 20060101AFI20140509BHEP

17P Request for examination filed

Effective date: 20141218

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

17Q First examination report despatched

Effective date: 20150720

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20180509

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

Ref country code: AT

Ref legal event code: REF

Ref document number: 1052170

Country of ref document: AT

Kind code of ref document: T

Effective date: 20181015

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602011052728

Country of ref document: DE

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20181010

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1052170

Country of ref document: AT

Kind code of ref document: T

Effective date: 20181010

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190110

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190110

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190210

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190111

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190210

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602011052728

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181115

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20181130

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181130

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181130

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

26N No opposition filed

Effective date: 20190711

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20190110

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181115

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181210

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190110

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181115

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20111115

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20181010

Ref country code: MK

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20181010

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 602011052728

Country of ref document: DE

Owner name: IGNIS INNOVATION INC., VG

Free format text: FORMER OWNER: IGNIS INNOVATION INC., WATERLOO, ONTARIO, CA

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20231129

Year of fee payment: 13