EP2315505A1 - Procédé de contrôle d'un circuit à demi-pont, et circuit à demi-pont commandé avec celui-ci - Google Patents

Procédé de contrôle d'un circuit à demi-pont, et circuit à demi-pont commandé avec celui-ci Download PDF

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Publication number
EP2315505A1
EP2315505A1 EP09173168A EP09173168A EP2315505A1 EP 2315505 A1 EP2315505 A1 EP 2315505A1 EP 09173168 A EP09173168 A EP 09173168A EP 09173168 A EP09173168 A EP 09173168A EP 2315505 A1 EP2315505 A1 EP 2315505A1
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EP
European Patent Office
Prior art keywords
voltage
bridge
frequency period
mean square
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09173168A
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German (de)
English (en)
Inventor
Arjan Van Den Berg
Wilhelmus Hinderlikus Maria Langeslag
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NXP BV
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NXP BV
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Publication date
Application filed by NXP BV filed Critical NXP BV
Priority to EP09173168A priority Critical patent/EP2315505A1/fr
Publication of EP2315505A1 publication Critical patent/EP2315505A1/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/295—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices and specially adapted for lamps with preheating electrodes, e.g. for fluorescent lamps
    • H05B41/298—Arrangements for protecting lamps or circuits against abnormal operating conditions
    • H05B41/2981—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions
    • H05B41/2983—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions against abnormal power supply conditions

Definitions

  • This invention relates to methods of controlling half-bridge circuits, and to half-bridge circuits controlled thereby.
  • Switched power supplies comprising a half-bridge circuit are used in many applications, and one particularly interesting field is that of lamps such as compact fluorescent lamps (CFLs).
  • compact fluorescent lamps Relative to mains voltages, compact fluorescent lamps typically operate at different voltages, and a high-frequency switched mode circuit such as a half-bridge circuit, operating at typically several tens of kilohertz, provides a convenient means for matching CFLs to a mains supply.
  • CFLs typically operate at elevated temperatures, typically up to 150°C: variation in the power dissipated in the half-bridge power transistors can result in variation or fluctuation in the operating temperature as a result of which it is necessary to specify the power transistors for even higher temperatures.
  • the power dissipated in the transistors varies with the square of the operating voltage, rather than linearly. Thus a 15% increase in the mains voltage could result in a 32% dissipation increase, such that the power transistor would have to be 32% bigger to withstand the variation. This leads to increased costs which is undesirable commercially, and in the case where power transistors are integrated into a controller IC the problem is particularly acute, since integrated power transistors can typically dominate the cost of such a controller IC,
  • feed-forward control In order to reduce or eliminate the variation in power dissipation with mains voltage variation, it is known to provide feed-forward control: here, the mains voltage is measured, and the oscillating frequency of the half-bridge is adjusted. In this way, a first order compensation can be established, by scaling the operating frequency linearly with mains voltage above a certain threshold voltage value. However, a mains voltage dependency still remains. Moreover, such compensation is different for different types of CFL applications. Furthermore, feed-forward control requires additional components to sense the mains voltage.
  • a method of controlling a half-bridge circuit for a lamp such as a compact fluorescent lamp, which circuit switches with a high-frequency period comprising, not necessarily in sequence: determining a half-bridge current; determining a mean square value from the determined half-bridge current over a first part the high-frequency period; determining a reference signal, and adjusting the high-frequency period in dependence on the difference between the mean square value and the reference signal.
  • the step of adjusting the high-frequency period in dependence on the difference between the mean square value and the reference signal comprises adjusting the high-frequency period in proportion to the difference between the mean square value and the reference signal.
  • the half-bridge current is determined by measuring a voltage across a sense resistor connected in series with the half-bridge. Such a measurement is particularly convenient and avoids the need for additional components.
  • the step of determining a mean square value from the determined half-bridge current over a first part the high-frequency period comprises deriving a current from the square of the determined half-bridge current, and a first one of charging and discharging a capacitor with the derived current over the first part the high-frequency period.
  • the step of determining a reference signal comprises sensing a reference voltage, and determining a further mean square value from the sensed reference voltage over a second part of the high-frequency period.
  • the step of determining a further mean square value from the sensed reference voltage over a second part of the high-frequency period comprises deriving a further current from the square of the sensed reference voltage, and the other one of charging and discharging the capacitor with the further current over the second part of the high-frequency period.
  • the step of adjusting the high-frequency period in dependence on the difference between the mean square value and the reference signal comprises determining a voltage across the capacitor, using the voltage so determined as a control input to a voltage controlled oscillator, and using the output of the voltage controlled oscillator to set the high-frequency period.
  • the voltage across the capacitor is determined at the end of the second part of the high-frequency period.
  • the controller comprises a high-side switch and a low-side switch which are respectively in an on-state only during the first and third intervals of the high-frequency period, the first part of the high-frequency period consists of the second and third intervals, and the second part of the high-frequency period consists of the fourth and first intervals.
  • the total duration of the first and second intervals is equal to the total duration of the third and fourth intervals.
  • the controller operates at 50% duty cycle.
  • a half-bridge circuit configured to operate according to any of the above methods and there may be provided a power supply for a fluorescent lamp comprising such a half-bridge circuit, of a fluorescent lamp comprising such a power supply.
  • an integrated circuit configured to drive a half-bridge circuit operating according to any of the above methods.
  • FIG 1 there is shown a schematic of a CFL lamp assembly arrangement.
  • a lamp 10 which in this case is a fluorescent lamp and may be a CFL, has a capacitor Clamp connected across its electrodes.
  • One end electrode is connected between a rectified mains supply and ground by means of respective capacitors C HB1 and C HB2 .
  • the other electrode is connected, via a series ballast which in this case is an inductor L lamp , to the half-bridge node HB of a half-bridge circuit.
  • the half-bridge circuit comprises two power transistors: a first, high side, power transistor HS is connected between the half-bridge node and the rectified mains voltage; the other, low side, power transistor LS is connected between the half-bridge node and ground PGND, via a sense a resistor Rsense 50. The node between the low side power transistor and the sense resister is designated 'sense'.
  • the high side power transistor HS and low side power transistor LS are driven by respective high side driver 12 and low side driver 14.
  • a clock signal CLK to control the timing of drivers 12 and 14 is generated by a voltage controlled oscillator (VCO) 16.
  • VCO voltage controlled oscillator
  • the clock signal is directed to the low side driver 14 via a non-overlap circuit 18 which outputs a signal Lson to the low side driver 14 and a signal HSon to a pulse generator 20, and thence via a latch 22 to the high side driver 12.
  • the control unit has as one input the voltage at the sense node 'sense' , and as another input a reference voltage Vref 54.
  • RMS current control unit 52 outputs a current which is switchably connected to a capacitor Csw.
  • the capacitor is also connected to the VCO 16.
  • the output current of the RMS control block is determined by Vsense.
  • the output current (which is then in an opposite direction) is determined by Vref.
  • the switching element is integral within the RMS control block. It should be noted that, advantageously, any offset in the RMS block is thereby cancelled as both the Vsense signal as the Vref goes through this block and offset is automatically substracted.
  • switches HS and LS are alternately closed by means of drivers 14 and 12 respectively.
  • Non-overlap circuit 18, in conjunction with pulse generator 20 and latch 22, ensures that the switches are never both closed at the same time.
  • the high-frequency period comprises a first interval, during which only the HS switch is on; a second interval, being a non-overlap interval during which neither switch is on; a third interval, during which only the LS switch is on; and a fourth interval, being another non-overlap interval during which neither switch is on.
  • the switching frequency is held constant under the control of the VCO 16.
  • the power dissipation can be reduced by decreasing the operating frequency of the half-bridge circuit. This is because the operating current is set by the input voltage and the impedance of the inductor. The latter is 2* ⁇ *f*L. Thus a higher frequency f will result in a larger impedance of the inductor and in a lower inductor and power switch current. However due to the presence of a frequency clamp and the lamp resistance itself, the overall frequency dependency is more complex and not linear with the frequency.
  • the mains voltage is sensed, and supplied as an input to the VCO. If the mains voltage exceeds a threshold value, the VCO is used to increase the frequency of the half-bridge circuit, in proportion to the sense the voltage.
  • a current derived from the mains voltage is sensed and used to control a current controlled oscillator (CCO) rather than a VCO.
  • CCO current controlled oscillator
  • Figure 2 shows a graph of such a control mechanism. At relatively lower values of the mains voltage Vm the half-bridge switching frequency is fixed at a value fb; beyond the threshold voltage, the frequency increases linearly with the voltage.
  • frequency control is provided by means of the RMS control unit 52, as will now be described with reference to Figure 3 , which shows part of the assembly of Figure 1 , and in particular the controller:
  • the output current for the lamp flows through the closed LS transistor.
  • the current is sensed by measuring the voltage across the sense resister 50, which is in series with the LS transistor.
  • this voltage is squared and converted to a current: various arrangement to carry this out will be familiar to the skilled person: for example a translinear loop can be used to provide a squaring function. However since this function is in the current domain, first an internal voltage-to-current converter is used to convert the Vsense voltage to a proportional current.
  • the current (for example the output current of the translinear loop) is used to charge the capacitor Csw which also acts as the VCO input capacitor, and thus at the end of the first part of the HF period the capacitor Csw stores a charge which is representative of the integral of the square of the instantaneous voltage across the sense resistor and thus the half-bridge current.
  • the capacitor value is very large compared to the charge and discharge current i.e. a difference in charge / discharge current over one HF cycle will result in only a very minor voltage increase / decrease. So the averaging function is spread out over multiple HF cycles. Thus, advantageously, no sample-and-hold circuit is needed.
  • the invention is not limited to this implementation, and in other embodiments, a sample-and-hold circuit can be used in place of the large capacitor.
  • the capacitor is charged during the first part of the high frequency period, and discharged during the second part. It will be immediately apparent that the converse arrangement, during which the capacitor is discharged during the first part and charged during the second part of the high frequency period, is also within the scope the invention.
  • the lamp power level can be shown to be dependent on the RMS value of the current, and thus the value of the charge stored in the integrating capacitor Csw.
  • the frequency of the HF period is adjusted to maintain this at a constant level.
  • a reference charge is subtracted from the integrating capacitor, and the difference used as an output to adjust the frequency by means of the voltage controlled oscillator.
  • the first part of the high frequency period concludes at the end of the non-overlap period, or in other words, at the moment when the HS switch is closed.
  • the first part of the high frequency period consists of the second and third intervals discussed above.
  • a reference voltage of Vref 54 is input to the RMS control unit 52.
  • the reference voltage is squared and converted into a current by the RMS control unit 52, and the result used to discharge the integrating capacitor Csw.
  • the residual charge in the integrating capacitor Csw thus corresponds to a perturbation of the voltage across sense resistor sense, assuming, for the present, a 50% duty cycle of the LS transistor. This perturbation is fed as the differential signal to the VCO 16, and used to adjust the frequency of the HS period.
  • equation 5 no longer directly follows from equation 4; the simplicity of equation 5 results in 50% duty cycle being a preferred embodiment; however, the invention is not limited thereto, since, with other duty cycles, a similar relationship (albeit with more complex scaling), holds between Ila rms and V ref .
  • the power in the lamp is dependant on the burner current: since the lamp can be considered as a resistive load, higher current means quadratically more lamp power, and the power dissipated in the half-bridge transistors is similarly dependant on the RMS of the half-bridge current.
  • the burner current (and the half-bridge current) constant as described above, both the power in the lamp and that dissipated in the half-bridge power transistors are maintained constant independent of changes in the mains voltage
  • the half-bridge RMS current is constant as this means a constant IC temperature independent of the mains voltage.
  • an advantageous secondary effect is that the RMS lamp current is also nearly constant, as a result of which the observer experiences no variation in illumination when the mains voltage changes.
  • the embodiment above has been described in relation to a half-bridge control circuit for a CFL.
  • the invention is not so limited, and is equally applicable to other types of lamps such as cold cathode fluorescent lamps or conventional fluorescent lamps.
  • the invention extends to other low impedance applications which may be driven from a half-bridge circuit, such as inductive motor drives, half bridge power supplies / adapters.
  • high frequency takes its normal meaning, as will be immediately apparent to the skilled person. That is to say, “high frequency” means a frequency which is high in relation to any normal mains frequency including 50, 60 and 110 Hz. In particular, “high frequency” encompasses frequencies in the kilohertz (that is, ⁇ 1,000Hz), and the megahertsz (that is, ⁇ 1,000,000 Hz) ranges.
  • a method of controlling a half-bridge circuit in particular for use with lamps such as compact fluorescent lamps, has been disclosed.
  • the method is particularly useful for preventing excess power dissipation in the half-bridge transistors under mains over-voltage supply conditions.
  • conventional methods rely on adjusting the switching frequency in response to the - measured - input voltage
  • the method disclosed herein relies on measurement of the mean square voltage of the half-bridge node. By controlling the switching frequency to maintain a constant mean square half-bridge voltage, the power dissipated by the half-bridge transistors is held constant independent of variations in mains input voltage.
  • control is effected by charging a capacitor with a current corresponding to the instantaneous square of the half-bridge node voltage, and then discharging it with a current corresponding to the instantaneous square of the reference voltage.
  • the voltage across residual charge is used to control a voltage-controlled oscillator, to modify the half-bridge switching frequency and maintain the mean square value.

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  • Circuit Arrangements For Discharge Lamps (AREA)
EP09173168A 2009-10-15 2009-10-15 Procédé de contrôle d'un circuit à demi-pont, et circuit à demi-pont commandé avec celui-ci Withdrawn EP2315505A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP09173168A EP2315505A1 (fr) 2009-10-15 2009-10-15 Procédé de contrôle d'un circuit à demi-pont, et circuit à demi-pont commandé avec celui-ci

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EP09173168A EP2315505A1 (fr) 2009-10-15 2009-10-15 Procédé de contrôle d'un circuit à demi-pont, et circuit à demi-pont commandé avec celui-ci

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996038024A1 (fr) * 1995-05-26 1996-11-28 Jon Paul Ballast electronique de haute efficacite
WO2002063756A1 (fr) * 2001-02-05 2002-08-15 Joon-Ho Park Appareil de commutation electrique et regulateur electronique
US6930454B2 (en) * 2002-11-28 2005-08-16 Patent Treuhand Gesellschaft Fur Elektrische Gluhlampen Mbh Method for operating at least one low-pressure discharge lamp and operating device for at least one low-pressure discharge lamp
KR20080040258A (ko) * 2006-11-02 2008-05-08 주식회사 디엠비테크놀로지 소비전력 제어를 이용한 방전관 제어 장치

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996038024A1 (fr) * 1995-05-26 1996-11-28 Jon Paul Ballast electronique de haute efficacite
WO2002063756A1 (fr) * 2001-02-05 2002-08-15 Joon-Ho Park Appareil de commutation electrique et regulateur electronique
US6930454B2 (en) * 2002-11-28 2005-08-16 Patent Treuhand Gesellschaft Fur Elektrische Gluhlampen Mbh Method for operating at least one low-pressure discharge lamp and operating device for at least one low-pressure discharge lamp
KR20080040258A (ko) * 2006-11-02 2008-05-08 주식회사 디엠비테크놀로지 소비전력 제어를 이용한 방전관 제어 장치

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