GB2338358A

GB2338358A - High intensity discharge lamp ballast

Info

Publication number: GB2338358A
Application number: GB9904913A
Authority: GB
Inventors: Simon Richard Greenwood; Stephen Soar
Original assignee: SIMSOARICA Ltd
Current assignee: SIMSOARICA Ltd
Priority date: 1998-06-13
Filing date: 1999-03-03
Publication date: 1999-12-15
Anticipated expiration: 2019-03-03
Also published as: GB9904913D0; DE69941762D1; GB2338358B; GB9812703D0; ES2338953T3

Abstract

In a ballast inverter for an HID lamp 19, alternately conducting MOSFETs 9, 10 initially operate at a relatively high frequency (> 20KHz) so that an L-C circuit 17, 18 is driven at its resonant frequency, or at a harmonic, and develops sufficient voltage to start the lamp 19. After a predetermined time, MOSFETs 9, 10 switch at a lower frequency (< 1KHz) for normal operation during which the lamp current approximates a square wave AC with high frequency ripple (Fig.3) due to the action of a current limiter formed by a comparator 5 which compares the output from a lamp current sensing transformer 20 with a reference. The drive 6 for MOSFETs 9, 10 is repeatedly disabled and enabled as the lamp current rises above and falls below the reference level. Additional MOSFETs (28, 29, Fig.6) may be incorporated to form a full bridge inverter, MOSFETs (28,29) not being subject to the action of the current limiter 5, 20. Instead of MOSFETs 9, 10 being in series with one another across the DC supply, they may be connected across the DC supply in series with respective diodes, each MOSFET 9, 10 being coupled to end B of lamp 19 through a respective inductor 17, (17R, Fig.4). A constant DC supply voltage may be provided by a power factor controlling circuit (Fig.7). Variations in the DC voltage supply current may be sensed by a circuit (46, 51) which varies the reference at comparator 5 so that if the lamp arc voltage, and thus the lamp power, changes due to ageing or temperature, the comparator's reference is varied in a manner to maintain constant power. The DC supply current sensor (46, 51) may be connected to a shutdown circuit (Fig. 8) which turns off lamp current in response to excessive lamp arc voltage due to an ageing or faulty lamp.

Description

2338358 TITLE High intensity discharge lamp ballast

DESCRIPTION Technical field

This invention relates to a power control circuit which is particularly, thoug not ljh exclusively, suited to the ballasting of low and high pressure sodium, mercury arc and metal halide discharge lamps (high intensity discharge lamps or ED lamps). Typically such systems can be used for highway lighting, architectural floodlighting, warehouse and industrial lighting etc.

Backa-round of the invention Traditionally, ballasting for ED lamps is by use of inductors or chokes capable of controlling the lamp current through the impedance they present in series with the mains supply voltage. With some types of ED lamp a high striking voltage, typically 4- 5 kV, is required to ionize the gas filling the tube and initiate the arc.

In prior art systems for ballasting HID lamps, the lamp ballasting means and the lamp striking means are typically discrete circuit elements. Historically, HED lamps have been ballasted by using the impedance of a series connected inductor for controlling the lamp current and a separate starter or igniter module to provide the necessary high voltage to strike the lamp.

Fig. 1 illustrates a typical arrangement for prior art electronic ballasts for HID lamps. A conventional power factor controller is formed by transistor TR1, inductor Ll, diode D1 and capacitor Cl. Alternating positive and negative output voltage is provided to the lamp by a full bridge arrangement comprising four transistors TR3JR4JR5JR6. The transistors are alternately switched on and off in complementary pairs TR3JR6 25 and TR4JR5 at a low frequency, typically 100-200 Hz.

Connected in series with the lamp across the bridge is an igniter circuit comprising pulse transformer TX l, a Sidac, capacitor C3 and resistor RI. When the igniter circuit operates, the capacitor C3 charges through resistor R1 to a voltage at which the Sidac device switches on, discharging the capacitor C3 into the primary winding of the transformer TX1. The voltage applied to the transformer primary is multiplied by the high turns ratio of the transformer and is sufficient to ionize the gas filling the lamp's arc tube, thereby initiating an arc.

Since the voltage is AC, the arc will be extinguished when the lamp current approaches zero and the voltage applied to the tube is subsequently reversed. Therefore the igniter must operate again in the opposite voltage half cycle to re-strike the arc for the flow of current in the opposite direction. This ignition cycle is repeated until the lamp electrodes are sufficiently heated by the arc current for thermionic emission to take place. Then the arc voltage in the tube falls below the threshold voltage of the Sidac :D ZP and arc current is maintained without operation of the igniter circuit.

A further transistor TR2 controls the flow of current in the output bridge circuit and consequently controls the lamp current. Transistor TR2 is turned on until the current in inductor L2 reaches a preset threshold value, then the transistor TR2 is turned off.

Current continues to flow via a diode D2 until the current has decayed to another preset threshold value, then the transistor TR2 is turned on again.

1 Because of the high rate of rise of voltage, the capacitance and inductance of the wiring to the lamp act to attenuate the high voltage ignition pulse to the lamp, so limiting the practical length of the wiring between the igniter circuit and the lamp.

In recent years it has become known to use high frequency ( > 20 kHz) electronic ballasts to supply lamp current for fluorescent lamp installations, giving longer tube life due to lower tube current crest factor and higher overall efficiencies due to reduced power losses in the ballast and tube. Attempts have been made to design high frequency electronic ballasts for HED lamps with some level of success but these are fraught with problems due mainly to the predisposition of many FED lamps to acoustic arc resonance when operated at frequencies substantially above line frequency. It is in some cases possible to design high frequency ballasts specifically for one type and size of ED tube if the operating frequency of the ballast is chosen carefully but if the gas pressure in the tube changes substantially during the life of the tube the resonance characteristics will also change and could cause catastrophic failure of the arc tube. This will be at best alarming and could be dangerous if the arc tube fragments are not sufficiently contained within the lamp fitting (luminaire).

Z Summary of the inventio

The invention provides a high intensity discharge lamp ballast circuit comprising: a hiah intensity discharge lamp connected between a first lamp terminal and a second lamp terminal; a resonant circuit, to which the first lamp terminal is connected; first switching means operable to connect the resonant circuit to a positive rail of a source of high voltage; second switching means operable to connect the resonant circuit to a negative rail of the source of high voltage; control means for alternately operating the first and second switching means to supply current to the resonant circuit, the alternation occurring in a first mode at a first switching frequency that causes the resonant circuit to resonate and in a second mode at a second switching frequency that does not cause the resonant circuit to resonate; and current limiting means for limiting the electrical current through the lamp.

By operating in two modes, respectively at high and low frequency, the invention overcomes many of the problems associated with prior art EM lamp ballasts. The first, high frequency mode is operated at typically greater than 20 kHz while the lamp is cold and uses resonance to cause the lamp to strike. Once the lamp has warmed up sufficiently for thermionic emission from the lamp electrodes, the second mode of operation may be employed at typically less than 1 kHZ and the lamp arc will be maintained. Because resonance in the first mode of operation is used to provide sufficient voltage to strike the lamp, there is no requirement for a separate igniter circuit and consequently the expense of components such as the Sidac can be avoided.

Preferably, a first return capacitor is connected between the second lamp terminal and the positive high voltage rail and a second return capacitor is connected between the second lamp terminal and the negative high voltage rail. Because the lamp voltage is boosted by resonance in the first mode of operation and because a comparatively low lamp voltage is required to maintain the arc in the second mode of operation, it is possible to run the lamp according to the invention using only half the voltage from the split high voltage supply. Thus a full transistor bridge circuit is not necessary and return capacitors may replace two of the transistors, with consequent cost savings.

c In a preferred embodiment of the invention, the current limiting means comprises sensing means for measuring the current through the lamp; means for representing the measured current as a voltage signal; means for comparing the voltage signal with a reference voltage; and means for disabling the operation of the first and second switching means by the control means if the compared voltage signal is greater than the reference voltage. By effecting current limiting through disabling operation of the first and second switching means, the need for a separate current control transistor (such as transistor TR2 in Fig. 1) is avoided.

Thus, the present invention makes possible control of the necessary lamp striking voltage, the warm-up current and the steady state running current using only two power switching transistors operating in two discrete modes, which represents a significant saving of components compared with the prior art.

A further preferred feature of the present invention provides a lamp power control means, comprising: a power factor controller for receiving input from an external power source and for supplying a stable voltage to the positive and negative high voltage rails; means for sensing the value of the current flowinc, in the hiah and low voltage rails; and means for changing the reference voltage of the current limiting means in response to deviations from a set value of the current flowing in the high and low voitaae rails, so as to maintain constant lamp power. Shutdown means may also be provided for turning off current to the lamp if the reference voltage of the current limiting means passes a predetermined threshold.

In addition, the invention provides a method of powering a lamp via a lamp ballast circuit as previously defined, the method comprising the steps of: in the first mode operating the first and second switching means alternately at the first frequency, thereby causing the resonant circuit to resonate and generating sufficient voltage between the first and second lamp terminals to cause the lamp to strike; and subsequently in the second mode operating the first and second switching means alternately at the second frequency, whereby the resonant circuit does not resonate but the lamp continues to conduct, the second frequency being lower than the first frequency. Preferably, the change in operation from the first mode to the second mode occurs after a predetermined time, chosen to allow the lamp to warm up sufficiently for thermionic emission from the lamp electrodes.

The drawings Fig. 1 illustrates a lamp ballast circuit according to the prior art.

Fig. 2 illustrates a lamp ballast circuit according to a first preferred embodiment of the invention.

Fia. 3 illustrates schematically a typical lamp current waveform in accordance with the W invention.

Fig. 4 illustrates a lamp ballast circuit according to a second preferred embodiment of the invention.

Fig. 5 illustrates a lamp ballast circuit according to a third preferred embodiment of the invention.

Fig. 6 illustrates a first extension of the lamp ballast circuit of the invention.

Fia" 7 illustrates a second extension of the lamp ballast circuit of the invention.

Fia>. 8 illustrates a third extension of the lamp ballast circuit of the invention.

Description of preferred embodiments

Fc, ill 1.1. 2 shows a first embodiment of the invention in which the operation of the circuit is characterised by two discrete modes.

A frequency control circuit (not shown) controls the output frequency of oscillator 1, which outputs a square wave. The output of the oscillator 1 is split, one half being passed through an inverter 2, to create two complementary outputs in anti- phase with each other. These anti-phase outputs are connected to the inputs of two dual input AND gates 3 and 4, the other inputs of the two AND gates being connected to the output of a voltage comparator 5. The outputs of the two AND gates 3,4 are connected to a MOS gate driver IC 6, which drives a pair of MOSFETs 9, 10 via gate drive resistors 11, 12. The MOS gate driver IC 6 is provided with means of isolation which allows the gate of the "high side" MOSFET 9 to be driven at a voltage referenced to the source connection of the MOSFET. Each MOSFET 9, 10 is provided with a series connected Schottky diode 13,14 and an anti-parallel connected fast recovery diode 15,16. The Schottky diodes 13,14 prevent any flow of reactive currents in the output circuit from circulating via the inherently slow recovery body diodes in the MOSFETs 9, 10 and force reactive currents to flow instead in the fast recovery diodes 15,16.

Switching node A is connected to one terminal of inductor 17 and the other terminal is connected via node B to a capacitor 18 and to the lamp 19. The capacitor 18 is connected to node C. The lamp 19 is returned to node C via the primary winding of current transformer 20. Node C provides a current return path for capacitor 18 and lamp 19 via capacitors 21,22 to the +HT and OV rails.

In the first mode of operation, the frequency control circuit sets the oscillator frequency to typically several tens of kilohertz. The output of voltage comparator 5 (node F) is a logic 1 so the anti-phase complementary outputs from oscillator 1 and inverter 2 are "passed" by AND gates 3 and 4, driving the inputs of the MOS gate driver IC 6, which in turn drives the gates of the MOSFETs 9 and 10. Thus, through the alternate switching of the two MOSFETs on and off in opposition, the voltage at node A is switched alternately and substantially between the voltage of the +HT rail and the voltage of the OV rail.

The switching frequency and the values of the inductor 17 and capacitor 18 are chosen such that the L C resonant circuit formed by these components is stimulated at the fundamental resonant frequency of the components or a harmonic thereof. Thus voltage multiplication occurs at node B owing, to the Q factor of the resonant components 17 and 18. The resonant components are designed with sufficient Q factor to provide a voltage capable of ionising the gas filling the arc tube of lamp 19, thus initiating an arc at the lamp electrodes. This arc is sustained by current flowing via the primary winding of current transformer 20 and node C to the capacitors 21 and 22, which allow the current to return to the +HT and OV rails. The arc impedance is sufficiently low to divert most of the current flowing in inductor 17 away from capacitor 18 and via the lamp 19. Should the arc extinguish for any reason it will re-establish due to voltage multiplication in the resonant circuit. Any rectification effect in the lamp 19 or variance in the duty cycle of the switching of MOSFETs 9, 10 from the ideal 50:50 duty cycle is accommodated by offsetting the voltage at node C, thus ensuring that the lamp current has no DC element and is substantially high frequency AC.

Lamp current is transformed by the turns ratio of the current sensing transformer 20, rectified by rectifier 23 and converted to a positive voltage proportional to lamp current across resistor 24. This voltage appears at node D and is referenced to the OV rail.

Node D is connected to the inverting input of voltage comparator 5. The voltage at node D is compared with a voltage set by a potential divider (resistors 25 and 26), the mid point of which (node E) is connected to the non-inverting input of voltage comparator 5. Should the lamp current proportional voltaae at node D exceed the voltage set by the potential divider at node E the output (node F) of the voltage comparator 5 is switched to a logic 0 state. Since node F is connected to the inputs of the AND gates 3 and 4, both outputs from the AND gates are then forced to a logic 0 level irrespective of the logic states of the other inputs to the AND gates set by the outputs of the oscillator 1 and the inverter 2. Thus whichever NIOSFET 9 or 10 was conducting and sourcing current into the lamp circuit is switched to a non-conducting state and reactive current flowing in the inductor 17 is circulated via the opposite fast recovery diode 16 or 15. When the current value decays sufficiently to reduce the lamp current proportional voltage at node D to a voltage below that set at node E, the voltage comparator output node F returns to a logic 1 state allowing the AND gates 3 1 and 4 to "pass" the relevant logic states set on their other inputs and thus to switch the relevant MOSFET 9, 10 to a conducting state.

A resistor 27 provides a determined level of positive feedback or "hysteresis" that ensures that the current limiting described above operates between two determined current values and that the switching due to the current limiting circuit is limited to a frequency low enough to ensure that the switching losses associated with the current limit controlled switching of the MOSFETs 9, 10 are maintained at reasonable levels.

Typically, although not exclusively, the lamp current in the first mode of operation is insufficiently high to trigger operation of the current limit circuit. The circuit operates in this first mode until the lamp electrodes are sufficiently heated to establish thermionic emission. The circuit is then switched to the second of the two discrete modes of operation.

In the second mode of operation, the frequency control circuit sets the oscillator 1 to a second, lower frequency, typically though not exclusively several tens or hundreds of hertz. Since thermionic emission is already established in the lamp by the heating of the electrodes in the first mode of operation, the voltage available at the lamp terminals in this second (non-resonant) mode of operation is sufficient to maintain the arc at the lamp electrodes. The output of voltage comparator 5 (node F) is a logic 1 so the anti-phase complementary outputs from oscillator 1 and inverter 2 are "passed" by AND gates 3 and 4, driving the inputs of the MOS gate driver IC 6, which in rum drives the eates of the MOSFETs 9,10. Thus, through the alternate switching of the two MOSFETs 9,10 on and off in opposition, the voltage at node A is switched alternately and substantially between the voltage of the +HT rail and the voltage of the OV rail. The lamp arc is sustained by current flowing via the primary winding of current transformer 20 and node C to the capacitors 21 and 22, which allow the current to return to the +HT and OV rails. The arc impedance is sufficiently low to divert most of the current flowing in inductor 17 away from capacitor 18 and via the lamp 19.

The current limiting circuitry operates through current transformer 20 and voltage comparator 5 in just the same way as in the first mode of operation described above. Since the oscillator frequency in the second mode of operation is substantially lower than in the first mode of operation, the inductor 17 will pass much higher currents as its impedance at low frequency is much lower than its impedance at high frequency. Therefore the operation of the current limiting. circuit described above is an essential feature in this second mode of operation. Indeed, due to the operation of the current limiting feature it may be seen that the lamp current waveform illustrated schematically in Fil 3 approximates a square wave with a small amount of high frequency ripple, due to the operation of the current limiting circuit, superimposed on the top and bottom extremities of the waveform. Since the lamp current waveform is near square it has a current crest factor approaching 1, thus minimising thermal stress on the lamp electrodes and extending the lamp life and colour maintenance.

Fa 4 shows a second preferred embodiment of the invention, in which the power switching elements, associated diodes and resonant component arrangement differ from that shown in Fig. 2. The Schottky diodes are no longer required as each of the MOSFETs 9,10 is serially connected to a fast recovery diode 16,15. The respective MOSFET to diode connection nodes A and AA are further connected to separate inductors 17 and 17A, which are connected to each other at node B, which is also connected to capacitor 18 and lamp 19. The circuit operates in two discrete modes.

In the first mode, the operation of the circuit is the same as that which is described with reference to Fig. 2, except that the alternate switching of the MOSFETs 9 and 10 alternately connects node A to the +HT rail and node AA to the OV rail so that the LC resonant circuit comprising inductors 17 and 17A and capacitor 18 is stimulated alternately via node A and inductor 17 and via node AA and inductor 17A at the fundamental resonant frequency of the resonant LC components or a harmonic thereof.

Thus voltage multiplication occurs at node B owing to the Q factor of the resonant components 17, 17A and 18. Further operation of the circuit can be described as for Fia. 2.

0 In the second mode, the operation of the circuit is the same as that which is described with reference to Fig. 2, except that the alternate switching of the MOSFETs 9 and 10 alternately connects node A to the +HT rail and node AA to the OV rail in response to the oscillator 1 and inverter 2 output. Thus in one half cycle of the oscillator MOSFET 9 conducts current from the +HT rail to the lamp via node A, inductor 17 and node B; and in the opposing half cycle of the oscillator MOSFET 10 conducts current from the OV rail to the lamp via node AA, inductor 17A and node B. As with Fig. 2, conduction of either MOSFET 9,10 can be terminated and re- established in response to the logic level of the current limit circuit output at node F. Further operation of the circuit can be described as for Fig. 2. The removal of the serial path that exists in Fig. 2 between the MOSFETs 9, 10 improves the switching performance of the circuit as the MOSFETs 9,10 do not have to commutate capacitive currents caused by the drain-to-source capacitance of the opposing MOSFET. The operation of this embodiment in the second mode of operation may be described as that of two "Buck" converters operating in alternate half cycles to supply lamp current.

Fig. 5 shows a third preferred embodiment of the invention, in which the power switchina elements, associated diodes and resonant component arrangement differ from that shown in Fig. 4 but are similar in arrangement to Fig. 2. The MOSFETs 9 and10 are serially connected with diodes 70 and 71 respectively. MOSFET 9 and diode 70 are connected between the +HT rail and node A and MOSFET 10 and diode 71 are connected between the node A and the OV rail. The polarity of the diodes 70 and 71 is arranged such that when each diode's serially connected MOSFET is in the ON condition the diode can conduct current in the same direction as the MOSFET. The diodes 70 71 act to block the flow of current in the body diodes of the MOSFETs 9, 10. Further, the diodes 70,71 also act to block the flow of capacitive currents associated with the drain-to-source capacitance of the inactive MOSFET that would otherwise be commutated by the active (switching) MOSFET during the second of the two discrete modes of operation described with reference to Fig. 2 and Fig. 4. The operation of the circuit in the two modes of operation is otherwise the same as that described with reference to Fig. 2, with the exception of the references to Schottkv diodes.

In all of the first, second and third embodiments, the capacitance of the wiring connecting the lamp 19 to the ballast may de-tune the resonant LC circuit by virtue of the capacitance of the wiring appearing in parallel to the capacitive component of the LC circuit. This may be compensated for by modulation of the frequency of the oscWator 1 during the first mode of operation. Thus long lengths of lamp wiring may be accommodated without significant degrading of the voltage multiplication of the LC circuit required for initiating the arc in the lamp 19, thus allowing lamps to be mounted some distance from the ballast.

In all of the first, second and third embodiments, the function of the capacitors 21 and 22 in returning the lamp current to the rails may be replaced by two further MOSFETs operating in opposition to MOSFETs 9 and 10 but not switched under the control of the current limiting circuit. This allows higher arc voltages to be sustained which may be useful in conjunction with some ED lamp types or where a multitude of lamps 19 are connected serially between nodes B and C via a current transformer 20 or current sensing device.

1 Where a multitude of lamps 19 are required to operate when serially connected between nodes B and C via a current transformer 20 or current sensing, device, it may not be possible to ionise the gas in the multitude of serial connected lamps 19 with the voltage available from the LC resonant circuit. Fig. 6 shows an extension applicable to any of the three embodiments, where a capacitor or capacitors J33,34 are connected in parallel with a lamp or a multitude of lamps 35,36. In this circuit the high voltage generated by the resonant LC components 17, 17A and 18 is initially forced to appear substantially between nodes B and G owing to the relatively low impedance of the capacitor 33 compared with lamp 19 and its associated wiring. This causes the gas in lamp 19 to ionise and the arc to initiate at the electrodes of lamp 19. Lamp 19 then appears as a low impedance, forcing the high voltage from the resonant circuit to appear across nodes G and H owing to the relatively low impedance of capacitor 34 compared with lamp 35 and its associated wiring. This causes the gas in lamp 35 to ionise and the arc to initiate at the electrodes of lamp 35. Lamp 35 then appears as a low impedance, forcing the high voltage from the resonant circuit to appear across nodes H and I and causing the gas in lamp 36 to ionise and the arc to initiate at the electrodes of lamp 36. Once the arc is initiated in all of the lamps 19, 35,36 the lamp electrodes are heated by lamp current until sufficient temperature is achieved for thermionic emission to occur. The circuit is then switched to the second of the two discrete modes of operation as described with reference to Fig. 2. The bypass capacitor or capacitors 33,34 must be significantly lower in value than the resonance capacitor 18 to av oid detuning the resonant circuit as the bypass capacitors successively come into operation.

Fig. 6 also shows the addition of two MOSFETs 28 and 29 as described earlier, which may be required to provide sufficient voltage to sustain the arc or arcs when a lamp typewith a high arc voltage or a multitude of lamps are connected. These MOSFETs 28,29 are driven by a MOS gate driver IC 32 from the complementary outputs of the oscillator 1, in opposition to MOSFETs 9 and 10 but not switched under the control 20 of the current limiting circuit.

In a second extension applicable to any of the three embodiments, shown in Fig. 7, lamp power is controlled by a novel means. A power factor controller circuit comprises integrated circuit 37, inductor 38, diode 39, MOSFET 40 and current sense resistor 41. Input and output voltage sensing is provided by potential dividers comprising resistors 42, 43 and 44, 45 respectively. The operation of such power factor controller circuits is well known and need not be discussed here. Suffice it to say that the power factor controller circuit operates to maintain a constant output of 40OV at the reservoir capacitors 21 and 22 over a range of input voltages and output loads.

Since the output voltage is constant it is apparent that the load power is proportional to the current flowing g in the 40OV output bus. An output current sensing resistor 46 is provided in series with the OV output from the power factor controller. Potential dividers comprising resistors 47, 48 and 49, 50 are connected in the first instance between the OV output of the PM circuit prior to the current sense resistor and the + 15V power rail and in the second instance between the OV output of the PFC circuit subsequent to the current sense resistor and the + 15V power rail. The resistor values in these potential dividers are chosen firstly such that the voltages applied to the inputs of operational amplifier 51 are within the common mode input voltage range of that amplifier and secondly such that a chosen value of output power (lamp power) will result in a differential voltage of zero at the inputs of the operational amplifier 5 1.

Capacitors 52 and 53 are provided to decouple the high frequency ripple current generated by the PFC circuit. Capacitor 54 is connected from the output to the inverting input of the operational amplifier 51. With this connection the amplifier 51 integrates the voltage difference signal applied to the inputs.

The input difference signal of the operational amplifier 51 is proportional to output power (lamp power), the lamp 19 being driven from a current sourcing circuit as previously described. Therefore if the lamp arc voltage changes because of lamp ageing or temperature variation etc. the lamp power will change in proportion to the arc voltage. However if the lamp power deviates from the desired value chosen by the values of resistors 47, 48 and 49, 50 the differential voltage at the inputs of the integrating operational amplifier 51 will cause the output voltage of theamplifier to change. The output of the integrating amplifier is connected to the top of the potential divider comprising serially connected resistors 25 and 26. The junction of the resistors and 26 is further connected to the input of the voltage comparator 5 at node E.

Since the voltage at node E is the reference value for the lamp current control circuit previously described any change in voltage at node E will result in a change in lamp current. Thus any change in lamp arc voltage results in a change in voltage at the output of the integrating amplifier 51, which changes the reference value at node E for 1 the comparator 5 and results in a change in lamp current sufficient to return the lamp power to the desired value.

A third extension applicable to any of the three embodiments utilising the second extension is shown in Fig. 8. A novel means of detecting an aged or faulty lamp is made possible by virtue of the output voltage from the integrating amplifier 51 being inversely proportional to the lamp arc voltage at a chosen lamp power. The anode of a Zener diode 55 is connected to the output of integrating amplifier 5 1. The cathode of the zener diode 55 is connected to resistor 56 which ensures that the current in the zener diode 55 is sufficient to provide good zenering characteristics. Resistor 57 is also connected to the cathode of the zener diode 55 and is serially connected to capacitor 58. Resistor 57 and capacitor 58 provide an R C time constant so as to ensure the circuit ignores momentary changes in lamp voltage as can occur during warm-up. A potential divider comprising serially connected resistors 59 and 60 divides the voltage at the junction of resistor 57 and capacitor 58. The junction of resistors 59 and 60 is further connected to the base of a transistor 61 and to a capacitor 62 which provides high frequency noise rejection. If the negative voltage (with reference to the + 15V rail) on the anode of zener diode 55 exceeds the zenering voltage, capacitor 58 charges negative with reference to the + 15V rail until the potential divider is able to source enough current into the base of transistor 61 to turn on the transistor. The collector of the transistor is connected to a shutdown circuit which turns off the current to the lamp 19 in response to the excessive lamp arc voltage.

Claims

CLAIMIS

A high intensity discharge lamp ballast circuit comprising: a high intensity discharge lamp connected between a first lamp terminal and a second lamp terminal; a resonant circuit, to which the first lamp terminal is connected; first switching means operable to connect the resonant circuit to a positive rail of a source of high voltage; second switching means operable to connect the resonant circuit to a negative rail of the source of high voltage; control means for alternately operating the first and second switching means to supply current to the resonant circuit, the alternation occurring in a first mode at a first switching frequency that causes the resonant circuit to resonate and in a second mode at a second switching frequency that does not cause the resonant circuit to resonate; and current limiting means for limiting the electrical current through the lamp.

to 2. A lamp ballast circuit according to claim 1, wherein:

the first and second switching means are connected in series between the positive high voltage rail and the negative high voltage rail; and the resonant circuit comprises a capacitor connected in parallel with the lamp, and an inductor connected in series between the first lamp terminal and a node at the junction of the first and second switching means.

A lamp ballast circuit according to claim 2, further comprising:

a first Schottky diode connected in series with the first switching means between the positive high voltage rail and the node; a first fast recovery diode connected between the node and the positive high voltage rail, in antiparallel with the first switching means and the first Schottky diode:

a second Schottky diode connected in series with the second switching means between the negative hig voltage rail and the node; and =h a second fast recovery diode connected between the node and the negative high voltage rail, in antiparallel with the second switching means and the second Schottky diode.

4. A lamp ballast circuit according to claim 2, further comprising: a first diode connected in series between the first switching means and the node; a first fast recovery diode connected between the node and the positive high voltage rail, in antiparallel with the first switching means and the first diode; a second diode connected in series between the node and the second switching means; and a second fast recovery diode connected between the node and the negative high voltage rail, in antiparallel with the second switching means and the second diode.

5. A lamp ballast circuit according to claim 1, wherein: 15 the first switching means is connected between the positive high voltage rail and a first node, and a first diode is connected between the first node and the negative high voltage rail; and a second diode is connected between the positive high voltage rail and a second node, and the second switching means is connected between the second node and the 20 negative high voltage rail; and wherein the resonant circuit comprises: a capacitor connected in parallel with the lamp; a first inductor connected between the first lamp terminal and the first node; and a second inductor connected between the first lamp terminal and the second node.

6. A lamp ballast circuit according to any of claims 1 to 5, wherein:

a first return capacitor is connected between the second lamp terminal and the positive high voltage rail; and a second return capacitor is connected between the second lamp terminal and the negative high voltage rail.

7. A lamp ballast circuit according to any of claims 1 to 5, wherein:

a third switching means is connected between the second lamp terminal and the positive high voltage rail, the third switching means beina operated by the control p 0 means in phase with the second switching means and independently of the operation of the current limiting means; and a fourth switching means is connected between the second lamp terminal and the negative high voltage rail, the fourth switching means being operated by the control means in phase with the first switching means and independently of the operation of the current limiting means.

8. A lamp ballast circuit according to any preceding claim, further comprising: a number n of further lamps connected in series with the lamp, where n -:t 1; and the same number n of bypass capacitors, wherein the kth bypass capacitor, from k = 1 to 15 k = n, is connected in parallel with the first k further lamps of the series.

9. A lamp ballast circuit according to any preceding claim, wherein the current limiting means comprises:

sensing means for measuring the current through the lamp; means for representing the measured current as a voltage signal; means for comparing the voltage signal with a reference voltage; and means for disabling the operation of the first and second switchina means by the control means if the compared voltage signal is greater than the reference voltage.

1 10. A lamp ballast circuit according to claim 9, further including a lamp power control means, comprising: a power factor controller for receiving input from an external power source and for supplying a stable voltage to the positive and negative high voltage rails; means for sensing the value of the current flowing in the high and low voltage rails; and means for changing the reference voltage of the current limiting means m response to deviations from a set value of the current flowing in the hig and low 1= g h voltaae rails, so as to maintain constant lamp power.

c 11. A lamp ballast circuit according to claim 10, further comprising shutdown means for turning off current to the lamp if the reference voltage of the current limiting means passes a predetermined threshold.

12. A method of powering a lamp via a lamp ballast circuit according to any 10 preceding claim, the method comprising the steps of: in the first mode operating the first and second switching means alternately at the first frequency, thereby causing the resonant circuit to resonate and generating sufficient voltage between the first and second lamp terminals to cause the lamp to strike; and 15 subsequently in the second mode operating the first and second switching means alternately at the second frequency, whereby the resonant circuit does not resonate but the lamp continues to conduct, the second frequency being lower than the first frequency.

13. A method according to claim 12, wherein the change in operation from the first 20 mode to the second mode occurs after a predetermined time.

14. A method according to clahn 12 or claim 13, further comprising the steps of:

measuring the current through the lamp; representing the measured current as a voltage signal; comparing the voltage signal with a first reference voltage; inhibiting the operation of the first and second switching means if the compared voltage sianal is greater than the first reference voltage; and continuing to inhibit the operation of the first and second switching means while the compared voltage signal remains greater than a second reference voltage, the second reference voltage being lower than the first reference voltage.

15. A method according to any of claims 12 to 14, wherein the first frequency is areater than 20 kHz.

tP 16. A method according to any of claims 12 to 15, wherein the second frequency is less than 1 kHz.

16. A lamp ballast circuit substantially as described herein with reference to any of Figures 2 to 8 of the drawings.