Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
  • H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word

Definitions

• the invention relates to a method for transmitting data in a first format or format 1 in a data stream respecting a second format or format 2.
• the invention applies to data flow transmission systems, especially in the case where these transmissions are simplex and synchronous. It finds applications for example in very low frequency radiocommunication systems or Very Low Frequency (VLF) or Low Frequency (LF) in which the data are broadcast according to the format (in French). defined by the STANAG 5065 (MSK LF mode) or the STANAG 5030. These systems allow the broadcast of messages to surface vessels for the STANAG 5065, to submarines for the STANAG 5030. It applies for various forms of for example, MSK (Minimum frequency-shift keying) and CPFSK (Continuous-phase frequency-shift keying).
• FIG. 1A represents an example of a VLF / LF broadcasting system broken down into three distinct entities, the different functionalities of which have been represented in the figure. It includes a command center 1, a VLF / LF radio transmission station 2, receiving platforms 3 such as surface ships, submarines receiving messages broadcast by the VLF / LF transmission station. .
• the command center 1 can be positioned at a remote site connected to the VLF / LF transmission station via an inter-site link.
• the command center has the particular function of ensuring the generation 4 of the messages to be transmitted, then their transfer 5 to the VLF / LF transmission station.
• the VLF / LF 2 transmitting station receives messages from the command center and provides broadcast on the very low frequency / low frequency channel 6, designated by the abbreviation VLF / LF for Very Low Frequency / Low Frequency.
• the station contains an interface gateway 7 with the network, one or more encryptors 8 and a VLF / LF modulator 9, as well as a transmission system 10 or broadcasting equipment.
• the encryptors can be located in the command center or in the transmitting station.
• the broadcasting message reception system mainly comprises a reception antenna 11, a receiver 12, a VLF / LF demodulator 13, the message reception terminal 14 and one or more decoders 15.
• the transmitting stations broadcast continuously. In the absence of messages to be transmitted, stuffing messages must be injected into the data stream.
• the stream of data broadcast in Stanag format 5030/5065 incorporates a synchronization sequence corresponding to a so-called Fibonacci sequence transmitted continuously with the useful data.
• the Fibonacci sequence is recognized by reception equipment - demodulator and decipherer. It allows these devices to synchronize with the data flow.
• the principle is robust enough to tolerate transmission errors induced by the channel.
• Encrypted encryptors protect the data flow in confidence.
• An encryptor ensures (see Figure 1 B), in this case: • Protection of messages before transmission using the encryption function 20,
• Protocol adaptation between messages received from the inter-site network and the modulator including asynchronous / synchronous conversion
• the decoder of the receiving platform of the messages ensures in this case:
• Protocol adaptation between the demodulator and the receiving data terminal in particular synchronous / asynchronous conversion
• encryptors and decryptors integrate both an encryption function and other functions generally designated in this document by “coding” and “decoding” (see FIG. 1B).
• the data transmission is carried out in the form of a data stream of a telegraphic channel, according to FIG. 2A, organized in a 7-bit frame (frame t), comprising 6 data bits. and a current bit of the so-called Fibonacci suite, used for synchronization.
• the demodulator supports the following processes:
• LFSR Linear Feedback Shift Register
• E (t) (S (t), S (t + 1), ..., S (t + 30)), t> 0, the current state (31-bit vector) of the LFSR register that delivers S (t).
• this register is implemented in the encryptor and advances one step to each frame.
• Each 7-bit current frame, denoted frame (t) includes the current bit S (t) of the Fibonacci sequence.
• the Fibonacci suite thus incorporated provides frame sync and sync digit as described below.
• the current state E (t) of the LFSR shift register can be used as the initialization vector for encrypting the data bits of the current frame.
• the 6 bits of useful data in the current frame are encrypted, for example, by a bitwise xor with 6 pseudo-random bits computed with a cryptographic algorithm from a traffic key K and the state of the current LFSR. And).
• the Fibonacci suite is emitted in clear according to the format of the Stanag 5030/5065, for example.
• Each frame is then deciphered with the state of the register correctly found and maintained in the decryptor (a transition from the LFSR to each new frame).
• the useful data are encoded in the format 1 or 2.
• the encoding operation generates data comprising the useful data and / or data related to an error correction code and / or any other information.
• technique conventionally used in coding / decoding methods see FIG. 2B).
• the data are grouped into blocks of fixed size including kr symbols.
• the data are grouped in blocks of fixed size called super-frames, themselves constituted of frames:
• a frame is a window of the stream including r data symbols and 1 symbol dedicated to synchronization, the symbol dedicated to synchronization being distributed all the r data symbols.
• This dedicated symbol is a common term of a sequence S (t) satisfying a linear recurrence,
• a super-frame is a window of the stream consisting of k consecutive frames, which therefore includes k data symbols and k synchronization symbols.
• the input data are formatted in several data blocks according to the format 1, the k data symbols constituting a block in format 1 are positioned in the given part of k consecutive frames in format 2, which corresponds to a super- frame, where a frame corresponds to a window of the format stream 2 including r data symbols and 1 symbol dedicated to synchronization, and a superframe corresponds to a window of the stream in format 2 consisting of k consecutive frames, which includes k data symbols and k synchronization symbols,
• the rank t of the first frame (t) in a super frame including a block is chosen so that the modulo value k of t is equal to a fixed value "a"; at the reception phase of a super frame:
• the synchronization at the format level 1 is determined on reception by completing the conventional process of the format 2 synchronous frame making it possible to recognize the synchronization sequence S (t) transmitted in the data stream, by performing the following steps: reconstituting E (t) the current state of the automaton generating the sequence from the symbols S (t),
• the first frame of a super frame including a data block has for rank a integer whose remainder modulo k is equal to the arbitrary value "a" chosen.
• the relict super-frame incorporates, for example, stuffing and / or data in a particular coding, in transmission and reception, it is identified as the super-frame positioned on the rank frame (T-h).
• the method can integrate in the super frame:
• FIG. 2A the organization of a bit frame using a synchronization bit
• FIG. 3 a representation of a linearly looped shift register
• FIG. 4 a linear code control matrix used in an example of the coding principle
• FIG. 5 an example of implementation of the shift register according to the method of the invention.
• the example of the method given without limitation relates to a way of transporting an n-ary data stream in the frames of the Stanag 5030/5065 in an optimized manner in the following sense: the bits transmitted in the data portion of the frames of the Stanag
• 5030/5065 are all used to encode useful symbols or stuffing symbols and possibly redundancy bits associated with an error correction code
• the transmitter of the system comprises for example an LFSR type automaton for generating the sequence S (t) satisfying the linear recurrence, having a current state E (t) and a counter modulo T, CPT (t).
• the receiver is equipped in the same way with an LFSR type PLC and a CPT (t) modulo T counter.
• the input data is formatted as a data block according to the format 1.
• the method performs a step of encoding the user data in format 1. It is considered according to FIG. 2B, that the useful data consist of L packets of N bits.
• L packets are positioned in the data portion of k consecutive frames of the format 2, which corresponds to a super-frame.
• the format 2 frames correspond, for example, to the STANAG 5030/5065 format.
• the rank t of the first frame (t) in a super-frame including a block of format 1 is chosen so that the value of t is equal to 0 modulo k and more generally equal to an arbitrary value modulo k.
• a super-frame may include: - L bits to indicate for each packet whether it actually corresponds to useful data or whether it corresponds to a stuffing,
• Example 1 Mode without redundancy on byte stream
• the 18 bits of data are precisely: -8 bits (ao, ai, a2, a 3, a 4, a5, 6, a7) of the useful byte Oi, -8 bits (b o, bi, b2, b3 , b 4 , b5, b6, b 7 ) of the useful octet O 2 , -U: 1 bit indicating whether Oi is a useful byte or stuffing, -f 2 : 1 bit indicating whether O 2 is a useful byte or stuffing.
• Example 2 Mode with redundancy on byte stream
• the super frame consists of 4 frames.
• the 24 bits of data are precisely: -8 bits (ao, ai, a 2 , a3, a 4 , a 5 , a 6 , a7) of the useful byte Oi, -8 bits (bo, bi, b 2 , b 3 , b 4 , b 5 , b 6 , b 7 ) of the useful octet O 2 ,
• redundancy bits (r 0 , r 1 , r 2 , r 3 , r 4 , r 5 ) derived from a Hamming code with parity bit.
• the control matrix defining the code is given in FIG. 5. This parity Hamming code used to code the 24-bit word systematically corrects an error and detects two errors.
• the encoder imposes that the first frame in a super frame is associated with a state of the register E (t) in correspondence with an element a x for which the value of t is equal to a fixed value "a" modulo k.
• the k register states associated with the k frames of a super-frame will therefore be of the form:
• the coder selects a current state E (t " ) of departure to generate the Fibonacci sequence, associated with the element ⁇ f with t * multiple of k.
• this can be done, for example, by explicitly managing in addition to the LFSR register which generates the Fibonacci sequence S (t) whose current state is E (t), a 31-bit counter which codes t such that E (t) is associated with a ⁇
• the current LFSR register advances by one step and the counter t increments by 1 modulo T to keep at all times the knowledge of 2 data:
• the decoder belonging to the decryptor can deduce the rank of all the other frames that follow and therefore the position of the super frames including the blocks of the format 1.
• the first frame of a super frame including a block of data has for rank a multiple of k.
• the superframe sync determined initially, it is easily maintained in current mode by processing the frame flow per packet of k consecutive frames.
• the transmitter and the receiver of the system manage two automata: an automaton of the type LFSR which generates the sequence or sequence S (t) of synchronization and whose current state E (t) is in correspondence with the element ⁇ f of GF (q n ), - A counter modulo T, whose current state CPT (t) is the value of rank t.
• CPT (t + 1) CPT (t) +1 modulo T.
• the transmitter initializes the LFSR and CPT PLCs, for example, as follows:
• the current counter CPT is in any state X, in general, that which is imposed by the power on of the equipment or obtained after the transmission of a previous traffic.
• the period T (2 31 -1) is not divisible by k and is of the form kQ + r, 0 ⁇ r ⁇ k.
• a complete cycle of the T powers of ⁇ absorbs kQ frames. There are still frames at the end of this cycle that we include in a special super frame called balance. The remainder comprises only the r frames instead of k, associated with the last r powers of ⁇ in the cycle: ⁇ ⁇ "r , ⁇ ⁇ " (M) , ..., ⁇ ⁇ "1 .
• the description specifies two ways of coding the remainder associated with the examples described above.
• the "remainder” includes only r frames instead of k, associated with the last r powers.
• the 8 bits (bo, bi, b 2 , b 3 , b 4 , b 5 , b 6 , b 7 ) of the useful octet O 2 are set to 0 and not transmitted,
• redundancy bits (r o , r 1 , r 2 , r 3 , r 4 , r 5 ) resulting from the same hamming code as for a standard super-frame calculated from the useful data (a o , ai, a 2 , a 3, a 4, a5, a6, 7, bo, bi, b 2, b 3, b 4, b 5, b 6, b 7, fi, f 2) taking into account the useful data (a o , ai, a 2 , a 3, a 4, a5, a6, 7, bo, bi, b 2, b 3, b 4, b 5, b 6, b 7, fi, f 2) taking into account the useful data (a o , ai, a 2 , a 3, a 4, a5, a6, 7, bo, bi, b 2, b 3, b 4, b 5, b 6, b 7, fi, f 2) taking into account the useful data (a o , ai, a 2
• the 6 data bits of this reliquat frame (which is associated with the state in correspondence with ⁇ ⁇ "1 ), are directly filled with stuffing.
• Fibonacci automatically causes the recovery of the cut in super frame.
• the format of the superframes adapts to the data to be transmitted and allows the addition of explicit stuffing information and error correcting codes.

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• 2007
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  • 2008-12-03 WO PCT/EP2008/066722 patent/WO2009071589A2/fr active Application Filing
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