EP2220799A2 - Synchro-frame method based on the discrete logarithm - Google PatentsSynchro-frame method based on the discrete logarithm
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- EP2220799A2 EP2220799A2 EP20080856271 EP08856271A EP2220799A2 EP 2220799 A2 EP2220799 A2 EP 2220799A2 EP 20080856271 EP20080856271 EP 20080856271 EP 08856271 A EP08856271 A EP 08856271A EP 2220799 A2 EP2220799 A2 EP 2220799A2
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- H03—BASIC ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits
- H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
SYNC-FRAME PROCESS BASED LOG DISCREET
The invention relates to a method for transmitting data being in a first format or screen 1 in a data stream complying with a second format or screen 2.
The invention applies to the data stream transmission systems, especially if these transmissions are simplex and synchronous. It finds applications for example in radio systems in very low frequency or VLF (acronym for Very Low Frequency) or low frequency or LF (acronym for Low Frequency) in which the data are released in the format defined by the STANAG 5065 (MSK LF mode) or STANAG 5030. These systems enable broadcast messages to surface ships for the STANAG 5065, to submarines to STANAG 5030. it applies to various forms wave, e.g., MSK (Minimum frequency-shift keying) and CPFSK (Continuous phase frequency-shift keying).
Figure 1A shows an example of broadcasting system VLF / LF split into three separate entities, the various features have been shown in FIG. It comprises a control center 1, a radio-transmitting station VLF / LF 2, the receiving platform 3 such as surface ships, submarines ensuring the receipt of messages broadcast by the transmitting station VLF / LF . 1 the command center can be positioned at a remote site connected to the transmitting station VLF / LF via an inter-site link. The command center functions include ensuring the generation 4 messages to be transmitted and then transfer 5 to the transmission station VLF / LF. The transmitting station VLF / LF 2 receives the messages from the command center and provides the broadcasting on the channel very low frequency / low frequency 6, designated by the VLF / LF abbreviation for Very Low Frequency / Low Frequency. To provide these functions, the station contains an interface gateway 7 with the network, one or more encryptors 8 and a VLF / LF modulator 9 as well as a transmission system or broadcasting equipment 10. Depending on the architecture chosen for the implementation, encryptors can be located in the command center or in the transmission station. To illustrate the object of the present invention, the description is the second solution. The broadcast message receiving system mainly includes a receiving antenna 1 1, a receiver 12, a demodulator VLF / LF 13, the receiving terminal 14 messages and one or more decoders 15.
Broadcast stations transmit continuously. In the absence of messages to be transmitted, jam messages must be injected into the data stream.
Among the receiving platforms, submarines are constantly listening to the messages transmitted. So you need a mechanism for receiving equipment to synchronize to the data stream. For example, the data stream broadcast according to the Stanag 5030/5065 formats incorporates a synchronization sequence corresponding to a so-called Fibonacci sequence transmitted continuously with the given useful. The Fibonacci sequence is recognized by the receiving equipment - demodulator and decryptor. It allows these devices to synchronize to the data stream. The principle is robust enough to tolerate the transmission errors caused by the channel. In addition, upon having fairly accurate clocks in transmission and reception, once acquired synchronization can be maintained, this even in the absence of signal reception because the data flow is synchronous. The encryptors placed cutoff protect confidentiality in the data stream. A Encryptor ensures (see Figure 1 B), in this case: • The message protection before transmission using the encryption function 20
• Adaptation 21 protocol between the messages received from the inter-site network and the modulator, including the asynchronous / synchronous conversion;
• The generation of jam in the absence of message to his input, 22.
The deciphering of the receiving platform ensures messages in this case:
• Decryption 23 messages sent on the VLF / LF radio channel and demodulated by the demodulator,
• adaptation protocol 24 between the demodulator and the receiving data terminal, including the synchronous / asynchronous conversion,
• Removing jammed received 25.
It is noteworthy that encryptors and decoders incorporate both an encryption function and other functions generally designated herein as "coding" and "decoding" (see Figure 1 B).
In the case of the aforementioned STANAG format, the data transmission is performed in the form of a data stream of a telegraph, according to Figure 2A, organized in frame 7 bits (frame t), comprising 6 bits of data and a current bit of said Fibonacci sequence, used for synchronization.
In reception, the demodulator supports the following processes:
- demodulation symbols,
- recognition of the Fibonacci sequence and timing, these different treatments are known to the skilled person and will not be detailed herein.
The so-called Fibonacci sequence used is a non-zero binary sequence that satisfies a linear recurrence (in the Galois field with two elements GF (2)): S (t) = S (t-3) + S (t-31) where "+" denotes addition modulo 2. It is produced for example by a linear feedback shift register (LFSR or, linear Feedback shift register) of the characteristic polynomial P (X) = 1 + X 28 + X 31.
Let E (t) = (S (t) S (t + 1), ..., S (t + 30)), t> 0, the status (31 bit vector) of the current LFSR which supplies S (t). The period of non-zero result (S (t), t> O) is also the period of the sequence of register states (E (t), t> O) and T is = 2 31 -1, for the polynomial P is primitive. In transmission, the register is implemented in the cipher and a step forward in each frame. Each current frame of 7 bits, denoted Frame (t), includes the current bit S (t) of the Fibonacci sequence. The Fibonacci sequence and incorporated provides frame sync and sync figure as described below.
The current state S (T) of LFSR shift register can be used as initialization vector for encrypting the bit data of the current frame. The 6 bits of user data in the current frame are encrypted, for example, by a xor with 6 bits bit by bit pseudo random number calculated with a cryptographic algorithm from a traffic key K and the state of the current LFSR And). The Fibonacci sequence is sent in clear following the Stanag 5030/5065 format, for example. In reception, a test of the recurrence relation to three terms (S (t) = S (t-3) + S (t-31)) over a sufficiently large window permits its detection in the received stream cryptogram and then fixed the word cutting bits 7 unambiguous, this process is known under the term "sync frame." Each frame is then deciphered with the state of the register properly recovered and held in the deciphering (a transition of the LFSR for each new frame).
The existence of a linear sequence incorporated continuously into the transmission of a stream of synchronous data and simplex allows demodulation equipment and to synchronize decryption of robust and reliable manner. However, this technique freezes the format of data transmitted and restricted it to a few bit format, typically a character. The invention allows, retaining this mechanism, its benefits and the already existing infrastructure to transmit effectively other types of data and therefore to expand the scope of applications. This treatment is implemented at the cipher equipment in transmission and at the reception deciphering equipment. If the above description only mentions the Fibonacci sequence S (t) = S (t-3) + S (t-31), the present invention is applicable in any equipment implementing continuous synchronization method based on a sequence checking a linear recurrence.
In the following description, the useful data are encoded in the format 1 or 2. The encoding operation generates data comprising payload data and / or data related to an error correction code and / or other information technical conventionally used in the encoding / decoding processes (see Figure 2B). a) In the format 1, the data is grouped into fixed-size blocks including kr symbols. b) In the format 2, the data are grouped into blocks of fixed size called super-frames, which themselves consist of frames:
- a frame is a flow window including r data symbols and one symbol dedicated to synchronization, the symbol dedicated to synchronization being distributed all r data symbols. This dedicated symbol is a common term following an S (t) satisfying a linear recurrence,
- a superframe is a flow window consisting of k consecutive frames, thus including kr k data symbols and synchronization symbols.
The invention relates to a method for transmitting data having a first format or screen 1 in a data stream complying with a second format, the second format or screen 2 consists of a stream of data symbols uniformly incorporating a symbol dedicated to synchronization and arranged all r data symbols, the symbol dedicated to synchronization is the common term for a more S (t) that satisfies a linear recursion, the data being divided in the format 1 into blocks of fixed size data including kr symbols, the data symbols are regarded as elements of a finite field GF (q) where q is the number of elements of the result S (t) satisfies a linear recurrence over GF (q) and admits polynomial feature a primitive polynomial of degree P n on GF (q), and is periodic with a period T = q n-1, α being a root of P in the field GF (q n), characterized in that it comprises at mo ins the following steps: - broadcasting the result S (t) is generated by a linear automaton whose state current E (t) α f is written in a particular base GF (q n), when the phase of transmitting the data stream,
- the input data is formatted into multiple data blocks in the format 1 - kr the symbol data constituting a block format 1 are positioned in said given portion of k consecutive frames in format 2, which corresponds to a super- frame, where a frame corresponds to a window of the stream format 2 including r data symbols and one symbol dedicated to synchronization, and a super-frame corresponds to a window of the format 2 stream consisting of k consecutive frames, which includes kr k data symbols and synchronization symbols,
- 1 different format data blocks are successively placed in superframes,
- the rank t of the first frame frame (t) in a super frame including a block, is chosen so that the value modulo k t is equal to a fixed value "a"; at reception of a super frame phase:
- the synchronization at screen 1 is determined by receipt by filling out the conventional process of the frame-synchronization of the format 2 for recognizing the synchronization sequence S (t) transmitted in the data stream, performing the steps of: - reconstitute E (t) the current state of the automaton having generated the result from the symbols S (t),
- let E (t 0) the state recognized and associated with the first frame of the treated stream in reception, there determine from the value = E (t 0) the unique integer t belonging to the interval [O, T -1] α which satisfies the relationship f = y, using a computing discrete logarithms over GF (q n),
- once the rank t 0 recognized deduce the rank of all other frames that follow and superframes position including blocks of the format 1, the first frame of a super frame including a data block to a row around which the remainder modulo k is the arbitrary value "a" selected.
The method may comprise at least the steps of: for transmitting a stream format into data blocks 1, at the initialization step, the counter CPT elements and LFSR linear controller are initialized as follows: before transmission of the first frame, the current counter CPT is in any state X, that imposed after the tensioning equipment or obtained after the transmission of a previous traffic, the transmitter then calculates d = X modulo k and sends u elementary transitions elements LFSR and CPT where u is equal to:
- if d = 0 modulo k;
- 1 if d = a + k-1 modulo k;
- 2 if d = a + k modulo-2 k;
- k-1 if d = a + 1 modulo k.
According to one embodiment, the remnants are treated as follows: where T = the period (n q -1) is not a multiple of k and is of the form Q k + h, 0 <h <k, one complete cycle T α powers absorbs Qk frames therefore Q superframes and remains h late frames that ring which are included in a super special frame called balance having only h frames instead of k, associated with h last α powers in the ring: α τ "h, α τ" (h "1), ..., α τ '1.
The superframe remaining incorporates, for example, jam and / or data according to a particular coding in transmission and reception, it is identified as the superframe positioned on the frame of rank (Th). The process can integrate into the super frame:
- redundancy bits associated with an error correcting code,
- explicit jam information as flag indicating whether the data carried in the super frame are useful data or match the jam.
Other features and advantages of the present invention appear from reading the following description of an embodiment given by way of non-limiting example, with appended figures which represent: • Figure 1 A, an example of architecture a broadcasting system VLF / LF,
• Figure 1 B, the operation of an encryptor and a decryptor in the process,
• Figure 2A, the organization of a bit frame using a synchronization bit,
• Figure 2B, the cutout frame and super-frame data block in Format 1 and Format 2,
• Figure 3, a representation of a shift register linearly • Figure 4, a check matrix of a linear code used in an example of the encoding principle, and
• Figure 5, an exemplary implementation of shift register according to the method of the invention. In order to better understand the method according to the invention, the following example is given for a system in which the data format has to check that defined in the STANAG 5030/5065. The interface with the data terminal encryptor outputs a data stream in a format that is not necessarily directly suitable for cutting in frame r = 6 bits of the Stanag 5030/5065.
The example of the method given by way non-limiting relates to a way of transporting a data stream n-areas in the frames of the Stanag 5030/5065 so optimized in the following sense: - the transmitted bits in the data portion of the frames Stanag
5030/5065 are used to code the useful symbols or jam and possibly redundancy bits associated with an error correcting code,
- no data bit in the frame is explicitly used to recognize the cutting symbols n-ary or packet receiving n-ary symbols (sync symbol), in normal operation the process according the invention.
For the implementation of the method according to the invention, the transmitter of the system comprises, for example an LFSR type of controller to generate the result S (t) satisfying the linear recurrence, having a current state S (t) and a counter modulo T, CPT (t). The receiver has the same way of an LFSR type controller and a counter CPT (t) modulo T. When transmitting the data stream, the input data is formatted data block following the format 1. according to an exemplary implementation, at the encoder system, the method executes a step of encoding of the useful data format 1. the expression according to Figure 2B, the user data consist of L packet N bits. These L packets are positioned in the data portion of k consecutive frames of the format 2, which corresponds to a superframe. Format frames 2 correspond for example to STANAG 5030/5065 format. The rank t of the first frame frame (t) in a super frame including a 1 available block is chosen so that the value of t is equal to 0 modulo k and generally equal to an arbitrary value modulo k. Besides the L helpful packets (LN-bit) a super frame may include: - L bits to indicate for each packet if it actually corresponds to user data or if it corresponds to the jam,
- optionally redundancy bits to add a correction service and / or detection of FEC errors (abbreviation Anglo Saxon Forward Error Correction) which takes into account constraints of BER (Bit error rate abbreviation) of the radio channel.
For example, the description specifies two modes of implementation can to cut useful data:
- a cutting favoring the flow where the superframe is composed of k = 3 frames carrying L = 2 useful bytes (N = 8) with no redundancy;
- a cut-out where the superframe is composed of k = 4 frames carrying usable bytes L = 2 (N = 8) and incorporating an error correcting code.
The encoding of payload in the super-frames is more effective that no additional bit is allocated to ensure the superframe sync (detection of the new cut into super-frame). As the sync-frame, the superframe sync be deduced from the Fibonacci sequence imposed by the Stanag 5030/5065 as is explained below. EXAMPLE 1 without redundancy mode on the byte stream In this mode, the super-frame consists of three frames. It is used to transmit a block of L = 2 bytes (N = 8) useful (Oi, O 2) in three subframes STANAG 5030/5065 (k = 3, r = 6). This superframe includes therefore k * r = 3 * 6 = 18 bits of user data and k = 3 bits for the sync (Fibonacci sequence). The 18 bits of data are precisely: -8 bits (ao, ai, a2, a3, 4, A5, A6, A7) of the useful byte Oi, -8 bits (b o, bi, b2, b3 , b4, b5, b6, b 7) of the useful byte 2 O, -U 1 bit indicating whether Oi is a relevant byte or stuffing, -f 2: 1 bit indicating if O 2 is an octet or the jam. Example 2 mode with redundancy on byte stream
In this mode, the super frame consists of four frames. This super-frame used to transmit a block of L = 2 bytes (N = 8) useful ((Oi, O 2) into k = 4 subframes STANAG 5030/5065 (k = 4, r = 6). This super -trame therefore includes k * r = 4 * 6 = 24 bits of user data and k = 4 bits for sync (Fibonacci sequence) the 24 data bits are precisely. -8 bits (ao, ai, a2, a3, a 4, a 5, a 6, a7) useful Oi byte -8 bits (bo, bi, b 2, b 3, b 4, b 5, b 6, b 7) of the useful byte O 2,
-fi: 1 bit indicating whether Oi is a relevant byte or stuffing,
-f 2: 1 bit indicating if O 2 is useful byte or stuffing,
-6 redundancy bits (r o, r, r 2, r 3, r 4, r 5) from a Hamming code with parity bit. The control matrix defining the code is given in Figure 5. This Hamming code with parity used to encode 24-bit word systematically corrects an error and detects two. It has eg ro = ao + a-ι + a 3 + a 4 + Aß + bo + b 2 + b 3 + bs + b 7 + f 2 r-ι = ao + a 2 + a 3 + as + a6 + bi + b 2 + bi + bs + fi + f 2 r 2 = a 4 + a 5 + a 6 + a 7 + b 0 + bi + b 2 r 3 = a-ι + a 2 + a 3 + a 7 + bo + b-ι + b 2 + b 6 + b 7 + f-ι + f 2 r 4 = b 3 + b 4 + b 5 + b 6 + b 7 + fi + f 2 r 5 = r + r 2 + r 3 + r 4 + ao + ai + a 2 + a 3 + a 4 + as + a 6 + a 7 + bo + bi + b 2 + b 3 + b 4 + bs + b 6 + b 7 + f 1 + f 2 = ao + ai + a 2 + a 4 + a5 + 7 + bi + b 2 + b 3 + b 4 + bε + f 2 (the + sign corresponds to the binary xOR operation). super frame sync
In the previous cuts, no bits are allocated to ensure the sync at a superframe, i.e. which allows the unambiguous determination of the cut super frame on the treated stream reception. The superframe sync is determined by means of the synchronization sequence already used for the elementary frames, for example the Fibonacci sequence in the case of STANAG 5030/5065.
The Fibonacci sequence is generated by a linear controller characteristic polynomial P = 1 + X + X 28 31. Is a root of P in the finite field GF (2 31).
It is considered an equivalent implementation of the LFSR which generates later
(S (t)) as a divisor register that explicitly performs multiplication by α in the polynomial base (1, α, α 2, .., α 30). This equivalent implementation of the LFSR shows that the current state E (t) = (s (t), s (t + 1), ..., s (t + 30)) is a vector of 31 bits, a permutation of the components can be interpreted as element α f of the finite field GF (2 31) decomposed in the polynomial base (1, α, α 2, ..., α 30).
More specifically, the current state of the register E (t) = (s (t), ..., s (t + 31)) of the LFSR is associated with the element: α = f s (t + 27) α ° + s (t + 26) α 1 + s (t + 25) α 2 + ... + s (t) α + 27 s (t + 30) 28 + α s (t + 29) 29 α + s (t + 28th) α 30. EQ1 - This example is shown in Figure 6.
The starting point α ° = 1 is associated with the state of the LFSR E (t 0) = (, s (t o), s (t o +1)
..., s (t o + 3O)) where the components 31 s (t 0 + i) are zero except s (t 0 + 27) is 1. A super-frame comprises k frames (in the examples, k = 4 mode with redundancy, and k = 3 without redundancy mode).
During transmission, the encoder requires that the first frame in a super frame is associated with a state of the register E (t) in correspondence with an element x for which the value of t is equal to a fixed value "a" modulo k. For the rest of the explanation arbitrary chosen hypothesis is a = 0, which means taking multiple of t k (t = ku).
For this example (a = 0), the k register states associated with k of a super-frame frames will therefore be of the form:
E (t) = α ku, E (t + 1) = α 1 + ku, E (t + 2) = ku α + 2, ..., E (t + k-1) = α ku + k " 1. in the beginning of processing of the data stream, the encoder chooses a current state S (t ") from which to generate the Fibonacci sequence, associated with the element α with f t * multiple of k.
During transmission this can be done, for example, by explicitly manage in addition to the LFSR that generates the Fibonacci sequence S (t), the current state is S (t), a counter of 31 bits which code such that E t (t) is associated with a \ When key change, the LFSR managed by the encryptor is initialized to its initial value E (t 0) explained previously (Eq1), and the counter t is initialized to the value of t o = O. Then, for each new frame processed, the current LFSR advances one step register and the counter t is incremented by 1 modulo T to keep at all times the knowledge of two data:
- the current state E (t) of the LFSR register associated with a \
- and its logarithm t [0, T 1].
In reception, once the sync recovered frame, the state of the LFSR current Y = (s (t), ..., s (t + 31)) associated with the first frame "Frame (t)" is available treated . The process then considers the element of the finite field GF (2 31): y = s (t + 27) ° + α s (t + 26) α 1 + s (t + 25) α 2 + ... + s (t) α 27 + s (t + 30) 28 + α s (t + 29) 29 + α s (t + 28) 30 α.
A computing discrete logarithms over the finite field GF (2 31) is then used to find the unique value of t in [0,2 31 -2] such that x = y. More generally, the calculation can be performed in a finite field GF (q n) Λ q n elements. 1) By observing the remainder modulo k t, the receiver then deduces the position of the first super-frame that it can handle: For v, where 0 <= v <k, if t is of the form KU- v, the first super-frame is [frame (t + v), frame (t + v + 1), ..., frame (t + ++ v k-1)].
Once he recognized the rank t 0, the decoder part of deciphering can deduce the rank of all other frames that follow and thus the super frame position including the format of the blocks 1. The first frame of a super frame including a data block is to rank a multiple of k. Of course, once the super frame sync initially determined, it is easily kept current regime by treating the stream of frames per packet of k consecutive frames.
To adjust the positioning of the blocks of the format 1 in the frames of the format 2, or the place where must be a format block 1, the transmitter and receiver of the system according to the invention support two controllers: a PLC type LFSR which generates the sequence or sequence S (t) synchronization and current state of which E (t) is in correspondence with the element α f GF (q n), - a modulo-T, including the current state CPT (t) is the value of the rank t.
For each received frame (format 2) or transmitted, a transition of
LFSR is executed, this transition calculating the new state S (t + 1) from its former value E (t).
Similarly, the counter CPT is incremented by 1 at each new frame: CPT (t + 1) = CPT (t) modulo 1 T.
For transmitting a stream format into data blocks 1, format 2 frames, the transmitter first initialize the LFSR and CPT controllers, for example, as follows:
Before transmission of the first frame format 2, the current counter CPT is in any state X, in general, the one imposed by the tensioning equipment or obtained after the transmission of a previous traffic.
The transmitter then calculates d = X modulo k u and sends a number of elementary transitions elements LFSR and CPT where u is 0, if d = 0 modulo k,
1, if d = k-1 modulo k,
2, if d = k 2 modulo k
k-1, if d = 1 modulo k. Treatment of leftovers
The period T = (2 31 -1) is not divisible by k and is of the form kQ + r, 0 <r <k.
A complete cycle of T α powers absorbs kQ frames. It remainder r at the end this cycle frames that are included in a super special frame called remainder. The remainder includes only the frames instead of r k, associated with the last r α powers in the ring: α τ "r, α τ" (M), ..., α τ "1.
As an illustrative example, the description specifies two ways to encode the remainder associated with the examples described above. The "balance" includes only the frames instead of r k, r associated with the last powers.
In practice, the treatment of the balances is not performed because the cycle is not covered during use of the same key.
Balance mode redundantly
Mode with redundancy, the super frame is composed of k = 4 frames. T = 4Q + r, where r = 3.
The remainder is therefore of size 3 instead of 4. This exceptional case is treated by considering the following encoding for this balance:
- 8-bit (a o, ai, a2, a3, 4, a5, a6, 7) useful Oi byte,
- the 8 bits (bo, bi, b 2, b 3, b 4, b 5, b 6, b 7) of the useful byte O 2 are set to 0 and not transmitted,
- fi: 1 bit indicating whether Oi is a relevant byte or stuffing,
- f 2: 1 bit set to a random value (padding) and transmitted,
- 6 redundant bits (r o, r, r 2, r 3, r 4, r 5) from the same Hamming code for a standard super-frame calculated from the user data (a o, I, 2 , a 3, a 4, a5, a6, 7, bo, bi, b 2, b 3, b 4, b 5, b 6, b 7, fi, f 2) taking into account the
In reception, the processing of this exceptional case is returned to the current processing to complete the received bits with the 8-bit bi to 0. The hamming decoding is performed in similar manner as in the standard case unless an error is detected on a bit bj. In this case the decoding does not correct the bit and declared the super erroneous frame. Remaining in non-redundant fashion
In no redundancy mode, the super frame is composed of k = 3 frames. T = 3Q + r, with r = 1. The remainder is of size 1 instead of 3. In this case, the 6 bits of data for remaining frame (which is associated with the matching condition with α τ "1 ) are directly filled with the jam.
The method according to the invention offers the following advantages:
1) The robustness of the synchronization is maintained with respect to the system on which it is supported:
• if the sync frame is assured, the super frame sync is too,
• it is lost if the Fibonacci sequence S (t) is not correctly recognized, as is already the case for the sync frame, • in case of loss of vertical sync, via its recovery following
Fibonacci automatically entails the recovery of the cut in super frame.
2) No additional synchronization information is necessary, the super-frame cutout is obtained directly by using the following already present in the sync frames.
3) The calculation of the discrete logarithm in a small field GF (2 31) is simple and feasible in the decryptor.
4) The super frame format fits the data to be transmitted and allows the explicit information adding stuffing and error correcting codes.
Priority Applications (2)
|Application Number||Priority Date||Filing Date||Title|
|FR0708460A FR2924549A1 (en)||2007-12-04||2007-12-04||frame-synchronization process using discrete logarithm|
|PCT/EP2008/066722 WO2009071589A3 (en)||2007-12-04||2008-12-03||Synchro-frame method based on the discrete logarithm|
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|EP2220799A2 true true EP2220799A2 (en)||2010-08-25|
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|KR101296901B1 (en)||2010-10-12||2013-08-14||엘지디스플레이 주식회사||3d image display device and driving method thereof|
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