EP2162913A1 - Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system - Google Patents

Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system

Info

Publication number
EP2162913A1
EP2162913A1 EP08761341A EP08761341A EP2162913A1 EP 2162913 A1 EP2162913 A1 EP 2162913A1 EP 08761341 A EP08761341 A EP 08761341A EP 08761341 A EP08761341 A EP 08761341A EP 2162913 A1 EP2162913 A1 EP 2162913A1
Authority
EP
European Patent Office
Prior art keywords
electrical
integrated circuit
network
circuit
security
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08761341A
Other languages
English (en)
French (fr)
Inventor
Pierre Gravez
Michel Thill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales DIS France SA
Original Assignee
Gemalto SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemalto SA filed Critical Gemalto SA
Priority to EP08761341A priority Critical patent/EP2162913A1/de
Publication of EP2162913A1 publication Critical patent/EP2162913A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2143—Clearing memory, e.g. to prevent the data from being stolen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0237—Disposition of the redistribution layers
    • H01L2224/02379—Fan-out arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps

Definitions

  • the invention relates to a method of manufacturing a secure electronic system using a securing device reported on at least a first integrated circuit.
  • the invention also relates to a security device capable of securing at least a first integrated circuit and a secure electronic system thus manufactured.
  • the security device forming a second integrated circuit and comprising at least one network of electrical connections, is used to be assembled with the first integrated circuit, to form the system. Then, a reference electric image specific to the network of electrical connections of the formed system is captured. The formed system is then configured to compare an electrical image to be captured during operation of the first integrated circuit to the captured reference electrical image.
  • the manufacturing method of the invention therefore constitutes a new approach compared to the known manufacturing technique.
  • the invention is a secure electronic system.
  • the system comprises the integrated circuit to be secured and a securing device reported on such an integrated circuit.
  • the security device constituting a second integrated circuit and comprising at least one network of electrical connections
  • the system comprises means for capturing electrical images specific to the existing network of electrical connections, means for comparing a electrical image captured during the operation of the integrated circuit to be secured to an electrical reference image captured before operation.
  • the microcontroller 10 is configured to perform, through the network of electrical connections, a means of electromagnetic radiation to the outside, without radiating to the circuit to be secured.
  • the microcontroller of the circuit to be secured initializes the two circuits of the system, for example by validating the different access points to each of the two circuits.
  • the memory of the security circuit storing configuration data of a communication to be established between the circuits, the security circuit performs the setting of the communication between the security circuit and the circuit to be secured.
  • the communication is carried out through the connection pads of the security circuit coupled to corresponding connection pads of the circuit to be secured.
  • the two coupled circuits can communicate, and in particular exchange data relating to a comparison result to the electrical reference image of an electrical image captured after the actual operation of the circuit to be secured.
  • FIG. 4 shows a secure electronic system being formed, just before assembling a securing device 1 on a circuit to be secured.
  • the data exchange may comprise data relating to an alert signal from the security circuit 44 to the circuit to be secured 512, and a possible signal from the circuit to be secured 512 to the security circuit 44 in response to the alert signal.
EP08761341A 2007-06-29 2008-06-24 Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system Withdrawn EP2162913A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP08761341A EP2162913A1 (de) 2007-06-29 2008-06-24 Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP07301186A EP2009693A1 (de) 2007-06-29 2007-06-29 Herstellungsverfahren eines gesischerten elektronischen System, entsprechende Vorrichtung zur Schützen von einer integrierten Schaltung und entsprechendes elektronisches System
PCT/EP2008/058034 WO2009003879A1 (fr) 2007-06-29 2008-06-24 Procédé de fabrication d'un système électronique sécurisé, dispositif de sécurisation de circuit intégré et système électronique correspondants
EP08761341A EP2162913A1 (de) 2007-06-29 2008-06-24 Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system

Publications (1)

Publication Number Publication Date
EP2162913A1 true EP2162913A1 (de) 2010-03-17

Family

ID=38973063

Family Applications (2)

Application Number Title Priority Date Filing Date
EP07301186A Withdrawn EP2009693A1 (de) 2007-06-29 2007-06-29 Herstellungsverfahren eines gesischerten elektronischen System, entsprechende Vorrichtung zur Schützen von einer integrierten Schaltung und entsprechendes elektronisches System
EP08761341A Withdrawn EP2162913A1 (de) 2007-06-29 2008-06-24 Verfahren zur herstellung eines sicherheitsgeschützten elektronischen systems, entsprechende sicherheitsschutzeinrichtung integrierter schaltungen und entsprechendes elektronisches system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP07301186A Withdrawn EP2009693A1 (de) 2007-06-29 2007-06-29 Herstellungsverfahren eines gesischerten elektronischen System, entsprechende Vorrichtung zur Schützen von einer integrierten Schaltung und entsprechendes elektronisches System

Country Status (3)

Country Link
EP (2) EP2009693A1 (de)
KR (1) KR101105911B1 (de)
WO (1) WO2009003879A1 (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000067319A1 (de) * 1999-05-03 2000-11-09 Infineon Technologies Ag Verfahren und vorrichtung zur sicherung eines mehrdimensional aufgebauten chipstapels

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130059A (ja) 1984-07-20 1986-02-12 Nec Corp 半導体装置の製造方法
FR2727227B1 (fr) * 1994-11-17 1996-12-20 Schlumberger Ind Sa Dispositif de securite actif a memoire electronique
TW471144B (en) * 1995-03-28 2002-01-01 Intel Corp Method to prevent intrusions into electronic circuitry
US5824571A (en) * 1995-12-20 1998-10-20 Intel Corporation Multi-layered contacting for securing integrated circuits
DE10133855A1 (de) * 2001-07-12 2003-01-30 Giesecke & Devrient Gmbh Tragbare Datenträgeranordnung mit Sicherheitseinrichtung
US6853093B2 (en) * 2002-12-20 2005-02-08 Lipman Electronic Engineering Ltd. Anti-tampering enclosure for electronic circuitry

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000067319A1 (de) * 1999-05-03 2000-11-09 Infineon Technologies Ag Verfahren und vorrichtung zur sicherung eines mehrdimensional aufgebauten chipstapels

Also Published As

Publication number Publication date
KR101105911B1 (ko) 2012-01-17
KR20100025587A (ko) 2010-03-09
WO2009003879A1 (fr) 2009-01-08
EP2009693A1 (de) 2008-12-31

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