EP2067090B1 - Voltage reference electronic circuit - Google Patents

Voltage reference electronic circuit Download PDF

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Publication number
EP2067090B1
EP2067090B1 EP07820997A EP07820997A EP2067090B1 EP 2067090 B1 EP2067090 B1 EP 2067090B1 EP 07820997 A EP07820997 A EP 07820997A EP 07820997 A EP07820997 A EP 07820997A EP 2067090 B1 EP2067090 B1 EP 2067090B1
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Prior art keywords
current
voltage
circuit
temperature
resistor
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German (de)
French (fr)
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EP2067090A1 (en
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Thierry Masson
Jean-François Debroux
Pierre Coquille
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Teledyne e2v Semiconductors SAS
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e2v Semiconductors SAS
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • the invention relates to electronic integrated circuits and more specifically to the production of a temperature-independent voltage reference circuit, based on the properties of silicon bipolar transistors.
  • bandgap reference circuit The establishment of a reference voltage in a silicon integrated circuit most often comprises the realization of a circuit generically called a "bandgap reference circuit" because of the fact that it uses physical properties intrinsic silicon to ensure constant voltage despite temperature changes; the term bandgap refers to the difference in intrinsic energy that exists between the valence and conduction bands of silicon, a difference that is largely independent of temperature over a wide range of temperatures.
  • a bandgap reference circuit conventionally uses the combination of a base-emitter voltage of a transistor, which varies negatively (and approximately linearly) with the temperature, and a current or voltage that varies positively. (and almost linearly) with the temperature.
  • a base-emitter voltage of a transistor which varies negatively (and approximately linearly) with the temperature
  • a current or voltage that varies positively and almost linearly with the temperature.
  • the difference of the base-emitter voltages of two different emitter surface transistors, diode-mounted and powered by the same current sources is a voltage that varies positively with temperature.
  • bandgap reference circuits with temperature-dependent curvature corrections are given in the literature, for example: " A curvature corrected low-voltage bandgap reference "from Gunawan, Meijer, Fondrie, Huijsing in IEEE JSSC June 1993 ; or " A new Fahrenheit temperature sensor "by R. Pease in IEEE JSSC December 1984 . These corrections are complex.
  • CMOS technology circuits in which the bipolar transistors that are available to realize the voltage reference circuit, are PNP transistors of poor properties and widely dispersed characteristics from circuit to circuit. ; these transistors are in fact principally transistors that can be described as parasitic transistors formed from the P-type substrate, N-type wells of the PMOS transistors and source diffusions of these PMOS transistors.
  • transistors are in fact principally transistors that can be described as parasitic transistors formed from the P-type substrate, N-type wells of the PMOS transistors and source diffusions of these PMOS transistors.
  • the object of the invention is to propose a solution that improves the performance of the previous circuits.
  • the patent US 7,091,713 describes a bandgap type circuit with various compensations.
  • a voltage reference circuit having a first bandgap circuit providing a first order temperature stable voltage or current from a PTAT current generator providing a temperature proportional current.
  • this generator comprising, between a power supply and a ground, two parallel branches, one comprising a first MOS transistor in series with a bipolar transistor mounted diode, the other comprising a second MOS transistor identical to the first, a resistor and a second bipolar transistor having a transmitter area N times greater than the emitter area of the first, with a differential amplifier which drives the MOS transistors and which establishes in the resistor a voltage drop equal to the difference of the base voltages; emitter of the two bipolar transistors, characterized in that there is provided means for injecting at the junction point in be the first bipolar transistor and the first MOS transistor a current which is equal to the base current of the first bipolar transistor and means for injecting at the junction point of the second bipolar transistor and the resistor a current which is equal to the base current of the second bipolar transistor
  • the first bandgap circuit comprises, in addition to the current generator PTAT supplying a current proportional to the absolute temperature, means for producing a current which is the ratio between a bipolar transistor base-emitter voltage and a resistance value. this current being applied to an input of an operational amplifier of the summator.
  • the circuit (called “thermometer” circuit) providing a voltage proportional to the difference (T-Tr) preferably comprises a current generator proportional to the absolute temperature (which may be the same as the previous one), means for applying this current a resistor and a bipolar transistor, and a differential amplifier for establishing a voltage which is the difference between the base-emitter voltage of this bipolar transistor and the voltage drop across the resistor.
  • the reference temperature is preferably the ambient temperature of about 25 ° C.
  • PNP bipolar transistors T1 and T2 and PMOS transistors Q1 and Q2 form with a differential amplifier A1 the core of a current generator PTAT, that is to say a circuit providing a current proportional to the absolute temperature T.
  • Transistors T1 and T2 are of different emitter surfaces, transistor T2 having a surface N times greater than that of transistor T1.
  • Transistors Q1 and Q2 are identical and constitute variable but identical current sources. Their grids are brought to the same variable potential and their source is at a supply voltage Vdd.
  • the transistor T1 is diode-mounted between the drain of Q1 and GND mass: T1 base and collector are joined and connected to ground, the transmitter is connected to the drain of Q1.
  • the assembly is the same for T2 and Q2 but a resistor R2 is interposed between the drain of T2 and the emitter of Q2.
  • the differential amplifier A1 has its two inputs respectively connected to the drains of Q1 and Q2; it carries out a counter-reaction by acting on the common potential of the gates of these two transistors, therefore on the identical currents which cross them, until finding a point of equilibrium where the potentials of the two drains are identical (at the voltage of input offset near the amplifier).
  • the circuit of the figure 1 therefore constitutes a current generator I2 of value proportional to the absolute temperature and varying linearly and positively with the temperature.
  • a resistor R3 is connected between the drain of Q3 and the emitter of a PNP transistor T3 diode-mounted like T1 and T2, having its collector and base grounded.
  • the series assembly Q3, R3, T3 is thus mounted as the set Q2, R2, T2 and the current flowing through the resistor R3 is identical to the current I2 which flows through R2.
  • the coefficient of positive variation with temperature is (k / q) (LogN) R3 / R2.
  • the negative variation of the base-emitter voltage Vbe3 of the transistor T3 depends on the technological parameters of the transistor. It is linear in the first order, and the order of magnitude of the coefficient of variation is, for example, -2mV / ° C. It can be determined experimentally for a given technology. Therefore, by correctly choosing the resistor R3 and adding the voltage R3.I2 and the voltage Vbe of the transistor T3, it is possible to obtain a voltage having a zero overall coefficient of variation at the first order.
  • the value chosen for R3 for this purpose obviously depends on the values chosen for N and for R2 as well as on the emitter surface of transistor T3.
  • FIG. 3 Another example of embodiment is shown in the figure 3 ; this circuit works in a very similar way to that of the figure 2 and it is shown here because it is easier to use in the architecture of the present invention.
  • this example instead of adding two voltages Vbe3 and R3.12 in a branch Q3, R3, T3 as was the case in the figure 2 , two currents are added before converting the sum of these currents into a voltage EG (T).
  • T voltage EG
  • a differential amplifier A2 controls the gate of a PMOS transistor Q4 which is in series with a resistor R4, so as to pass in the resistor R4 a current such that the voltage drop in this resistor is equal to the base-emitter voltage Vbe2 of transistor T2.
  • This assembly therefore converts the voltage Vbe2 into a current Vbe2 / R4 in the resistor R4 and in the transistor Q4.
  • a PMOS transistor Q5 copies the current Vbe2 / R4 passing through Q4 (same gate voltage as Q4, same source voltage Vdd); another PMOS transistor Q6 copies the current 12 which passes into the transistor Q2 (same gate voltage as Q2, same source voltage Vdd).
  • the currents of Q5 and Q6, respectively equal to Vbe2 / R4 and 12 (kT / q) (LogN) / R2 are summed in a load resistor R6.
  • the load resistor is connected between the combined drains of Q5 and Q6 and the mass. It will be seen that the load resistor can also be an input resistor or a loopback resistor of an operational amplifier.
  • the figure 8 represents the principle of the present invention.
  • the PNP transistors may be of poor quality and in particular they may have a gain in low beta current and highly dispersed. This is particularly the case when the voltage reference circuit is made in a CMOS technology where the only available bipolar transistors are PNP transistors formed between the P-type substrate, the N-type wells and the source and drain diffusions. PMOS formed in these boxes. These transistors are of poor quality. That is why it is preferable to provide a compensation circuit of the PTAT current generator, which will be described with reference to the figure 8 .
  • the circuit represented at figure 8 includes, on its right side, the PTAT current generator of the figure 1 and on its left side the compensation circuit whose function is to inject into the emitter of the transistor T1 and into the emitter of the transistor T2 a current equal to the base current Ib which flows through these transistors when the resistor R2 is traveled. by the current 12 proportional to the absolute temperature. By injecting these currents, it is ensured that the equal currents flowing through Q1 and Q2 and thus the current I2 passing through the resistor R2 are not the emitter current of the transistors T1 and T2 but are the collector current Ic.
  • the operating equations of the PTAT generator are based on the calculation of the collector currents of the transistors T1 and T2 of different size. This does not matter when the current gain is high because the difference between the collector current and the emitter current is insignificant. This is more important when the gain is low. With the compensation introduced, the PTAT generator is actually operated from collector currents even if the gain is small.
  • the current I2 in Q1 is copied into a branch Q10, T10.
  • the transistor Q10 is identical to Q1 and has its gate and its source at the same potentials as the gate and the source of Q1.
  • Transistor T10 is identical to T1 and has its emitter connected to ground like T1.
  • the base of T10 is not connected directly to the mass as that of T1, it is connected to ground by means of a NMOS transistor Q11 mounted diode. This transistor Q11 is therefore traversed by a current Ib which is the basic current of T10, identical to the basic current of T1.
  • a transistor Q16 copies the current Ib of the transistor Q13 to inject it at the junction point of the transistors Q10 and T10.
  • the current I2 in the transistors Q1 and Q2 is indeed a collector current of the transistors T1 and T2.
  • the result is an operation in which the current proportional to the temperature is a transistor collector current and not an emitter current as in the conventional diagrams, so that it is insensitive to the fact that the current gain of PNP transistors are small and scattered.
  • the transistors were NPN.
  • This current gain compensation of the PMOS transistors of the PTAT generator can be applied to a more complex voltage reference circuit in which it is sought to compensate for the curvatures of the reference voltage variation as a function of the temperature towards the highest temperatures. or the lowest.
  • the figure 4 represents the principle of obtaining a stable reference voltage.
  • a heart circuit C1 bandgap such as that of the figure 2 or the figure 3 that is to say, using the summation of a voltage Vbe and a voltage proportional to the absolute temperature and giving a reference voltage (or a current) stable in the first order; and we add to the sum EG (T) thus obtained two other voltages, one of which, denoted by E2 (T), comes from a circuit C2 called “thermometer circuit” and the other, denoted by E3 (T) is derived from a circuit C3 of elevation squared which raises squared voltage from the thermometer circuit.
  • thermometer circuit is meant a circuit capable of establishing a voltage proportional to the difference T-Tr between the absolute temperature T and a reference temperature Tr; the temperature Tr can be the standard ambient temperature of 25 ° C.
  • the squaring circuit is, in turn, capable of establishing a voltage proportional to (T-Tr) 2 from a voltage supplied by the thermometer circuit.
  • the weighting coefficients are chosen to make the output voltage of the summator as constant as possible in the presence of temperature variations.
  • the coefficient G1 can be chosen arbitrarily equal to 1, adjustment parameters such as the value of R6 making it possible to adjust the level of EG (T).
  • EG (Tr) is a value fixed, which is the theoretical value that one would like to have at all temperatures but that in fact only has the reference temperature Tr.
  • thermometer circuit C2 and the squaring circuit C3 are intended to compensate for these output voltage variations of the circuit C1.
  • circuit C1 supplies an output current rather than a voltage EG (T)
  • this current is converted into voltage in a resistor of the adder ADD.
  • the coefficients G2 and G3 are negative if a, b, k1 and k2 are positive. But it must be provided in particular that the signs of a and b may be arbitrary, and it will be provided that the coefficients G2 and G3 may be of negative sign (or alternatively that the outputs E2 (T) and E3 (T) may be have an inverted sign if necessary).
  • the figure 5 is a practical diagram taking up the heart of the bandgap circuit of the figure 3 and showing how one can perform the desired linear combination using an operational amplifier and several summing resistors.
  • the circuit C1 supplies an output current which is the sum of the currents flowing in the transistors Q5 and Q6: (kT / q) (LogN) / R2 + Vbe2 / R4
  • the other input E2 of the amplifier is brought to a reference potential VG (which may be the ground GND or preferably the midpoint between the low supply GND and the high supply Vdd).
  • the potential VG is, as will be seen, the reference with respect to which the thermometer circuit C2 provides a voltage proportional to T-Tr, and the circuit C3 provides a voltage proportional to the square of T-Tr. That is why this potential must also serve as a reference in the adder ADD placed at the output of the circuit C1.
  • the loopback resistor Rs1 converts the current passing through it into voltage (like the resistor R6 of the figure 3 ).
  • the current flowing through it is such that the sum of the currents entering on the node E1 is zero.
  • This sum comprises the currents originating from transistors Q5 and Q6 (currents Vbe2 / R4 and 12), the current in resistor Rs1 and two currents injected, through a resistor Rs2 and a resistor Rs3 respectively, by the voltage outputs of the thermometer circuit.
  • the resistor Rs2 defines the weighting coefficient G2 corresponding to the circuit C2.
  • This resistor Rs2 is placed between the output of the circuit C2 and the input E1 of the operational amplifier AO.
  • the circuits C2 and C3 provide low output impedance voltages and impose their output potential on the resistors Rs2 and Rs3.
  • the circuits C2 and C3 provide referenced voltages with respect to the voltage VG.
  • the circuit C2 provides a voltage E2 (T) which is equal to k2 (T-Tr).
  • the circuit C3 provides a voltage E3 (T) which is equal to k3 (T-Tr) 2 .
  • the operation of the operational amplifier is conventional: the sum of the currents arriving at its input E1 is zero, and the voltage at this input is equal to the voltage at the input E2, that is to say at VG.
  • Vref the output voltage (referenced with respect to the reference potential VG) of the amplifier AO
  • Vref the output voltage (referenced with respect to the reference potential VG) of the amplifier AO
  • Vref - Rs ⁇ 1 ⁇ I ⁇ 2 + Vbe / 4 - E ⁇ 2 T ⁇ Rs ⁇ 1 / Rs ⁇ 2 - E ⁇ 3 T ⁇ Rs ⁇ 1 / Rs ⁇ 3
  • Rs1 is set in principle according to the value that it is desired to give to the reference voltage Vref at the reference temperature Tr. This value is -Rs1 [I2 + Vbe2 / R4] measured at the reference temperature and which is EG (Tr) according to the notation previously used.
  • thermometer circuit C2 can be constituted for example as follows, as shown in FIG. figure 6 it comprises a current generator proportional to the absolute temperature (PTAT); this generator can be the one used in the circuit C1 to establish the current or the constant voltage to the first order. It is therefore composed of PNP transistors T1, T2, differential amplifier A1, resistor R2, and current sources constituted by PMOS transistors Q1, Q2 whose gates are connected to the output of differential amplifier A1. .
  • PTAT absolute temperature
  • the current I2 proportional to the absolute temperature is copied by a PMOS transistor Q7 and a PMOS transistor Q8 which both have the same source and gate potential as Q1 and Q2.
  • Transistor Q7 supplies a resistor R7.
  • the resistor R7 is connected between the drain of the transistor Q7 and the output of a differential amplifier A3.
  • Transistor Q8 feeds a diode-mounted bipolar transistor T8 having its emitter connected to the drain of Q8 and its collector and base connected to the reference potential VG.
  • the differential amplifier A3 has a first input connected to the point of junction of R7 and Q7 and a second input connected to the junction point of Q8 and T8.
  • the differential amplifier A3 establishes a voltage which is the difference between the base-emitter voltage of this bipolar transistor (traversed by a current proportional to the temperature) and the voltage drop across the resistor (traversed by a current proportional to the temperature).
  • the resistor R7 is adjustable to adjust the thermometer circuit such that the output voltage E2 (T) is zero for the reference temperature Tr, that is to say that the output of the amplifier A3 is equal at VG for this temperature.
  • an additional operational amplifier mounted in an analog inverter can be provided at the output of the amplifier A3.
  • the output of the additional amplifier or the output of the amplifier A3 will be used according to the sign of a, the choice being made during the circuit test; the adjustment of the resistance R7 is also done during the test.
  • thermometer circuit To produce a signal proportional to (T-Tr) 2 the thermometer circuit is used, and its output voltage E2 (T) is applied to a squaring circuit which uses the same potential reference VG.
  • a current equal to the difference between the current of the source SC3 and the current of the transistor Q30 is extracted from the junction point between the source SC3 of value Io and the drain of transistor Q30. This difference is equal to [E2 (T)] 2 /4.(R21) 2 .Io
  • the voltage E3 (T) is practically proportional to the square of E2 (T), therefore to the square of T-Tr, provided, however, that Io is approximately independent of the temperature. To obtain this result, it is arranged to realize the current sources of value Io and 2Io from the ratio between a voltage approximately independent of the temperature and a bias resistor Rpol.
  • the voltage approximately independent of the temperature is preferably the output voltage EG from the bandgap circuit core.
  • an inverting operational amplifier can be placed at the output of the amplifier A4. The output of one or the other of these amplifiers will be chosen on the test.

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Abstract

The invention relates to a temperature-independent voltage reference circuit. The circuit comprises a first circuit of bandgap type providing a first-order temperature-stable voltage, on the basis of a bipolar transistor base-emitter voltage having a negative slope of variation as a function of temperature, and of a voltage or a current having a positive slope of variation as a function of temperature provided by a generator of current proportional to absolute temperature. The base currents of the PMOS transistors thereof are compensated in such a manner that the output current is proportional to a collector current and not an emitter current. A summator establishes a linear combination, with respective weighting coefficients, of three voltages which are respectively the output voltage of the first circuit, the output voltage of a second circuit providing a voltage proportional to the difference between the absolute temperature T and a reference temperature Tr, and the output voltage of a third circuit providing a voltage proportional to the square of this difference.

Description

L'invention concerne les circuits intégrés électroniques et plus précisément elle concerne la réalisation d'un circuit de référence de tension indépendante de la température, fondé sur les propriétés des transistors bipolaires en silicium.The invention relates to electronic integrated circuits and more specifically to the production of a temperature-independent voltage reference circuit, based on the properties of silicon bipolar transistors.

L'établissement d'une tension de référence dans un circuit intégré sur silicium comprend le plus souvent la réalisation d'un circuit appelé d'une manière générique "circuit de référence de type bandgap" en raison du fait qu'il utilise des propriétés physiques intrinsèques du silicium pour assurer une constance de la tension malgré les variations de température ; le terme bandgap fait référence à la différence d'énergie intrinsèque qui existe entre les bandes de valence et de conduction du silicium, différence qui ne dépend pratiquement pas de la température dans une large gamme de températures.The establishment of a reference voltage in a silicon integrated circuit most often comprises the realization of a circuit generically called a "bandgap reference circuit" because of the fact that it uses physical properties intrinsic silicon to ensure constant voltage despite temperature changes; the term bandgap refers to the difference in intrinsic energy that exists between the valence and conduction bands of silicon, a difference that is largely independent of temperature over a wide range of temperatures.

Un circuit de référence de type bandgap utilise classiquement la combinaison d'une tension base-émetteur d'un transistor, qui varie négativement (et à peu près linéairement) avec la température, et d'un courant ou d'une tension qui varie positivement (et à peu près linéairement) avec la température. Par exemple, la différence des tensions base-émetteur de deux transistors de surfaces d'émetteur différentes, montés en diode et alimentés par des sources de courant identiques, est une tension qui varie positivement avec la température.A bandgap reference circuit conventionally uses the combination of a base-emitter voltage of a transistor, which varies negatively (and approximately linearly) with the temperature, and a current or voltage that varies positively. (and almost linearly) with the temperature. For example, the difference of the base-emitter voltages of two different emitter surface transistors, diode-mounted and powered by the same current sources, is a voltage that varies positively with temperature.

Le résultat de cette combinaison n'est cependant pas parfait sur une large gamme de température, notamment une gamme qui irait de -50°C à +120°C : on constate que même avec des circuits de compensation et avec les réglages les plus fins des paramètres du circuit (tailles de transistors, valeurs de résistances, de courants, etc.) on aboutit à une courbe de variation de tension à peu près plate vers les températures ambiantes mais qui se courbe tant pour les températures basses que pour les températures élevées.The result of this combination is however not perfect over a wide range of temperatures, including a range that goes from -50 ° C to + 120 ° C: it can be seen that even with compensation circuits and with the finest adjustments circuit parameters (transistor sizes, resistor values, currents, etc.) result in a nearly flat voltage variation curve to ambient temperatures but which bends for both low temperatures and high temperatures .

On trouvera dans la littérature des exemples de circuits de référence de type bandgap avec des corrections de courbure en fonction de la température, par exemple : " A curvature corrected low-voltage bandgap reference", de Gunawan, Meijer, Fondrie, Huijsing dans IEEE JSSC Juin 1993 ; ou encore " A new Fahrenheit temperature Sensor", de R. Pease dans IEEE JSSC Décembre 1984 . Ces corrections sont complexes.Examples of bandgap reference circuits with temperature-dependent curvature corrections are given in the literature, for example: " A curvature corrected low-voltage bandgap reference "from Gunawan, Meijer, Fondrie, Huijsing in IEEE JSSC June 1993 ; or " A new Fahrenheit temperature sensor "by R. Pease in IEEE JSSC December 1984 . These corrections are complex.

Le problème est rendu plus critique pour des circuits de technologie CMOS, dans lesquels les transistors bipolaires qui sont disponibles pour réaliser le circuit de référence de tension, sont des transistors PNP de propriétés médiocres et de caractéristiques très dispersées d'un circuit à l'autre ; ces transistors sont en effet principalement des transistors qu'on peut qualifier de transistors parasites constitués à partir du substrat de type P, des caissons de type N des transistors PMOS et des diffusions de source de ces transistors PMOS. Or il est important de pouvoir réaliser des tensions stables en température même dans des circuits de technologie CMOS qui n'ont pas d'autres transistors bipolaires disponibles.The problem is made more critical for CMOS technology circuits, in which the bipolar transistors that are available to realize the voltage reference circuit, are PNP transistors of poor properties and widely dispersed characteristics from circuit to circuit. ; these transistors are in fact principally transistors that can be described as parasitic transistors formed from the P-type substrate, N-type wells of the PMOS transistors and source diffusions of these PMOS transistors. However, it is important to be able to achieve stable temperature voltages even in CMOS technology circuits that do not have other bipolar transistors available.

De manière générale, l'obtention d'une tension de référence précise et reproductible, stable sur une large gamme de températures (-50°C à +120°C), pose des problèmes. L'invention a pour but de proposer une solution qui améliore les performances des circuits antérieurs. Le brevet US 7 091 713 décrit un circuit de type bandgap avec diverses compensations.In general, obtaining a precise and reproducible reference voltage, stable over a wide range of temperatures (-50 ° C. to + 120 ° C.), poses problems. The object of the invention is to propose a solution that improves the performance of the previous circuits. The patent US 7,091,713 describes a bandgap type circuit with various compensations.

Selon l'invention, on propose un circuit de référence de tension, comportant un premier circuit de type bandgap fournissant une tension ou un courant stable en température au premier ordre, à partir d'un générateur de courant PTAT fournissant un courant proportionnel à la température absolue, ce générateur comprenant, entre une alimentation et une masse, deux branches parallèles, l'une comprenant un premier transistor MOS en série avec un transistor bipolaire monté en diode, l'autre comprenant un deuxième transistor MOS identique au premier, une résistance et un deuxième transistor bipolaire ayant une surface d'émetteur N fois plus grande que la surface d'émetteur du premier, avec un amplificateur différentiel qui commande les transistors MOS et qui établit dans la résistance une chute de tension égale à la différence des tensions base-émetteur des deux transistors bipolaires, caractérisé en ce qu'il est prévu des moyens pour injecter au point de jonction entre le premier transistor bipolaire et le premier transistor MOS un courant qui est égal au courant de base du premier transistor bipolaire et des moyens pour injecter au point de jonction du deuxième transistor bipolaire et de la résistance un courant qui est égal au courant de base du deuxième transistor bipolaire, de manière que le courant de sortie du générateur de courant proportionnel à la température soit égal au courant de collecteur et non au courant d'émetteur du deuxième transistor bipolaire.According to the invention there is provided a voltage reference circuit having a first bandgap circuit providing a first order temperature stable voltage or current from a PTAT current generator providing a temperature proportional current. absolute, this generator comprising, between a power supply and a ground, two parallel branches, one comprising a first MOS transistor in series with a bipolar transistor mounted diode, the other comprising a second MOS transistor identical to the first, a resistor and a second bipolar transistor having a transmitter area N times greater than the emitter area of the first, with a differential amplifier which drives the MOS transistors and which establishes in the resistor a voltage drop equal to the difference of the base voltages; emitter of the two bipolar transistors, characterized in that there is provided means for injecting at the junction point in be the first bipolar transistor and the first MOS transistor a current which is equal to the base current of the first bipolar transistor and means for injecting at the junction point of the second bipolar transistor and the resistor a current which is equal to the base current of the second bipolar transistor, so that the output current of the current generator proportional to the temperature is equal to the collector current and not the emitter current of the second bipolar transistor.

Le premier circuit de type bandgap fournit un courant ou une tension stable en température au premier ordre à partir

  • d'une tension base-émetteur de transistor bipolaire ayant une pente de variation négative en fonction de la température
  • et du courant issu du générateur de courant PTAT (ayant une pente de variation positive en fonction de la température).
The first bandgap circuit provides a stable first-order temperature current or voltage from
  • a bipolar transistor base-emitter voltage having a negative variation slope as a function of temperature
  • and current from the PTAT current generator (having a slope of positive variation as a function of temperature).

Le circuit de référence de tension comprend de préférence un sommateur pour établir une combinaison linéaire, avec des coefficients de pondération respectifs, de trois valeurs qui sont respectivement

  • la tension ou le courant de sortie du premier circuit de type bandgap,
  • la tension ou le courant de sortie d'un deuxième circuit fournissant une tension ou un courant proportionnel à la différence entre la température absolue T et une température de référence Tr,
  • la tension ou le courant de sortie d'un troisième circuit fournissant une tension ou un courant proportionnel au carré de cette différence.
The voltage reference circuit preferably comprises an adder to establish a linear combination, with respective weighting coefficients, of three values which are respectively
  • the voltage or the output current of the first bandgap circuit,
  • the output voltage or current of a second circuit providing a voltage or current proportional to the difference between the absolute temperature T and a reference temperature Tr,
  • the output voltage or current of a third circuit providing a voltage or current proportional to the square of this difference.

De préférence, le premier circuit de type bandgap comprend, outre le générateur de courant PTAT fournissant un courant proportionnel à la température absolue, des moyens pour produire un courant qui est le rapport entre une tension base-émetteur de transistor bipolaire et une valeur de résistance, ce courant étant appliqué à une entrée d'un amplificateur opérationnel du sommateur.Preferably, the first bandgap circuit comprises, in addition to the current generator PTAT supplying a current proportional to the absolute temperature, means for producing a current which is the ratio between a bipolar transistor base-emitter voltage and a resistance value. this current being applied to an input of an operational amplifier of the summator.

Le circuit (dit circuit « thermomètre ») fournissant une tension proportionnelle à la différence (T-Tr) comprend de préférence un générateur de courant proportionnel à la température absolue (qui peut être le même que le précédent), des moyens pour appliquer ce courant à une résistance et à un transistor bipolaire, et un amplificateur différentiel pour établir une tension qui est la différence entre la tension base-émetteur de ce transistor bipolaire et la chute de tension aux bornes de la résistance.The circuit (called "thermometer" circuit) providing a voltage proportional to the difference (T-Tr) preferably comprises a current generator proportional to the absolute temperature (which may be the same as the previous one), means for applying this current a resistor and a bipolar transistor, and a differential amplifier for establishing a voltage which is the difference between the base-emitter voltage of this bipolar transistor and the voltage drop across the resistor.

La température de référence est de préférence la température ambiante d'environ 25°C.The reference temperature is preferably the ambient temperature of about 25 ° C.

D'autres caractéristiques et avantages de l'invention apparaîtront à la lecture de la description détaillée qui suit et qui est faite en référence aux dessins annexés dans lesquels :

  • la figure 1 représente le principe de base d'un circuit de type PTAT établissant un courant proportionnel à la température absolue, réalisé dans une technologie CMOS et utilisant les transistors PNP parasites de cette technologie ;
  • la figure 2 représente le principe de base d'un circuit de type bandgap fondé sur l'équilibre au premier ordre entre la variation négative d'une tension base-émetteur de transistor bipolaire et la variation positive d'un courant de circuit de type PTAT ;
  • la figure 3 représente un autre exemple de réalisation de circuit de type bandgap
  • la figure 4 représente l'architecture générale d'un circuit de référence de tension stable en température selon l'invention ;
  • la figure 5 représente l'utilisation d'un circuit classique de type bandgap, dans l'architecture selon l'invention ;
  • la figure 6 représente un exemple de réalisation de circuit dit circuit "thermomètre" fournissant une tension proportionnelle à T-Tr ;
  • la figure 7 représente un exemple de réalisation d'un circuit d'élévation au carré de la tension de sortie du circuit thermomètre ;
  • la figure 8 représente un schéma de circuit permettant d'améliorer le comportement du circuit en éliminant l'influence néfaste du mauvais gain en courant des transistors bipolaires PNP utilisés dans le circuit lorsque celui-ci est réalisé dans une technologie purement CMOS.
Other features and advantages of the invention will appear on reading the detailed description which follows and which is given with reference to the appended drawings in which:
  • the figure 1 represents the basic principle of a PTAT circuit establishing a current proportional to the absolute temperature, realized in a CMOS technology and using PNP transistors parasites of this technology;
  • the figure 2 represents the basic principle of a bandgap-based circuit based on the first-order equilibrium between the negative variation of a bipolar transistor base-emitter voltage and the positive variation of a PTAT-type circuit current;
  • the figure 3 represents another embodiment of a bandgap type circuit
  • the figure 4 represents the general architecture of a temperature-stable voltage reference circuit according to the invention;
  • the figure 5 represents the use of a conventional bandgap circuit, in the architecture according to the invention;
  • the figure 6 represents an exemplary circuit embodiment "thermometer" circuit providing a voltage proportional to T-Tr;
  • the figure 7 represents an exemplary embodiment of a squaring circuit of the output voltage of the thermometer circuit;
  • the figure 8 is a circuit diagram for improving the behavior of the circuit by eliminating the detrimental influence of the bad current gain of PNP bipolar transistors used in the circuit when it is realized in a purely CMOS technology.

Sur la figure 1, les transistors bipolaires PNP T1 et T2 et les transistors PMOS Q1 et Q2 forment avec un amplificateur différentiel A1 le coeur d'un générateur de courant PTAT, c'est-à-dire un circuit fournissant un courant proportionnel à la température absolue T. Les transistors T1 et T2 sont de surfaces d'émetteur différentes, le transistor T2 ayant une surface N fois supérieure à celle du transistor T1. Les transistors Q1 et Q2 sont identiques et constituent des sources de courant variables mais identiques. Leurs grilles sont portées à un même potentiel variable et leur source est à une tension d'alimentation Vdd. Le transistor T1 est monté en diode entre le drain de Q1 et une masse GND : base et collecteur de T1 sont réunis et reliés à la masse, l'émetteur est relié au drain de Q1. Le montage est le même pour T2 et Q2 mais une résistance R2 est interposée entre le drain de T2 et l'émetteur de Q2. L'amplificateur différentiel A1 a ses deux entrées reliées respectivement aux drains de Q1 et Q2 ; il réalise une contre-réaction en agissant sur le potentiel commun des grilles de ces deux transistors, donc sur les courants identiques qui les traversent, jusqu'à trouver un point d'équilibre où les potentiels des deux drains sont identiques (à la tension de décalage d'entrée près de l'amplificateur). La chute de tension R2.I2 dans la résistance R2 compense alors exactement la différence ΔVbe entre les tensions base-émetteur de T1 et T2 ; or on sait que cette différence est proportionnelle à la température absolue et au logarithme népérien du rapport N entre leurs surfaces d'émetteur si les deux transistors T1 et T2 sont de même technologie et placés dans les mêmes conditions de température ; l'équation est : ΔVbe = kT / q LogN

Figure imgb0001

k est la constante de Boltzmann, q la charge de l'électron, T la température absolue, N le rapport des surfaces d'émetteur.On the figure 1 , PNP bipolar transistors T1 and T2 and PMOS transistors Q1 and Q2 form with a differential amplifier A1 the core of a current generator PTAT, that is to say a circuit providing a current proportional to the absolute temperature T. Transistors T1 and T2 are of different emitter surfaces, transistor T2 having a surface N times greater than that of transistor T1. Transistors Q1 and Q2 are identical and constitute variable but identical current sources. Their grids are brought to the same variable potential and their source is at a supply voltage Vdd. The transistor T1 is diode-mounted between the drain of Q1 and GND mass: T1 base and collector are joined and connected to ground, the transmitter is connected to the drain of Q1. The assembly is the same for T2 and Q2 but a resistor R2 is interposed between the drain of T2 and the emitter of Q2. The differential amplifier A1 has its two inputs respectively connected to the drains of Q1 and Q2; it carries out a counter-reaction by acting on the common potential of the gates of these two transistors, therefore on the identical currents which cross them, until finding a point of equilibrium where the potentials of the two drains are identical (at the voltage of input offset near the amplifier). The voltage drop R2.I2 in the resistor R2 then compensates exactly the difference ΔVbe between the base-emitter voltages of T1 and T2; it is known that this difference is proportional to the absolute temperature and the natural logarithm of the ratio N between their emitter surfaces if the two transistors T1 and T2 are of the same technology and placed under the same temperature conditions; the equation is: ΔVbe = kT / q LOGN
Figure imgb0001

k is the Boltzmann constant, q the charge of the electron, T the absolute temperature, N the ratio of the emitter surfaces.

Il en résulte que le courant I2 traversant la résistance R2 s'ajuste automatiquement à une valeur de la formeAs a result, the current I2 traversing the resistor R2 automatically adjusts to a value of the form

12= (kT/q)(LogN)/R2 (pour des transistors ayant un gain en courant suffisamment élevé pour que le courant de base soit négligeable devant le courant de collecteur).12 = (kT / q) (LogN) / R2 (for transistors having a current gain sufficiently high so that the base current is negligible in front of the collector current).

Le circuit de la figure 1 constitue donc un générateur de courant I2 de valeur proportionnelle à la température absolue et variant linéairement et positivement avec la température.The circuit of the figure 1 therefore constitutes a current generator I2 of value proportional to the absolute temperature and varying linearly and positively with the temperature.

A partir de ce courant 12, à variation positive, et d'une résistance R3, on peut facilement réaliser une tension à variation positive R3.I2, et on peut ajouter à la tension R3.I2 une tension base-émetteur de transistor bipolaire qui varie négativement avec la température.From this current 12, with a positive variation, and a resistor R3, it is easy to realize a voltage with a positive variation R3.I2, and it is possible to add to the voltage R3.I2 a base-emitter voltage of a bipolar transistor which varies negatively with temperature.

Cette addition de deux tensions à sens de variation inverses est réalisée par exemple par le circuit de la figure 2 : la partie gauche de la figure 2 reprend exactement le circuit de la figure 1 et constitue un générateur de courant PTAT. Le courant 12 est recopié par un transistor PMOS Q3 monté en miroir de courant des transistors Q1 et Q2 (même potentiel de source Vdd, même potentiel de grille fourni par la sortie de l'amplificateur A1). Le transistor Q3 est de préférence identique aux transistors Q1 et Q2 mais ce n'est pas obligatoire ; s'il ne leur est pas identique il faut en tenir compte dans les calculs.This addition of two inverse direction of variation voltages is carried out for example by the circuit of the figure 2 : the left part of the figure 2 exactly resume the circuit of the figure 1 and constitutes a PTAT current generator. The current 12 is copied by a PMOS transistor Q3 mounted in current mirror of the transistors Q1 and Q2 (same source potential Vdd, same gate potential provided by the output of amplifier A1). The transistor Q3 is preferably identical to the transistors Q1 and Q2 but it is not mandatory; if it is not identical to them, it must be taken into account in the calculations.

Une résistance R3 est reliée entre le drain de Q3 et l'émetteur d'un transistor PNP T3 monté en diode comme T1 et T2, ayant son collecteur et sa base reliés à la masse. L'ensemble en série Q3, R3, T3 est donc monté comme l'ensemble Q2, R2, T2 et le courant qui parcourt la résistance R3 est identique au courant I2 qui parcourt R2.A resistor R3 is connected between the drain of Q3 and the emitter of a PNP transistor T3 diode-mounted like T1 and T2, having its collector and base grounded. The series assembly Q3, R3, T3 is thus mounted as the set Q2, R2, T2 and the current flowing through the resistor R3 is identical to the current I2 which flows through R2.

Le potentiel du point de jonction de Q3 et R3 est donc la somme de la tension base-émetteur Vbe3 de T3 et de la chute de tension R3.I2 qui a pour valeur R3.I2 = (kT/q)(LogN)R3/R2. On notera que seul le rapport des résistances joue un rôle dans la valeur de la chute de tension R3.12, ce rapport étant pratiquement indépendant de la température. Le coefficient de variation positive avec la température est (k/q)(LogN)R3/R2.The potential of the junction point of Q3 and R3 is thus the sum of the base-emitter voltage Vbe3 of T3 and of the voltage drop R3.I2 which has the value R3.I2 = (kT / q) (LogN) R3 / R2. It will be noted that only the ratio of the resistors plays a role in the value of the voltage drop R3.12, this ratio being practically independent of the temperature. The coefficient of positive variation with temperature is (k / q) (LogN) R3 / R2.

La variation négative de la tension base-émetteur Vbe3 du transistor T3 dépend de paramètres technologiques du transistor. Elle est linéaire au premier ordre, et l'ordre de grandeur du coefficient de variation est par exemple de -2mV/°C. Il peut être déterminé expérimentalement pour une technologie donnée. Par conséquent, en choisissant correctement la résistance R3 et en additionnant la tension R3.I2 et la tension Vbe du transistor T3, on peut aboutir à une tension ayant un coefficient de variation global nul au premier ordre. La valeur choisie pour R3 dans ce but dépend évidemment des valeurs choisies pour N et pour R2 ainsi que de la surface d'émetteur du transistor T3.The negative variation of the base-emitter voltage Vbe3 of the transistor T3 depends on the technological parameters of the transistor. It is linear in the first order, and the order of magnitude of the coefficient of variation is, for example, -2mV / ° C. It can be determined experimentally for a given technology. Therefore, by correctly choosing the resistor R3 and adding the voltage R3.I2 and the voltage Vbe of the transistor T3, it is possible to obtain a voltage having a zero overall coefficient of variation at the first order. The value chosen for R3 for this purpose obviously depends on the values chosen for N and for R2 as well as on the emitter surface of transistor T3.

Le circuit de la figure 2 est un circuit qu'on peut appeler "coeur de circuit bandgap" et la tension EG(T)=R3(kT/q)(LogN)/R2 + Vbe3 qui apparaît entre la sortie de ce circuit et la masse est une tension qui, au premier ordre, est indépendante de la température.The circuit of the figure 2 is a circuit that can be called "heart bandgap circuit" and the voltage EG (T) = R3 (kT / q) (LogN) / R2 + Vbe3 that appears between the output of this circuit and the ground is a voltage that , at the first order, is independent of the temperature.

Toutefois, il y a des effets du deuxième ou du troisième ordre qui font que la tension EG(T) présente une certaine dispersion de fabrication et n'est pas complètement constante avec la température ; ceci est d'autant plus vrai que la qualité des transistors PNP est plus mauvaise. Or, dans beaucoup de circuits de technologie MOS, on ne dispose que de transistors PNP de mauvaise qualité (transistors à faible béta, c'est-à-dire à faible gain en courant). La tension de décalage d'entrée de l'amplificateur différentiel A1 est aussi un facteur qui détériore la constance de la tension de sortie EG(T).However, there are second- or third-order effects that cause the EG (T) voltage to exhibit some manufacturing dispersion and is not completely constant with temperature; this is all the more true as the quality of the PNP transistors is worse. However, in many MOS technology circuits, only PNP transistors of poor quality are available (low beta transistors, ie low gain transistors). while running). The input offset voltage of the differential amplifier A1 is also a factor which deteriorates the constancy of the output voltage EG (T).

Un autre exemple de réalisation est montré à la figure 3 ; ce circuit fonctionne d'une manière très semblable à celui de la figure 2 et il est présenté ici car il est plus facile à utiliser dans l'architecture de la présente invention. Dans cet exemple, au lieu d'additionner deux tensions Vbe3 et R3.12 dans une branche Q3, R3, T3 comme c'était le cas à la figure 2, on effectue une addition de deux courants avant de convertir la somme de ces courants en une tension EG(T). On obtient un résultat très similaire en termes d'addition de tensions dont l'une varie positivement et l'autre varie négativement. Les éléments identiques à ceux de la figure 2 portent les mêmes références et jouent le même rôle ; il s'agit principalement du générateur PTAT qui établit un courant 12 = (kT/q)(LogN)/R2 à partir des transistors T1 et T2 de surfaces d'émetteur différentes.Another example of embodiment is shown in the figure 3 ; this circuit works in a very similar way to that of the figure 2 and it is shown here because it is easier to use in the architecture of the present invention. In this example, instead of adding two voltages Vbe3 and R3.12 in a branch Q3, R3, T3 as was the case in the figure 2 , two currents are added before converting the sum of these currents into a voltage EG (T). A very similar result is obtained in terms of the addition of voltages, one of which varies positively and the other of which varies negatively. Elements identical to those of the figure 2 have the same references and play the same role; it is mainly the PTAT generator which establishes a current 12 = (kT / q) (LogN) / R2 from the transistors T1 and T2 of different emitter surfaces.

Un amplificateur différentiel A2 contrôle la grille d'un transistor PMOS Q4 qui est en série avec une résistance R4, de manière à faire passer dans la résistance R4 un courant tel que la chute de tension dans cette résistance soit égale à la tension base-émetteur Vbe2 du transistor T2. Pour cela, l'amplificateur différentiel A2, à grand gain, reçoit la différence entre la tension aux bornes de R4 et la tension base-émetteur Vbe2 ; le courant dans le transistor Q4 s'ajuste automatiquement à une valeur 14 telle que R4.I4 = Vbe2. Ce montage convertit donc la tension Vbe2 en un courant Vbe2/R4 dans la résistance R4 et dans le transistor Q4. Un transistor PMOS Q5 recopie le courant Vbe2/R4 qui passe dans Q4 (même tension de grille que Q4, même tension de source Vdd) ; un autre transistor PMOS Q6 recopie le courant 12 qui passe dans le transistor Q2 (même tension de grille que Q2, même tension de source Vdd). Les courants de Q5 et Q6, respectivement égaux à Vbe2/R4 et 12=(kT/q)(LogN)/R2 sont additionnés dans une résistance de charge R6. Sur le schéma de la figure 3, la résistance de charge est reliée entre d'une part les drains réunis de Q5 et Q6 et d'autre part la masse. On verra que la résistance de charge peut aussi être une résistance d'entrée ou une résistance de bouclage d'un amplificateur opérationnel.A differential amplifier A2 controls the gate of a PMOS transistor Q4 which is in series with a resistor R4, so as to pass in the resistor R4 a current such that the voltage drop in this resistor is equal to the base-emitter voltage Vbe2 of transistor T2. For this, the differential amplifier A2, at high gain, receives the difference between the voltage across R4 and the base-emitter voltage Vbe2; the current in transistor Q4 automatically adjusts to a value 14 such that R4.I4 = Vbe2. This assembly therefore converts the voltage Vbe2 into a current Vbe2 / R4 in the resistor R4 and in the transistor Q4. A PMOS transistor Q5 copies the current Vbe2 / R4 passing through Q4 (same gate voltage as Q4, same source voltage Vdd); another PMOS transistor Q6 copies the current 12 which passes into the transistor Q2 (same gate voltage as Q2, same source voltage Vdd). The currents of Q5 and Q6, respectively equal to Vbe2 / R4 and 12 = (kT / q) (LogN) / R2 are summed in a load resistor R6. On the diagram of the figure 3 the load resistor is connected between the combined drains of Q5 and Q6 and the mass. It will be seen that the load resistor can also be an input resistor or a loopback resistor of an operational amplifier.

La tension de sortie EG(T) aux bornes de la résistance R6 est alors : EG(T) = R6.(kT/q)(LogN)/R2 + Vbe2.R6/R4. Le résultat est donc sensiblement identique à celui que procure le schéma de la figure 2.The output voltage EG (T) across the resistor R6 is then: EG (T) = R6 (kT / q) (LogN) / R2 + Vbe2.R6 / R4. The result is therefore substantially identical to that provided by the diagram of the figure 2 .

La figure 8 représente le principe de la présente invention.The figure 8 represents the principle of the present invention.

Comme on l'a dit, les transistors PNP peuvent être de mauvaise qualité et notamment ils peuvent avoir un gain en courant béta faible et fortement dispersé. C'est le cas en particulier lorsque le circuit de référence de tension est réalisé dans une technologie CMOS où les seuls transistors bipolaires disponibles sont des transistors PNP formés entre le substrat de type P, les caissons de type N et les diffusions de source et drain des PMOS formés dans ces caissons. Ces transistors sont de mauvaise qualité. C'est pourquoi il est préférable de prévoir un circuit de compensation du générateur de courant PTAT, qu'on va décrire en référence à la figure 8.As has been said, the PNP transistors may be of poor quality and in particular they may have a gain in low beta current and highly dispersed. This is particularly the case when the voltage reference circuit is made in a CMOS technology where the only available bipolar transistors are PNP transistors formed between the P-type substrate, the N-type wells and the source and drain diffusions. PMOS formed in these boxes. These transistors are of poor quality. That is why it is preferable to provide a compensation circuit of the PTAT current generator, which will be described with reference to the figure 8 .

Le circuit représenté à la figure 8 comprend, sur sa partie droite, le générateur de courant PTAT de la figure 1, et sur sa partie gauche le circuit de compensation dont la fonction est d'injecter dans l'émetteur du transistor T1 et dans l'émetteur du transistor T2 un courant égal au courant de base Ib qui parcourt ces transistors lorsque la résistance R2 est parcourue par le courant 12 proportionnel à la température absolue. En injectant ces courants, on fait en sorte que les courants égaux qui traversent Q1 et Q2 et donc le courant I2 qui traverse la résistance R2 ne soient pas le courant d'émetteur des transistors T1 et T2 mais soient le courant de collecteur Ic. Lorsque c'est le courant émetteur, il y a des imprécisions car les équations de fonctionnement du générateur PTAT se fondent sur le calcul des courants de collecteur des transistors T1 et T2 de taille différente. Cela n'a pas d'importance lorsque le gain en courant est fort car la différence entre courant collecteur et courant émetteur est insignifiance. Cela a plus d'importance lorsque le gain est faible. Avec la compensation introduite, on fait fonctionner véritablement le générateur PTAT à partir de courants de collecteur même si le gain est faible.The circuit represented at figure 8 includes, on its right side, the PTAT current generator of the figure 1 and on its left side the compensation circuit whose function is to inject into the emitter of the transistor T1 and into the emitter of the transistor T2 a current equal to the base current Ib which flows through these transistors when the resistor R2 is traveled. by the current 12 proportional to the absolute temperature. By injecting these currents, it is ensured that the equal currents flowing through Q1 and Q2 and thus the current I2 passing through the resistor R2 are not the emitter current of the transistors T1 and T2 but are the collector current Ic. When it is the emitter current, there are inaccuracies because the operating equations of the PTAT generator are based on the calculation of the collector currents of the transistors T1 and T2 of different size. This does not matter when the current gain is high because the difference between the collector current and the emitter current is insignificant. This is more important when the gain is low. With the compensation introduced, the PTAT generator is actually operated from collector currents even if the gain is small.

Pour atteindre ce résultat, le courant I2 dans Q1 est recopié dans une branche Q10, T10. Le transistor Q10 est identique à Q1 et a sa grille et sa source aux mêmes potentiels que la grille et la source de Q1. Le transistor T10 est identique à T1 et a son émetteur relié à la masse comme T1. La base de T10 n'est cependant pas connectée directement à la masse comme celle de T1, elle est connectée à la masse par l'intermédiaire d'un transistor NMOS Q11 monté en diode. Ce transistor Q11 est donc parcouru par un courant Ib qui est le courant de base de T10, identique au courant de base de T1.To achieve this result, the current I2 in Q1 is copied into a branch Q10, T10. The transistor Q10 is identical to Q1 and has its gate and its source at the same potentials as the gate and the source of Q1. Transistor T10 is identical to T1 and has its emitter connected to ground like T1. The base of T10, however, is not connected directly to the mass as that of T1, it is connected to ground by means of a NMOS transistor Q11 mounted diode. This transistor Q11 is therefore traversed by a current Ib which is the basic current of T10, identical to the basic current of T1.

Le courant dans Q11 est recopié à l'identique dans une branche à deux transistors Q12 NMOS), Q13 (PMOS monté en diode) ; de là, ce courant Ib est encore recopié

  • à l'identique par un transistor Q14 qui injecte son courant égal à Ib dans le point de jonction entre les transistors Q1 et T1.
  • à l'identique par un transistor Q15 qui injecte un courant Ib dans le point de jonction entre les transistors Q2 et T2.
The current in Q11 is copied identically in a branch with two transistors Q12 NMOS), Q13 (PMOS diode mounted); from there, this current Ib is still recopied
  • identically by a transistor Q14 which injects its current equal to Ib in the junction point between the transistors Q1 and T1.
  • identically by a transistor Q15 which injects a current Ib into the junction point between the transistors Q2 and T2.

Enfin, un transistor Q16 recopie le courant Ib du transistor Q13 pour l'injecter au point de jonction des transistors Q10 et T10.Finally, a transistor Q16 copies the current Ib of the transistor Q13 to inject it at the junction point of the transistors Q10 and T10.

Il en résulte que le courant I2 dans les transistors Q1 et Q2 est bien un courant de collecteur des transistors T1 et T2.As a result, the current I2 in the transistors Q1 and Q2 is indeed a collector current of the transistors T1 and T2.

Avec ce schéma on aboutit à un fonctionnement où le courant proportionnel à la température est un courant de collecteur de transistor et non un courant d'émetteur comme dans les schémas classiques, de sorte qu'il est insensible au fait que le gain en courant des transistors PNP soit faible et dispersé. On pourrait d'ailleurs faire un schéma sur le même principe si les transistors étaient NPN.With this scheme, the result is an operation in which the current proportional to the temperature is a transistor collector current and not an emitter current as in the conventional diagrams, so that it is insensitive to the fact that the current gain of PNP transistors are small and scattered. We could also make a diagram on the same principle if the transistors were NPN.

Cette compensation de gain en courant des transistors PMOS du générateur PTAT peut être appliquée à un circuit de référence de tension plus complexe dans lequel on cherche à compenser les courbures de la variation de tension de référence en fonction de la température vers les températures les plus hautes ou les plus basses.This current gain compensation of the PMOS transistors of the PTAT generator can be applied to a more complex voltage reference circuit in which it is sought to compensate for the curvatures of the reference voltage variation as a function of the temperature towards the highest temperatures. or the lowest.

Les schémas qui vont maintenant être décrits utilisent des générateurs PTAT qui sont représentés sous forme simplifiée, c'est-à-dire sans la compensation de courant de base représentée à la figure 8 afin de ne pas alourdir la représentation, mais on comprendra que ces générateurs PTAT sont réalisés en pratique comme à la figure 8. Cependant, on doit noter que les schémas qui vont être décrits peuvent être utilisés aussi avec des générateurs PTAT qui n'incorporent pas la compensation de courant de base de la figure 8, car ils permettent en eux-mêmes d'améliorer la stabilité de la tension de référence vers les hautes températures et les basses températures.The diagrams that will now be described use PTAT generators which are represented in simplified form, that is to say without the basic current compensation represented in FIG. figure 8 so as not to weigh down the representation, but it will be understood that these PTAT generators are made in practice as in the figure 8 . However, it should be noted that the schemes which will be described can be used also with PTAT generators which do not incorporate the basic current compensation of the figure 8 because they allow in themselves to improve the stability from the reference voltage to high temperatures and low temperatures.

La figure 4 représente le principe de l'obtention d'une tension de référence stable. Dans ce schéma on utilise un circuit C1 de coeur de bandgap tel que celui de la figure 2 ou la figure 3, c'est-à-dire utilisant la sommation d'une tension Vbe et d'une tension proportionnelle à la température absolue et donnant une tension (ou un courant) de référence stable en température au premier ordre ; et on ajoute à la somme EG(T) ainsi obtenue deux autres tensions dont l'une, désignée par E2(T), est issue d'un circuit C2 dit "circuit thermomètre" et l'autre, désignée par E3(T) est issue d'un circuit C3 d'élévation au carré qui élève au carré une tension issue du circuit thermomètre. Par circuit thermomètre, on entend un circuit pouvant établir une tension proportionnelle à la différence T-Tr entre la température absolue T et une température de référence Tr ; la température Tr peut être la température ambiante standard de 25°C. Le circuit d'élévation au carré est, quant à lui, capable d'établir une tension proportionnelle à (T-Tr)2 à partir d'une tension fournie par le circuit thermomètre.The figure 4 represents the principle of obtaining a stable reference voltage. In this diagram we use a heart circuit C1 bandgap such as that of the figure 2 or the figure 3 that is to say, using the summation of a voltage Vbe and a voltage proportional to the absolute temperature and giving a reference voltage (or a current) stable in the first order; and we add to the sum EG (T) thus obtained two other voltages, one of which, denoted by E2 (T), comes from a circuit C2 called "thermometer circuit" and the other, denoted by E3 (T) is derived from a circuit C3 of elevation squared which raises squared voltage from the thermometer circuit. By thermometer circuit is meant a circuit capable of establishing a voltage proportional to the difference T-Tr between the absolute temperature T and a reference temperature Tr; the temperature Tr can be the standard ambient temperature of 25 ° C. The squaring circuit is, in turn, capable of establishing a voltage proportional to (T-Tr) 2 from a voltage supplied by the thermometer circuit.

Un sommateur ADD effectue une combinaison linéaire des trois tensions EG(T), E2(T) et E3(T), c'est-à-dire qu'il les additionne avec des coefficients de pondération respectifs G1, G2, G3 pour établir une tension de sortie Vref = G1.EG(T) + G2.E2(T) + G3.E3(T).An adder ADD performs a linear combination of the three voltages EG (T), E2 (T) and E3 (T), i.e., it adds them with respective weighting coefficients G1, G2, G3 to establish an output voltage Vref = G1.EG (T) + G2.E2 (T) + G3.E3 (T).

Les coefficients de pondération sont choisis pour rendre aussi constante que possible la tension de sortie du sommateur en présence de variations de température. Le coefficient G1 peut être choisi arbitrairement égal à 1, des paramètres de réglage tels que la valeur de R6 permettant de régler le niveau de EG(T).The weighting coefficients are chosen to make the output voltage of the summator as constant as possible in the presence of temperature variations. The coefficient G1 can be chosen arbitrarily equal to 1, adjustment parameters such as the value of R6 making it possible to adjust the level of EG (T).

Pour le circuit C1, qui est un circuit de base de type bandgap, on a remarqué que la tension de sortie peut être considérée comme étant globalement de la forme : EG T = EG Tr + a . T - Tr + b . T - Tr 2

Figure imgb0002
For the circuit C1, which is a basic circuit of the bandgap type, it has been noticed that the output voltage can be considered as being generally of the form: EG T = EG Tr + at . T - Tr + b . T - Tr 2
Figure imgb0002

Ceci veut dire que la tension de sortie du circuit C1 n'est pas constante avec la température mais tend à varier selon une courbe qu'on peut approximer par une parabole.This means that the output voltage of the circuit C1 is not constant with the temperature but tends to vary along a curve that can be approximated by a parabola.

Les coefficients a et b peuvent être déterminés expérimentalement et dépendent du schéma utilisé et de la technologie. EG(Tr) est une valeur fixe, qui est la valeur théorique qu'on voudrait avoir à toutes les températures mais qu'on n'a en réalité qu'à la température de référence Tr.The coefficients a and b can be determined experimentally and depend on the scheme used and the technology. EG (Tr) is a value fixed, which is the theoretical value that one would like to have at all temperatures but that in fact only has the reference temperature Tr.

Le circuit thermomètre C2 et le circuit d'élévation au carré C3 sont destinés à compenser ces variations de tension de sortie du circuit C1. Le circuit thermomètre devra produire une tension E2(T) = k2.(T-Tr) destinée à compenser le terme a.(T-Tr) et le circuit d'élévation au carré devra produire une tension E3(T)=k3.(T-Tr)2 destinée à compenser le terme b.(T-Tr)2. Les coefficients G2 et G3 de la combinaison linéaire EG(T) + G1.E2(T) + G3.E3(T) effectuée par le sommateur ADD devront être ajustés pour que k2.G2=-a et k3.G3=-b de manière que la sommation pondérée des tensions de sortie des trois circuits C1, C2, C3 aboutisse à une tension Vref=EG(Tr) aussi indépendante que possible de la température T.The thermometer circuit C2 and the squaring circuit C3 are intended to compensate for these output voltage variations of the circuit C1. The thermometer circuit should produce a voltage E2 (T) = k2 (T-Tr) to compensate for the term a (T-Tr) and the squaring circuit should produce a voltage E3 (T) = k3. (T-Tr) 2 to compensate for the term b (T-Tr) 2 . The coefficients G2 and G3 of the linear combination EG (T) + G1.E2 (T) + G3.E3 (T) performed by the adder ADD will have to be adjusted so that k2.G2 = -a and k3.G3 = -b so that the weighted summation of the output voltages of the three circuits C1, C2, C3 results in a voltage Vref = EG (Tr) as independent as possible from the temperature T.

Si le circuit C1 fournit un courant de sortie plutôt qu'une tension EG(T), on convertit ce courant en tension dans une résistance du sommateur ADD. Même remarque pour les sorties des circuits C2 et C3.If the circuit C1 supplies an output current rather than a voltage EG (T), this current is converted into voltage in a resistor of the adder ADD. Same note for the outputs of circuits C2 and C3.

Les coefficients G2 et G3 sont négatifs si a, b, k1 et k2 sont positifs. Mais il faut prévoir notamment que les signes de a et b peuvent être quelconques, et on fera en sorte de prévoir que les coefficients G2 et G3 peuvent être de signe négatif (ou alternativement que les sorties E2(T) et E3(T) peuvent avoir un signe inversé si nécessaire).The coefficients G2 and G3 are negative if a, b, k1 and k2 are positive. But it must be provided in particular that the signs of a and b may be arbitrary, and it will be provided that the coefficients G2 and G3 may be of negative sign (or alternatively that the outputs E2 (T) and E3 (T) may be have an inverted sign if necessary).

La figure 5 est un schéma pratique reprenant le coeur du circuit de bandgap de la figure 3 et montrant comment on peut effectuer la combinaison linéaire désirée à l'aide d'un amplificateur opérationnel et de plusieurs résistances de sommation. Dans le cas qui est représenté, le circuit C1 fournit un courant de sortie qui est la somme des courants circulant dans les transistors Q5 et Q6 : (kT/q)(LogN)/R2 + Vbe2/R4The figure 5 is a practical diagram taking up the heart of the bandgap circuit of the figure 3 and showing how one can perform the desired linear combination using an operational amplifier and several summing resistors. In the case shown, the circuit C1 supplies an output current which is the sum of the currents flowing in the transistors Q5 and Q6: (kT / q) (LogN) / R2 + Vbe2 / R4

Les sorties réunies des transistors Q5 et Q6, constituant la sortie du circuit C1, ne sont pas appliquées à une résistance R6 comme à la figure 3 mais elles sont appliquées, ce qui revient au même, à une entrée E1 d'un amplificateur opérationnel AO rebouclé par une résistance de bouclage Rs1.The combined outputs of transistors Q5 and Q6, constituting the output of circuit C1, are not applied to a resistor R6 as to the figure 3 but they are applied, which amounts to the same, to an input E1 of an operational amplifier AO looped by a loopback resistor Rs1.

L'autre entrée E2 de l'amplificateur est portée à un potentiel de référence VG (qui peut être la masse GND ou de préférence le point milieu entre l'alimentation basse GND et l'alimentation haute Vdd). Le potentiel VG est, comme on le verra, la référence par rapport à laquelle le circuit thermomètre C2 fournit une tension proportionnelle à T-Tr, et le circuit C3 fournit une tension proportionnelle au carré de T-Tr. C'est pourquoi ce potentiel doit aussi servir de référence dans le sommateur ADD placé en sortie du circuit C1.The other input E2 of the amplifier is brought to a reference potential VG (which may be the ground GND or preferably the midpoint between the low supply GND and the high supply Vdd). The potential VG is, as will be seen, the reference with respect to which the thermometer circuit C2 provides a voltage proportional to T-Tr, and the circuit C3 provides a voltage proportional to the square of T-Tr. That is why this potential must also serve as a reference in the adder ADD placed at the output of the circuit C1.

La résistance de bouclage Rs1 convertit le courant qui la traverse en tension (comme la résistance R6 de la figure 3). Le courant qui la traverse est tel que la somme des courants qui entre sur le noeud E1 soit nulle. Cette somme comprend les courants issus des transistors Q5 et Q6 (courants Vbe2/R4 et 12), le courant dans la résistance Rs1 et deux courants injectés, à travers une résistance Rs2 et une résistance Rs3 respectivement, par les sorties en tension du circuit thermomètre C2 et du circuit d'élévation au carré C3.The loopback resistor Rs1 converts the current passing through it into voltage (like the resistor R6 of the figure 3 ). The current flowing through it is such that the sum of the currents entering on the node E1 is zero. This sum comprises the currents originating from transistors Q5 and Q6 (currents Vbe2 / R4 and 12), the current in resistor Rs1 and two currents injected, through a resistor Rs2 and a resistor Rs3 respectively, by the voltage outputs of the thermometer circuit. C2 and squaring circuit C3.

La résistance Rs2 définit le coefficient de pondération G2 correspondant au circuit C2. Cette résistance Rs2 est placée entre la sortie du circuit C2 et l'entrée E1 de l'amplificateur opérationnel AO. De même, une troisième résistance Rs3, placée entre la sortie du circuit C3 et l'entrée E1, définit le coefficient de pondération G3. Les circuits C2 et C3 fournissent des tensions sous faible impédance de sortie et imposent leur potentiel de sortie sur les résistances Rs2 et Rs3.The resistor Rs2 defines the weighting coefficient G2 corresponding to the circuit C2. This resistor Rs2 is placed between the output of the circuit C2 and the input E1 of the operational amplifier AO. Similarly, a third resistor Rs3, placed between the output of the circuit C3 and the input E1, defines the weighting coefficient G3. The circuits C2 and C3 provide low output impedance voltages and impose their output potential on the resistors Rs2 and Rs3.

Les circuits C2 et C3 fournissent des tensions référencées par rapport à la tension VG. Le circuit C2 fournit une tension E2(T) qui est égale à k2.(T-Tr). Le circuit C3 fournit une tension E3(T) qui est égale à k3.(T-Tr)2.The circuits C2 and C3 provide referenced voltages with respect to the voltage VG. The circuit C2 provides a voltage E2 (T) which is equal to k2 (T-Tr). The circuit C3 provides a voltage E3 (T) which is equal to k3 (T-Tr) 2 .

Le fonctionnement de l'amplificateur opérationnel est classique : la somme des courants qui arrivent sur son entrée E1 est nulle, et la tension sur cette entrée est égale à la tension sur l'entrée E2, c'est-à-dire à VG.The operation of the operational amplifier is conventional: the sum of the currents arriving at its input E1 is zero, and the voltage at this input is equal to the voltage at the input E2, that is to say at VG.

Si on appelle Vref la tension de sortie (référencée par rapport au potentiel de référence VG) de l'amplificateur AO, alors on peut écrire : Vref / Rs 1 + E 2 T / Rs 2 + E 3 T / Rs 3 + Vbe 2 / R 4 + I 2 = 0

Figure imgb0003
Vref = - Rs 1 I 2 + Vbe 2 / R 4 - E 2 T Rs 1 / Rs 2 - E 3 T Rs 1 / Rs 3
Figure imgb0004
If we call Vref the output voltage (referenced with respect to the reference potential VG) of the amplifier AO, then we can write: Vref / Rs 1 + E 2 T / Rs 2 + E 3 T / Rs 3 + Vbe 2 / R 4 + I 2 = 0
Figure imgb0003
Vref = - Rs 1 I 2 + Vbe 2 / R 4 - E 2 T Rs 1 / Rs 2 - E 3 T Rs 1 / Rs 3
Figure imgb0004

Donc Vref = - Rs 1 I 2 + Vbe / 4 - E 2 T Rs 1 / Rs 2 - E 3 T Rs 1 / Rs 3

Figure imgb0005
Therefore Vref = - Rs 1 I 2 + Vbe / 4 - E 2 T Rs 1 / Rs 2 - E 3 T Rs 1 / Rs 3
Figure imgb0005

Ou, si on appelle EG(T) la valeur -Rs1[I2+Vbe2/R4], tension imparfaite du circuit de bandgap C1, égale à EG(Tr) à la température de référence Tr. Vref = EG T - k 2 T - Tr Rs 1 / Rs 2 - k 3 T - Tr 2 Rs 1 / Rs 3

Figure imgb0006
Or, if we call EG (T) the value -Rs1 [I2 + Vbe2 / R4], imperfect voltage of the bandgap circuit C1, equal to EG (Tr) at the reference temperature Tr. Vref = EG T - k 2 T - Tr Rs 1 / Rs 2 - k 3 T - Tr 2 Rs 1 / Rs 3
Figure imgb0006

Comme on a fait l'approximation du second ordre que EG(T) est assimilable à la somme EG(Tr)+ a.(T-Tr)+b(T-Tr)2, on trouve que Vref = EG Tr + a . T - Tr + b T - Tr 2 - k 2 T - Tr Rs 1 / Rs 2 - k 3 T - Tr 2 Rs 1 / Rs 3

Figure imgb0007
Ou Vref = EG Tr + a - k 2. Rs 1 / Rs 2 . T - Tr + b - k 3 Rs 1 / Rs 3 . T - Tr 2
Figure imgb0008
Since the second order approximation is that EG (T) is equivalent to the sum EG (Tr) + a (T-Tr) + b (T-Tr) 2 , we find that Vref = EG Tr + at . T - Tr + b T - Tr 2 - k 2 T - Tr Rs 1 / Rs 2 - k 3 T - Tr 2 Rs 1 / Rs 3
Figure imgb0007
Or Vref = EG Tr + at - k 2. Rs 1 / Rs 2 . T - Tr + b - k 3 Rs 1 / Rs 3 . T - Tr 2
Figure imgb0008

La valeur de Rs1 est réglée en principe en fonction de la valeur qu'on souhaite donner à la tension de référence Vref à la température de référence Tr. Cette valeur est -Rs1[I2+Vbe2/R4] mesurée à la température de référence et qui est EG(Tr) selon la notation précédemment utilisée.The value of Rs1 is set in principle according to the value that it is desired to give to the reference voltage Vref at the reference temperature Tr. This value is -Rs1 [I2 + Vbe2 / R4] measured at the reference temperature and which is EG (Tr) according to the notation previously used.

Si les coefficients k2 et k3 des circuits C2 et C3 ne sont pas réglables, alors on règle le rapport Rs1/Rs2 tel que Rs2/Rs1 = k2/a et le rapport Rs3/Rs1 tel que Rs3/Rs1 = k3/b, ce qui permet d'éliminer les coefficients pondérateurs des termes T-Tr et (T-Tr)2 et d'aboutir à une tension de référence qui a la valeur EG(Tr) sur toute la plage de températures pour laquelle l'approximation EG(T) = EG(Tr)+a(T-Tr)+b(T-Tr)2 reste valable pour le circuit bandgap C1 utilisé.If the coefficients k2 and k3 of the circuits C2 and C3 are not adjustable, then the ratio Rs1 / Rs2 is adjusted such that Rs2 / Rs1 = k2 / a and the ratio Rs3 / Rs1 such that Rs3 / Rs1 = k3 / b, which makes it possible to eliminate the weighting coefficients of the terms T-Tr and (T-Tr) 2 and to arrive at a reference voltage which has the value EG (Tr) over the whole range of temperatures for which the approximation EG ( T) = EG (Tr) + a (T-Tr) + b (T-Tr) 2 remains valid for the bandgap circuit C1 used.

Circuit thermomètreThermometer circuit

Le circuit thermomètre C2 peut être constitué par exemple de la manière suivante, comme représenté à la figure 6 : il comprend un générateur de courant proportionnel à la température absolue (PTAT) ; ce générateur peut être celui qui sert dans le circuit C1 pour établir le courant ou la tension constante au premier ordre. Il est donc composé des transistors PNP T1, T2, de l'amplificateur différentiel A1, de la résistance R2, et des sources de courant constituées par les transistors PMOS Q1, Q2 dont les grilles sont reliées à la sortie de l'amplificateur différentiel A1.The thermometer circuit C2 can be constituted for example as follows, as shown in FIG. figure 6 it comprises a current generator proportional to the absolute temperature (PTAT); this generator can be the one used in the circuit C1 to establish the current or the constant voltage to the first order. It is therefore composed of PNP transistors T1, T2, differential amplifier A1, resistor R2, and current sources constituted by PMOS transistors Q1, Q2 whose gates are connected to the output of differential amplifier A1. .

Le courant I2 proportionnel à la température absolue est recopié par un transistor PMOS Q7 et par un transistor PMOS Q8 qui ont tous deux le même potentiel de source et de grille que Q1 et Q2. Le transistor Q7 alimente une résistance R7. La résistance R7 est reliée entre le drain du transistor Q7 et la sortie d'un amplificateur différentiel A3. Le transistor Q8 alimente un transistor bipolaire T8 monté en diode, ayant son émetteur relié au drain de Q8 et son collecteur et sa base reliés au potentiel de référence VG. L'amplificateur différentiel A3 a une première entrée reliée au point de jonction de R7 et Q7 et une deuxième entrée reliée au point de jonction de Q8 et T8.The current I2 proportional to the absolute temperature is copied by a PMOS transistor Q7 and a PMOS transistor Q8 which both have the same source and gate potential as Q1 and Q2. Transistor Q7 supplies a resistor R7. The resistor R7 is connected between the drain of the transistor Q7 and the output of a differential amplifier A3. Transistor Q8 feeds a diode-mounted bipolar transistor T8 having its emitter connected to the drain of Q8 and its collector and base connected to the reference potential VG. The differential amplifier A3 has a first input connected to the point of junction of R7 and Q7 and a second input connected to the junction point of Q8 and T8.

Il en résulte que l'amplificateur différentiel A3 établit une tension qui est la différence entre la tension base-émetteur de ce transistor bipolaire (parcouru par un courant proportionnel à la température) et de la chute de tension aux bornes de la résistance (parcourue par un courant proportionnel à la température).As a result, the differential amplifier A3 establishes a voltage which is the difference between the base-emitter voltage of this bipolar transistor (traversed by a current proportional to the temperature) and the voltage drop across the resistor (traversed by a current proportional to the temperature).

On peut montrer et vérifier expérimentalement que si la résistance R7 est ajustée pour que la tension de sortie de l'amplificateur différentiel A3 soit égale à VG pour la température de référence Tr, alors la tension de sortie de l'amplificateur pour une température absolue quelconque T est une tension E2(T) pratiquement proportionnelle à T-Tr et qu'on peut donc écrire E2(T)=k2.(T-Tr)It can be shown and verified experimentally that if the resistor R7 is adjusted so that the output voltage of the differential amplifier A3 is equal to VG for the reference temperature Tr, then the output voltage of the amplifier for any absolute temperature T is a voltage E2 (T) that is practically proportional to T-Tr and that we can write E2 (T) = k2. (T-Tr)

Cette proportionnalité approchée résulte notamment de la courbe de variation pratiquement en (T-Tr) de la tension base-émetteur Vbe8 du transistor T8 lorsqu'il est parcouru par un courant I2 proportionnel à la température absolue.This approximate proportionality results in particular from the curve of variation practically in (T-Tr) of the base-emitter voltage Vbe8 of the transistor T8 when it is traversed by a current I2 proportional to the absolute temperature.

La résistance R7 est ajustable pour régler le circuit thermomètre de telle manière que la tension de sortie E2(T) soit nulle pour la température de référence Tr, c'est-à-dire de manière que la sortie de l'amplificateur A3 soit égale à VG pour cette température.The resistor R7 is adjustable to adjust the thermometer circuit such that the output voltage E2 (T) is zero for the reference temperature Tr, that is to say that the output of the amplifier A3 is equal at VG for this temperature.

Si on estime que le coefficient a de la courbe de variation de EG(T) avec la température peut être soit positif soit négatif, on peut prévoir un amplificateur opérationnel supplémentaire, monté en inverseur analogique, à la sortie de l'amplificateur A3. La sortie de l'amplificateur supplémentaire ou la sortie de l'amplificateur A3 sera utilisée selon le signe de a, le choix étant fait lors du test du circuit ; l'ajustement de la résistance R7 est fait également lors du test.If it is estimated that the coefficient a of the variation curve of EG (T) with the temperature can be either positive or negative, an additional operational amplifier mounted in an analog inverter can be provided at the output of the amplifier A3. The output of the additional amplifier or the output of the amplifier A3 will be used according to the sign of a, the choice being made during the circuit test; the adjustment of the resistance R7 is also done during the test.

Circuit d'élévation au carréElevation circuit squared

Pour produire un signal proportionnel à (T-Tr)2 on utilise le circuit thermomètre, et on applique sa tension de sortie E2(T) a un circuit d'élévation au carré qui utilise la même référence de potentiel VG.To produce a signal proportional to (T-Tr) 2 the thermometer circuit is used, and its output voltage E2 (T) is applied to a squaring circuit which uses the same potential reference VG.

Le circuit d'élévation au carré peut être celui de la figure 7. Il comporte deux sources de courant entrant et sortant SC1 et SC2 de valeur arbitraire 2.lo chacune ; la première source, SC1, alimente en courant entrant un groupe de deux branches différentielles identiques à une résistance et trois transistors chacune (une résistance R21, un PMOS Q21 et deux NMOS Q22 et Q23, tous en série, dans la première branche, une résistance R24=R21, un PMOS Q24 et deux NMOS Q25 et Q26 en série dans la deuxième branche) ; la deuxième source SC2 alimente en courant sortant une paire de deux transistors NMOS identiques Q27 et Q28 ayant leurs sources réunies. Ces sources réunies sont reliées à la grille d'un transistor NMOS Q30 alimenté par une source de courant entrant SC3 de valeur Io (donc la moitié de la valeur de chacune des autres sources). Les transistors PMOS des deux branches différentielles identiques reçoivent respectivement sur leur grille un potentiel E2(T) issu du circuit thermomètre et le potentiel de référence VG. On peut montrer que le courant qui parcourt le transistor Q30 est égal à Io+ [E2(T)]2/4(R21)2.IoThe squaring circuit can be that of the figure 7 . It has two sources of current input and output SC1 and SC2 value arbitrary 2.lo each; the first source, SC1, supplies to the incoming current a group of two differential branches identical to one resistor and three transistors each (a resistor R21, a PMOS Q21 and two NMOS Q22 and Q23, all in series, in the first branch, a resistor R24 = R21, a PMOS Q24 and two NMOS Q25 and Q26 in series in the second branch); the second source SC2 feeds outgoing current a pair of two identical NMOS transistors Q27 and Q28 having their sources together. These combined sources are connected to the gate of a NMOS transistor Q30 fed by an incoming power source SC3 of value Io (thus half the value of each of the other sources). The PMOS transistors of the two identical differential branches respectively receive on their gate a potential E2 (T) coming from the thermometer circuit and the reference potential VG. It can be shown that the current flowing through the transistor Q30 is equal to Io + [E2 (T)] 2/4 (R21) 2 .io

On extrait du point de jonction entre la source SC3 de valeur Io et le drain du transistor Q30 un courant égal à la différence entre le courant de la source SC3 et le courant du transistor Q30. Cette différence est égale à [E2(T)]2/4.(R21)2.IoA current equal to the difference between the current of the source SC3 and the current of the transistor Q30 is extracted from the junction point between the source SC3 of value Io and the drain of transistor Q30. This difference is equal to [E2 (T)] 2 /4.(R21) 2 .Io

Elle est convertie en tension dans un amplificateur différentiel A4 dont une entrée est portée à la tension de référence VG et dont l'autre entrée, qui reçoit le courant [E2(T)]2/4.(R21)2.Io, est reliée par une résistance R30 de rebouclage à la sortie de l'amplificateur.It is converted into a voltage in a differential amplifier A4 whose input is brought to the reference voltage VG and the other input, which receives the current [E2 (T)] 2 /4.(R21) 2 .Io, is connected by a loopback resistor R30 at the output of the amplifier.

La tension qui apparaît à la sortie de l'amplificateur est alors une tension E3(T) égale à R30.[E2(T)]2/4.(R21)2.Io +VGThe voltage that appears at the output of the amplifier is then a voltage E3 (T) equal to R30. [E2 (T)] 2 /4.(R21) 2 .Io + VG

La tension E3(T) est pratiquement proportionnelle au carré de E2(T) donc au carré de T-Tr, à la condition toutefois que Io soit à peu près indépendant de la température. Pour obtenir ce résultat, on s'arrange pour réaliser les sources de courant de valeur Io et 2Io à partir du rapport entre une tension à peu près indépendante de la température et une résistance de polarisation Rpol. La tension à peu près indépendante de la température est de préférence la tension de sortie EG issue du coeur de circuit bandgap.The voltage E3 (T) is practically proportional to the square of E2 (T), therefore to the square of T-Tr, provided, however, that Io is approximately independent of the temperature. To obtain this result, it is arranged to realize the current sources of value Io and 2Io from the ratio between a voltage approximately independent of the temperature and a bias resistor Rpol. The voltage approximately independent of the temperature is preferably the output voltage EG from the bandgap circuit core.

Io est alors de la forme Io=Eg/Rpol et on peut noter que la tension E3(T) fait alors intervenir un rapport RpoI.R30/(R21)2. Ce rapport est lui aussi à peu près indépendant de la température, toutes les résistances variant de la même manière.Io is then of the form Io = Eg / Rpol and it may be noted that the voltage E3 (T) then involves a ratio RpoI.R30 / (R21) 2 . This ratio is also approximately independent of the temperature, all the resistances varying in the same way.

Là encore, si le coefficient b de la courbe de variation EG(T) a un signe quelconque, on peut placer un amplificateur opérationnel inverseur à la sortie de l'amplificateur A4. La sortie de l'un ou l'autre de ces amplificateurs sera choisie au test.Again, if the coefficient b of the variation curve EG (T) has any sign, an inverting operational amplifier can be placed at the output of the amplifier A4. The output of one or the other of these amplifiers will be chosen on the test.

Claims (6)

  1. A voltage reference circuit, comprising a first circuit of bandgap type (C1) providing a first-order temperature-stable voltage or current, on the basis of a PTAT current generator providing a current proportional to absolute temperature, this generator comprising, between a power supply (Vdd) and a ground (GND), two parallel branches, one comprising a first MOS transistor (Q1) in series with a diode-mounted bipolar transistor (T1), the other branch comprising a second MOS transistor (Q2) identical to the first bipolar transistor, the PTAT current generator further comprising a resistor (R2) and a second bipolar transistor (T2) having an emitter area N times as large as the emitter area of the first, with a differential amplifier (A1) which controls the MOS transistors and which establishes in the resistor a voltage drop equal to the difference of the base-emitter voltages of the two bipolar transistors, characterized in that there are provided means for injecting, at the junction point between the first bipolar transistor (T1) and the first MOS transistor (Q1), a current which is equal to the base current of the first bipolar transistor (T1) and means for injecting, at the junction point of the second bipolar transistor (T2) and of the resistor (R2), a current which is equal to the base current of the second bipolar transistor (T2), in such a manner that the output current of the generator of current proportional to temperature is equal to the collector current and not to the emitter current of the second bipolar transistor.
  2. The reference circuit as claimed in claim 1, characterized in that the first circuit of bandgap type provides a temperature-stable voltage or current on the basis
    - of a bipolar transistor base-emitter voltage (T3) having a negative slope of variation as a function of temperature
    - and of the current (I2) arising from the PTAT generator.
  3. The circuit as claimed in claim 1, characterized in that it comprises a differential amplifier (A2) and a third MOS transistor (Q4) controlled by this differential amplifier, for establishing in a resistor (R4) of value R4 a current equal to Vbe2/R4, where Vbe2 is the base-emitter voltage of the second transistor.
  4. The circuit as claimed in claim 3, characterized in that it comprises at least one fourth and one fifth transistor (Q5, Q6) for copying over the current in the resistor of value R4 and the current in the resistor of value R2.
  5. The reference circuit as claimed in one of the preceding claims, characterized in that it comprises a summator (ADD) for establishing a linear combination, with respective weighting coefficients, of three values which are respectively
    - the output voltage or current (EG(T)) of the first circuit of bandgap type (C1),
    - the output voltage or current of a second circuit (C2) providing a voltage (E2(T)) or a current proportional to the difference between the absolute temperature T and a reference temperature Tr,
    - the output voltage or current (E3(T)) of a third circuit (C3) providing a voltage or a current proportional to the square of this difference.
  6. The circuit as claimed in claim 5, characterized in that the second circuit (C2) providing a voltage proportional to the difference T-Tr comprises a generator of current proportional to absolute temperature, means for applying this current to a resistor of value R7 and to a bipolar transistor (T8), and a differential amplifier for establishing a voltage which is the difference between the base-emitter voltage (Vbe8) of this bipolar transistor and of the voltage drop across the terminals of the last mentioned resistor (R7).
EP07820997A 2006-10-06 2007-10-05 Voltage reference electronic circuit Ceased EP2067090B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0608789A FR2906903B1 (en) 2006-10-06 2006-10-06 ELECTRONIC VOLTAGE REFERENCE CIRCUIT.
PCT/EP2007/060624 WO2008040817A1 (en) 2006-10-06 2007-10-05 Voltage reference electronic circuit

Publications (2)

Publication Number Publication Date
EP2067090A1 EP2067090A1 (en) 2009-06-10
EP2067090B1 true EP2067090B1 (en) 2010-07-28

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EP07820997A Ceased EP2067090B1 (en) 2006-10-06 2007-10-05 Voltage reference electronic circuit

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US (1) US20100007324A1 (en)
EP (1) EP2067090B1 (en)
AT (1) ATE475925T1 (en)
DE (1) DE602007008115D1 (en)
FR (1) FR2906903B1 (en)
WO (1) WO2008040817A1 (en)

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Publication number Priority date Publication date Assignee Title
FR2975510B1 (en) * 2011-05-17 2013-05-03 St Microelectronics Rousset DEVICE FOR GENERATING AN ADJUSTABLE PROHIBITED BAND REFERENCE VOLTAGE WITH HIGH FEED REJECTION RATES
FR2975512B1 (en) * 2011-05-17 2013-05-10 St Microelectronics Rousset METHOD AND DEVICE FOR GENERATING AN ADJUSTABLE REFERENCE VOLTAGE OF BAND PROHIBITED
WO2012160734A1 (en) * 2011-05-20 2012-11-29 パナソニック株式会社 Reference voltage generating circuit and reference voltage source
JP6242274B2 (en) * 2014-04-14 2017-12-06 ルネサスエレクトロニクス株式会社 Band gap reference circuit and semiconductor device including the same
US9864389B1 (en) * 2016-11-10 2018-01-09 Analog Devices Global Temperature compensated reference voltage circuit
US11740281B2 (en) 2018-01-08 2023-08-29 Proteantecs Ltd. Integrated circuit degradation estimation and time-of-failure prediction using workload and margin sensing
US11068011B2 (en) * 2019-10-30 2021-07-20 Taiwan Semiconductor Manufacturing Company Ltd. Signal generating device and method of generating temperature-dependent signal
DE102021112735B3 (en) 2021-05-17 2022-08-04 Infineon Technologies Ag BANDGAP REFERENCE CIRCUIT
US11619551B1 (en) * 2022-01-27 2023-04-04 Proteantecs Ltd. Thermal sensor for integrated circuit

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US5629612A (en) * 1996-03-12 1997-05-13 Maxim Integrated Products, Inc. Methods and apparatus for improving temperature drift of references
US6255807B1 (en) * 2000-10-18 2001-07-03 Texas Instruments Tucson Corporation Bandgap reference curvature compensation circuit
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US7088085B2 (en) * 2003-07-03 2006-08-08 Analog-Devices, Inc. CMOS bandgap current and voltage generator
US7091713B2 (en) * 2004-04-30 2006-08-15 Integration Associates Inc. Method and circuit for generating a higher order compensated bandgap voltage
US7486065B2 (en) * 2005-02-07 2009-02-03 Via Technologies, Inc. Reference voltage generator and method for generating a bias-insensitive reference voltage
TWI256725B (en) * 2005-06-10 2006-06-11 Uli Electronics Inc Bandgap reference circuit

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Publication number Publication date
DE602007008115D1 (en) 2010-09-09
FR2906903B1 (en) 2009-02-20
FR2906903A1 (en) 2008-04-11
ATE475925T1 (en) 2010-08-15
WO2008040817A1 (en) 2008-04-10
EP2067090A1 (en) 2009-06-10
US20100007324A1 (en) 2010-01-14

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