EP2003659A1 - Induction monolithique intégrée - Google Patents

Induction monolithique intégrée Download PDF

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Publication number
EP2003659A1
EP2003659A1 EP08010431A EP08010431A EP2003659A1 EP 2003659 A1 EP2003659 A1 EP 2003659A1 EP 08010431 A EP08010431 A EP 08010431A EP 08010431 A EP08010431 A EP 08010431A EP 2003659 A1 EP2003659 A1 EP 2003659A1
Authority
EP
European Patent Office
Prior art keywords
coil
loops
monolithically integrated
inductance
magnetic coupling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08010431A
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German (de)
English (en)
Inventor
Samir El Rai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Munich GmbH
Original Assignee
Atmel Duisburg GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Duisburg GmbH filed Critical Atmel Duisburg GmbH
Publication of EP2003659A1 publication Critical patent/EP2003659A1/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00—Fixed transformers or mutual inductances of the signal type
    • H01F19/04—Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F2017/0073—Printed inductances with a special conductive pattern, e.g. flat spiral

Definitions

  • the present invention relates to a monolithically integrated inductance.
  • FIG. 1 An equivalent circuit diagram of a coil for high frequency applications is in Fig. 1 shown.
  • the coil has an inductance L.
  • Line resistances and other losses of a high-frequency signal are represented by the resistor R L (f), the resistance value being dependent on the frequency f of the high-frequency signal.
  • the resistance R L (f) depends on the skin resistance (skin effect) of the winding and is proportional to the root of the frequency f.
  • the invention is based on the object of increasing the quality of a resonant circuit for high frequencies as possible.
  • a use of at least two monolithically integrated coils with a total inductance for increasing a quality instead of a monolithically integrated single coil of the same inductance is provided.
  • the at least two monolithically integrated coils are connected in parallel.
  • Each of the two monolithically integrated coils has at least two preferably complete loops with a magnetic coupling between the two loops.
  • a method for forming a monolithically integrated inductance is provided.
  • the inductance is formed by parallel connection of a first coil and at least one second coil. At least two first loops of the first coil are formed for magnetic coupling. At least two second loops of the second coil are formed for magnetic coupling.
  • a monolithically integrated inductor has a first coil with a first coil Inductance value on.
  • the monolithically integrated inductor has at least one second coil with a second inductance value.
  • the at least one second coil is connected in parallel with the first coil.
  • the parallel-connected coils form a Monindukt technically.
  • the coils of the monolithic integrated inductance are formed in planar technology.
  • the coils are preferably formed in one or more metallization levels of the integrated circuit.
  • the first coil and the second coil are preferably arranged such that each coil surface of the coils enclosed by coil windings is arranged parallel to the surface of the integrated circuit.
  • supply lines to the first coil and the second coil are provided.
  • the first coil has at least two spaced-apart first loops with a web width.
  • the second coil has at least two guided in the distance second loops with the web width. The first loops and the second loops each form a magnetic coupling.
  • a monolithically integrated inductance dependent on the desired resonant circuit frequency is required for a parallel resonant circuit or for a series resonant circuit with a given adjustable capacitance and parasitic capacitances. Due to the high resonant circuit frequency, a very low inductance value of the monolithically integrated inductance is required.
  • the parallel connection of the first coil with the first inductance and the second coil with the second inductance to form the total inductance makes it possible to provide the first coil and the second coil with a magnetic coupling for increasing the quality of the first coil and the second coil.
  • Increasing the quality of the first coil and The second coil also causes an increase in the overall quality of the parallel connection by their parallel connection.
  • a monolithically integrated design of the first coil and the second coil through the use of the planar technology causes the coil paths of a coil preferably to be formed spaced apart from each other in the lateral direction (relative to the chip surface). Likewise, the coil tracks may be formed spaced apart in the vertical direction (relative to the chip surface). However, if the coil paths are spaced apart exclusively in the vertical direction, parasitic capacitances are significantly increased and are also subject to greater process fluctuations.
  • a parasitic capacitance which forms between the coil paths of a coil, that is, between the coil paths of the first coil or between the coil paths of the second coil, decreases. As the distance increases, so does the coil area which is encompassed by all turns of the respective coil formed by the coil paths.
  • the first coil and the second coil each have at least two loops (windings) enclosing a coil surface, which effect the magnetic coupling.
  • Loops comprising loops are understood to mean that the coil surface of each loop of the coil is encircled at an angle greater than 300 °.
  • the loops comprising the coil surface may also be referred to as complete loops.
  • the total inductance to have a coil inductance and a supply inductance of supply lines to the first coil and / or to the second coil Coil, wherein the coil inductance is at least twenty times greater than the Zu effetsindukt technically.
  • a coil spacing between the first coil and the second coil is greater than the sum of a double track width of the tracks of the coils and a track distance.
  • Such a design of the coil geometry preferably causes a lower magnetic coupling of the first coil and the second coil with each other.
  • the total inductance of the parallel-connected monolithically integrated coils is designed for an operating frequency.
  • the operating frequency is adjustable within a Einstellfrequenz Symposium.
  • a connected capacitance or the total inductance can be configured adjustable.
  • each coil resonant frequency of the two monolithically integrated coils is at least twice as large as the operating frequency.
  • each coil resonant frequency is twice as large as any adjustable operating frequency within the tuning frequency range.
  • the at least two monolithically integrated coils are used together with a monolithically integrated capacitive unit to form a resonant circuit.
  • the capacitive unit may be connected in parallel or in series with the total inductance.
  • a capacitance of the monolithically integrated capacitive unit for adjusting a resonant circuit frequency is adjustable.
  • the adjustable resonant circuit frequency corresponds to the operating frequency.
  • an integrated resonant circuit with the monolithically integrated inductance wherein the integrated Resonant circuit having a monolithic integrated capacitive unit, which is connected in parallel to the first coil and the second coil and disposed between the first coil and the second coil.
  • the first coil and the second coil are spaced apart from one another by at least one dimension of the monolithically integrated capacitive unit.
  • the capacitive unit comprises at least one metal-insulator-metal capacitor, a varactor, a switched MIM capacitor and / or a switched capacitor bank.
  • a first coil resonance frequency of the first coil is formed by adjusting a first parasitic coil capacitance by setting a path width and a spacing of the loops of the first coil of a first coil inductance of the first coil.
  • a second coil resonance frequency of the second coil is formed by adjusting a second parasitic coil capacitance by adjusting a track width and a spacing of the loops of the second coil of the second coil inductance of the second coil.
  • a first number of the first loops of the first coil is determined as a function of the first coil resonance frequency and a particular adjustable operating frequency.
  • a second number of second loops of the second coil is determined as a function of the second coil resonance frequency and the particular adjustable operating frequency.
  • the gains caused by the magnetic coupling between the loops of a coil, the ohmic losses due to current displacement effects due to the proximity effect of each adjacent loop exceed, for this condition, a distance and a track width of the loop paths are determined.
  • a difference between the gains and the losses assumes a maximum value. For this maximum value, the distance between adjacent loops and the track width of each loop are determined.
  • the magnetic coupling between the first conductor loops of the first coil exceeds a magnetic coil coupling between the first coil and the second coil. Also, in this embodiment, the magnetic coupling between the second conductor loops of the second coil exceeds a magnetic coil coupling between the first coil and the second coil.
  • the web width and the distance are the same. Under the equality of web width and distance is to be understood in the context of the manufacturing process with given manufacturing tolerances equality.
  • the web width and spacing are made with the same amount of exposure mask.
  • the value of the distance exceeds that of the web width by, for example, acting parasitic. To reduce capacitance between adjacent loops.
  • the value of the distance is less than twice the value of the web width in order, for example, to achieve a sufficiently large bobbin surface.
  • the first coil and the second coil are identical or symmetrical to each other.
  • the first coil and the second coil For symmetrical training, the first coil and the second coil For example, be point-symmetrical or mirror-symmetrical to each other.
  • the first and second inductance values have a minimum and a maximum inductance value.
  • the minimum inductance value does not exceed the maximum inductance value by more than 20%, preferably by at most 10%.
  • a predefinable Bactetriosswert with the parallel circuit of the inductance substantially coincides with the product of the number of first and second coils and a predetermined Bacinduktriosswert the monolithically integrable inductance.
  • a tunable oscillator having at least one monolithically integrated inductor described above.
  • this is advantageously voltage-controlled or current-controlled.
  • an integrated resonant circuit having at least one monolithically integrated inductor described above.
  • Fig. 4 shows a schematic diagram for a monolithically integrated inductance, wherein the ordinate Q of a monolithically integrated inductance and the abscissa frequency f is plotted.
  • a family of curves for different numbers N of loops 1, 2, 3, 4 and 5 is plotted.
  • the loops can also be referred to as turns.
  • the loops have a magnetic coupling with each other.
  • the associated resonance frequency f r2 , f r3 , f r4 and f r5 is also plotted on the abscissa.
  • an operating frequency f B is registered and highlighted by a dashed line.
  • the coil resonance frequency is at least twice as high as the operating frequency f B. This applies only to the embodiments of the Fig. 4 with the number of turns 1, 2, 3 and 4 too. By contrast, the coil resonance frequency f r5 is not sufficiently high.
  • the quality Q increases from the number of turns 1 to the number of turns 3. Also for the number of turns 4, the quality Q is increased relative to the number of turns 1.
  • Q 2 ⁇ wL + .OMEGA.m 2 ⁇ R + R prox
  • Q is the quality
  • w the angular frequency
  • L the inductance of the two loops (without magnetic coupling)
  • R the ohmic resistance
  • ⁇ M the magnetic coupling
  • the losses R prox due to the current displacement are small compared to the ohmic resistance R when the distance of the tracks of the coil from the track width of the coil path deviates by less than 20%.
  • the gain due to the magnetic coupling ⁇ M is significant and therefore leads to a significant improvement in the quality Q of the coil.
  • Fig. 5 the increase of the inductance L with the loop number N of magnetically coupled loops is schematically shown as a diagram.
  • the inductance L of magnetically coupled loops increases disproportionately, in particular quadratically, as the number N of loops increases.
  • FIG. 6 shows a schematic layout of a first coil 11, a second coil 12 and leads 13a, 13b to the coils 11, 12.
  • the first coil 11 and the second coil 12 are connected in parallel and connected to each other via the leads 13a, 13b.
  • the first coil 11 has two conductor loops 11a and 11b, which comprise a common coil surface and thus effect a magnetic coupling ⁇ M.
  • the second coil 12 has two conductor loops 12a and 12b on, which include a common coil surface and thus cause a magnetic coupling wM.
  • the magnetic coupling ⁇ M is dependent on the coil surface encompassed by both loops 11a, 11b and 12a, 12b and thus also dependent on a web width b and a spacing d of the loops 11a, 11b and 12a, 12b of a coil 11, 12 ,
  • the inductance values of the first coil and the second are determined predominantly by an inductance component of the loops 11a, 11b and 12a, 12b.
  • the inductance component of the leads 13a, 13b is smaller by at least a factor of 20 than the inductance component of the loops 11a, 11b or 12a, 12b.
  • the coil spacing a is dimensioned such that the magnetic coupling between the coils 11 and 12 is smaller-preferably substantially smaller-than the magnetic coupling between the respective loops 11a, 11b or 12a, 12b.
  • the coil spacing a is greater than the sum s of two web widths b and a web distance d formed.
  • Fig. 7 shows a schematic equivalent circuit diagram of a voltage controlled oscillator having a first coil 11 and a second coil 12.
  • the first coil 11 and the second coil 12 are connected in parallel.
  • a capacitive unit C 1 and an amplifier element 20 with a parasitic capacitance C 2 are connected in parallel.
  • the parasitic capacitance C L1 of the first coil 11 and the parasitic capacitance C L2 of the second coil 12 are connected in parallel.
  • a parallel resonance frequency thus depends on the parallel connection of these capacitances C 1 , C 2 , C L1 and C L2 .
  • the capacitance value of the capacitive unit C1 is adjustable.
  • the capacitive unit C1 therefore comprises at least one metal-insulator-metal capacitor, a varactor, a switched MIM capacitor and / or a switched capacitor bank.
  • FIG. 8 shows a simplified block diagram of a transmitting / receiving device for a data transmission system according to IEEE 802.16 ("WiMax", worldwide interoperability for microwave access).
  • WiMax worldwide interoperability for microwave access
  • the transmitting / receiving device 50 has an antenna 51 and a transmitter / receiver unit (transceiver) 52 connected to the antenna.
  • the transmitting / receiving unit 52 includes an RF front-end circuit 53 connected to the antenna 51 and a downstream IF / BB signal processing unit 54. Furthermore, the transmitting / receiving unit 52 does not include a Fig. 4 shown and connected to the antenna 51 transmission path.
  • the RF front-end circuit 53 amplifies a high-frequency radio signal xRF spectrally received in the microwave range between 3.4 and 3.6 GHz received by the antenna 51 and converts (transforms) it into a quadrature signal z in an intermediate frequency range (intermediate frequency, IF) or in the baseband area ("zero IF").
  • the quadrature signal z is a complex-valued signal with an in-phase component zi and a quadrature-phase component zq.
  • the IF / BB signal processing unit 54 filters the quadrature signal z and possibly shifts it spectrally to baseband, demodulates the baseband signal and detects the data contained therein and originally transmitted by another transceiver.
  • the RF front-end circuit 53 has a low-noise amplifier (LNA) 58 connected to the antenna 51 for amplifying the high-frequency radio signal xRF and a downstream quadrature mixer 55 for converting the amplified signal into the quadrature signal z. Furthermore, the RF front-end circuit 53 has a circuit arrangement 56 and a downstream I / Q generator 57, which is connected on the output side to the quadrature mixer 55.
  • the circuit 56 has a controlled oscillator.
  • the circuit arrangement 56 advantageously has a voltage-controlled oscillator (VCO), the frequency of which is set relatively coarse by means of control voltages and fine-tuned with the aid of further (possibly PLL-controlled) control voltages.
  • VCO voltage-controlled oscillator
  • the circuitry 56 is as described above with reference to FIGS FIGS. 6 and 7 realized embodiment described.
  • the I / Q generator 57 derives from the local oscillator signal y0 of the circuit 56 a differential in-phase signal yi and a quadrature-phase quadrature phase signal yq phase-shifted by 90 degrees. Possibly.
  • the I / Q generator 57 includes a frequency divider, gain elements, and / or unit that ensures that the phase offset of the yi and yq signals is as close to 90 degrees as possible.
  • the RF front-end circuit 53 and thus the at least one circuit 56 as well as possibly parts of the IF / BB signal processing unit 54, are part of an integrated circuit (IC), which is e.g. is designed as a monolithic integrated circuit in a standard technology, for example in a BiCMOS technology.
  • IC integrated circuit
  • the monolithically integrated inductance described above with reference to exemplary embodiments can be used in a wide variety of ways Applications such as in oscillator, amplifier and filter circuits (adjustable transfer function, bandwidth, etc.) can be used advantageously.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
EP08010431A 2007-06-12 2008-06-09 Induction monolithique intégrée Withdrawn EP2003659A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102007027612A DE102007027612B4 (de) 2007-06-12 2007-06-12 Monolithisch integrierte Induktivität

Publications (1)

Publication Number Publication Date
EP2003659A1 true EP2003659A1 (fr) 2008-12-17

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EP08010431A Withdrawn EP2003659A1 (fr) 2007-06-12 2008-06-09 Induction monolithique intégrée

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US (1) US20080309429A1 (fr)
EP (1) EP2003659A1 (fr)
DE (1) DE102007027612B4 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8159314B1 (en) * 2008-08-04 2012-04-17 Rockwell Collins, Inc. Actively tuned filter
EP2421011A1 (fr) * 2010-08-19 2012-02-22 Nxp B.V. Inducteur symétrique
US10068699B1 (en) * 2017-03-01 2018-09-04 Realtek Semiconductor Corp. Integrated inductor and fabrication method thereof
US11328859B2 (en) * 2017-12-28 2022-05-10 Realtek Semiconductor Corp. High isolation integrated inductor and method therof
CN112840416B (zh) * 2018-12-26 2022-09-23 华为技术有限公司 一种电感、集成电路以及电子设备
TWI722952B (zh) * 2019-09-11 2021-03-21 瑞昱半導體股份有限公司 電感裝置

Citations (3)

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Publication number Priority date Publication date Assignee Title
US5420558A (en) * 1992-05-27 1995-05-30 Fuji Electric Co., Ltd. Thin film transformer
US20030001709A1 (en) * 2001-06-29 2003-01-02 Visser Hendrik Arend Multiple-interleaved integrated circuit transformer
WO2008034597A1 (fr) * 2006-09-21 2008-03-27 Atmel Duisburg Gmbh Arrangement de circuit intégré et utilisation de lignes d'arrivée

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DE7711313U1 (de) * 1977-04-09 1977-07-28 Robert Bosch Gmbh, 7000 Stuttgart Gedruckte filteranordnung, insbesondere durchschleiffilter
JPS6379307A (ja) * 1986-09-22 1988-04-09 Murata Mfg Co Ltd 積層トランス
US20030160299A1 (en) * 2002-02-12 2003-08-28 Harry Contopanagos On- chip inductor having improved quality factor and method of manufacture thereof
DE10233980A1 (de) * 2002-07-25 2004-02-12 Philips Intellectual Property & Standards Gmbh Planarinduktivität
US7400025B2 (en) * 2003-05-21 2008-07-15 Texas Instruments Incorporated Integrated circuit inductor with integrated vias
US7786836B2 (en) * 2005-07-19 2010-08-31 Lctank Llc Fabrication of inductors in transformer based tank circuitry
GB0523969D0 (en) * 2005-11-25 2006-01-04 Zarlink Semiconductor Ltd Inductivwe component

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420558A (en) * 1992-05-27 1995-05-30 Fuji Electric Co., Ltd. Thin film transformer
US20030001709A1 (en) * 2001-06-29 2003-01-02 Visser Hendrik Arend Multiple-interleaved integrated circuit transformer
WO2008034597A1 (fr) * 2006-09-21 2008-03-27 Atmel Duisburg Gmbh Arrangement de circuit intégré et utilisation de lignes d'arrivée
DE102006044570A1 (de) * 2006-09-21 2008-04-03 Atmel Duisburg Gmbh Integrierte Schaltungsanordnung und integrierte Schaltung

Non-Patent Citations (1)

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Title
U. TIETZE; CH. SCHENK: "Halbleiter-Schaltungstechnik", 2002, pages: 1329

Also Published As

Publication number Publication date
DE102007027612A1 (de) 2008-12-18
DE102007027612B4 (de) 2009-04-02
US20080309429A1 (en) 2008-12-18

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