EP1986136A1 - Transponderschaltung mit doppelter Taktableitungseinheit - Google Patents

Transponderschaltung mit doppelter Taktableitungseinheit Download PDF

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Publication number
EP1986136A1
EP1986136A1 EP07106985A EP07106985A EP1986136A1 EP 1986136 A1 EP1986136 A1 EP 1986136A1 EP 07106985 A EP07106985 A EP 07106985A EP 07106985 A EP07106985 A EP 07106985A EP 1986136 A1 EP1986136 A1 EP 1986136A1
Authority
EP
European Patent Office
Prior art keywords
clock
signal
extractor
clock extractor
clk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP07106985A
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English (en)
French (fr)
Other versions
EP1986136B1 (de
Inventor
Maksimilijan Stiglic
Zoran Randjelovic
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EM Microelectronic Marin SA
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EM Microelectronic Marin SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EM Microelectronic Marin SA filed Critical EM Microelectronic Marin SA
Priority to EP07106985A priority Critical patent/EP1986136B1/de
Priority to DE602007009488T priority patent/DE602007009488D1/de
Priority to AT07106985T priority patent/ATE483208T1/de
Priority to TW097113731A priority patent/TWI446270B/zh
Priority to US12/110,760 priority patent/US8195100B2/en
Publication of EP1986136A1 publication Critical patent/EP1986136A1/de
Application granted granted Critical
Publication of EP1986136B1 publication Critical patent/EP1986136B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Definitions

  • the invention relates to a transponder circuit with a double clock extractor unit.
  • the transponder circuit includes an antenna coil connected to a modulator rectifier block for providing a rectified circuit supply voltage based on an alternating magnetic field of a sensed radio frequency signal.
  • a terminal of the antenna coil is connected to the dual clock extractor unit, which provides a clock signal to a control logic.
  • This control logic makes it possible to supply a modulating signal to the modulator rectifier block for the transmission of a data signal by the antenna coil.
  • the use of a double clock extractor in a transponder circuit of the passive type is known in particular by the patent EP 1 301 898 .
  • the passive transponder circuit includes an antenna for sensing a sinusoidal electromagnetic signal from data or commands from a nearby reader.
  • the antenna is connected to the dual clock extractor and to a rectifier that produces a stable power supply rectified voltage to the transponder circuit portions based on the sensed electromagnetic signal.
  • the transponder circuit further comprises a demodulator, a control logic circuit and a modulator.
  • the demodulator is connected between the double clock extractor and the logic circuit, while the modulator is controlled by the logic circuit for the transmission of a data signal by the antenna.
  • the first low clock extractor of the patent transponder circuit EP 1 301 898 is realized using two simple inverters, whose switching threshold voltage is close to 1 V.
  • a clock signal, supplied to the demodulator, is produced by this first clock extractor only if the amplitude of the signal picked up by the antenna is greater than 1 V, otherwise the clock signal is interrupted.
  • the second high clock extractor is realized using a PMOS input transistor, a polarized inverter controlled by the input transistor, a rectifier and two current sources.
  • a clock signal supplied to the demodulator is produced by the second clock extractor only if the amplitude of the signal picked up by the antenna is greater than a high switching threshold greater than the threshold of the first clock extractor.
  • the double clock extractor with two different threshold levels only makes it possible to guarantee a pause of very short duration before a new transmission of the sinusoidal signal of the reader.
  • this transponder circuit with a double clock extractor is not designed to detect a stop of the magnetic field of the signal produced by the reader before a demodulation of data or commands following the shutdown of the field.
  • a passive transponder circuit may include a single sensitive clock extractor, which requires a sensitivity of about 100 mV. This sensitive clock extractor can be used even if the amplitude of the signal picked up by the antenna coil of the transponder circuit is below 150 mV peak, when a switch of the modulator is in an ON or ON state.
  • the main purpose of the invention is therefore to provide a transponder circuit with a double clock extractor capable of detecting an alternating magnetic field stop of a signal picked up by the antenna coil, independently of the state of a modulator in operation, in order to overcome the disadvantages mentioned above.
  • the invention relates to a transponder circuit with double clock extractor unit cited above, which comprises the features mentioned in claim 1.
  • An advantage of the transponder circuit lies in the fact that the first sensitive clock extractor of the dual clock extractor unit is selected when a modulation signal for the modulator is in a first state, while the second digitizer extractor is selected in the first state. Inverter clock is selected when the modulation signal for the modulator is in a second state.
  • the first high state of the control signal enables a switch of the modulator to be switched to a conductive state ON, while the second low state of the control signal enables the switch to be turned OFF.
  • the modulator can remain thus always in function upon receipt of an alternating magnetic field of a radiofrequency signal picked up by the antenna coil.
  • the first sensitive clock extractor is designed to have a switching threshold lower than the switching threshold of the modulator rectifier block for rectifying the AC voltage of the coil.
  • the threshold of the first clock extractor may be of the order of 100 mV.
  • the second inverter clock extractor is made by cons to have a switching threshold greater than or equal to the threshold of the modulator rectifier block, for example of the order of 0.6 V.
  • the dual clock extractor unit comprises a bistable flip-flop input controlled by the modulation signal and a signal combining the modulation signal with the clock signal of the second clock extractor, and a multiplexer controlled by the selection signal provided by the flip-flop.
  • the multiplexer receives as input the first and second clock signals of the first and second clock extractors and provides an output clock signal dependent on the state of the selection signal. Thanks to an arrangement of logic gates, the rocker and of the multiplexer, no loss of pulses of the clock signal, which is outputted from the double clock extractor unit, appears in particular during the transition from the high state to the low state of the signal of modulation.
  • the clock signal of the first clock extractor therefore remains selected at the output of the dual clock extractor unit even if the modulation signal goes to the low state, and until the voltage level at the input of the unit is greater than or equal to the threshold of the second inverter clock extractor.
  • the passage of the modulation signal from the low state to the high state causes no loss of pulses of the clock signal at the output of the double extractor unit.
  • a monostable flip-flop is disposed between the dual clock extractor unit and the control logic to be able to provide a signal for detecting the stop of the field on a falling edge coming from the double extractor unit. clock after a specified period of time.
  • This monostable flip-flop is able to detect the shutdown of the field regardless of the state of the modulation signal of the modulator in operation.
  • this transponder circuit is of the passive type and configured for receiving and transmitting low frequency radio frequency signals in a range of 100 to 150 kHz.
  • the figure 1 schematically shows the essential components of a low-power transponder circuit passive type 1 according to the invention can operate for example at a frequency of the order of 125 kHz.
  • This transponder circuit 1 firstly comprises an antenna coil 10 connected by two terminals B1, B2 to a modulator rectifier block 2, explained hereinafter with reference to FIG. figure 2 .
  • This rectifier block 2 supplies a rectified supply voltage V DD for supplying the components of the transponder circuit on the basis of an alternating magnetic field of sufficient amplitude of a radiofrequency signal picked up by the antenna coil.
  • the radiofrequency signal which is picked up by the antenna coil, can come from a reader situated in a close neighborhood of the transponder circuit 1, for example in a zone of a few meters around the transponder circuit.
  • the radiofrequency signal transmitted by the reader is first of all an interrogation signal so as to detect any nearby transponder circuit capable of responding to the interrogation signal.
  • the reader can transmit mainly by amplitude modulation data and / or commands in the radiofrequency signal with determined carrier frequency.
  • the transponder circuit 1 also comprises a double clock extractor unit 3, which will be explained in more detail below with reference to FIG. figure 3 connected to at least one terminal B1 of the antenna coil 10, control logic 6 clocked by a clock signal CLK provided by the dual clock extractor unit, and a power-up control block POR 5 to provide voltage regulation and proper initialization of the control logic 6.
  • the control logic 6 provides a modulation signal MOD to the modulator rectifier block 2 for transmitting a radio frequency signal of data by the antenna coil, as well as to the double clock extractor unit for selecting one or the other clock extractor.
  • the clock signal of a sensitive clock extractor of the dual clock extractor unit 3 is selected by the modulation signal, when the modulation signal MOD is in a first high state defined ON.
  • the clock signal of a second inverter clock extractor is selected when the modulation signal MOD is in a second low state defined OFF.
  • a monostable flip-flop 4 called monoflop in English terminology, is also provided to receive the clock signal CLK from the dual clock extractor unit 3 and to supply an interrupt signal T OUT of the radio frequency signal to the control logic following a stop of the clock signal.
  • the interrupt signal T OUT makes it possible for the control logic to know the time at which reception of data and / or commands transmitted in the radiofrequency signal following the shutdown of the field begins.
  • the reaction time of this monostable flip-flop is greater than the amplitude transition time of the AC voltage at the antenna coil due to the change of state of the modulation signal MOD. In this way, the interrupt signal T OUT is produced to inform the control logic 6 only when the clock signal has stopped for at least the reaction time of this monostable flip-flop 4.
  • the low-power transponder circuit of the passive type 1 can be produced for example with a structure similar to a transponder circuit marketed by the company EM Microelectronic-Marin SA in Switzerland, under the reference EM 4205 or EM 4305 "512 bit READ / WRITE CONTACTLESS IDENTIFICATION DEVICE. " It therefore also includes a demodulator and a memory, in particular of the EEPROM type, which are not represented in FIG. figure 1 .
  • the figure 2 represents the different elements of the modulator rectifier block 2.
  • a capacitor Cr is connected in parallel to the two terminals B1 and B2 of the antenna coil 10 in order to form a resonant circuit with the coil.
  • the inductance L of the antenna coil 10 and the capacitive value of the capacitor Cr are chosen as a function of the carrier frequency of the radiofrequency signal to be sensed.
  • the rectifier part for converting the alternating voltage of the resonant circuit, induced by the alternating magnetic field of a captured radio frequency signal, into a rectified supply voltage V DD is well known to a person skilled in this technical field. It consists of a full-wave rectifier.
  • This rectifier part therefore comprises a first NMOS transistor T1 and a second NMOS transistor T2, which are connected in series between the two terminals B1 and B2 of the resonant circuit, a diode D1, a diode D2 and a capacitor Cs for storing the rectified voltage V DD .
  • the drain terminal of the first transistor T1 is connected to the terminal B1 of the resonant circuit.
  • the gate terminal of transistor T1 is connected to terminal B2 of the resonant circuit, and the source terminal of transistor T1 is connected to the drain terminal of transistor T2.
  • the gate terminal of transistor T2 is connected to terminal B1 of the resonant circuit, and the source terminal of transistor T2 is connected to terminal B2 of the resonant circuit.
  • the GND ground terminal of the capacitor Cs is connected to the connection node between the first and second transistors T1 and T2.
  • the anode of the diode D1 is connected to the terminal B1.
  • the anode of the diode D2 is connected to the terminal B2.
  • the cathodes of the diodes D1 and D2 are connected to the terminal of the capacitor Cs, which supplies the rectified voltage V DD .
  • the amplitude of the alternating voltage of the resonant circuit is greater than the threshold of the rectifier, which corresponds to the threshold of a conventional inverter, that is to say say at the conduction threshold of each NMOS transistor.
  • This threshold voltage may be of the order of 0.6 V.
  • the modulator rectifier block also includes a modulator portion, which comprises at least one switch controlled by a mod modulation signal and a resistor to be paralleled to the resonant circuit.
  • This modulator part preferably comprises two switches, which consist of two NMOS transistors T3 and T4, and two resistors R1 and R2, which may be of the same value.
  • the source terminal of the transistor T3 and the drain terminal of the transistor T4 are connected to the ground terminal GND.
  • the resistor R1 is connected between the terminal B1 of the resonant circuit and the drain terminal of the transistor T3, while the resistor R2 is connected between the terminal B2 of the resonant circuit and the source terminal of the transistor T4.
  • the gate of the two transistors T3 and T4 is controlled by the modulation signal MOD.
  • each transistor T3 and T4 becomes conductive.
  • the two resistors R1 and R2 are connected in parallel to the resonant circuit.
  • the amplitude may decrease, for example, to an AC voltage value of the order of 150 mV, well below the threshold of the rectifier.
  • the modulation signal MOD when the modulation signal MOD is in the low state defined OFF at a voltage value lower than the threshold voltage of each transistor T3 and T4, the two transistors are in a non-conducting state.
  • the amplitude of the alternating voltage of the resonant circuit remains at the highest level depending on the amplitude of the radio frequency signal picked up.
  • This amplitude modulation for the transponder circuit of the present invention may be a deep amplitude modulation, called "deep modulation" in English terminology.
  • the amplitude of the alternating voltage of the resonant circuit generally does not fall below a threshold of an inverter.
  • a conventional transponder circuit which uses a simple inverter clock extractor, could be used.
  • the transition time from a low level to a high level of the amplitude of the AC voltage of the resonant circuit is longer, when switching from the ON state to the OFF state of the modulation signal, than the time of transition from the high level to the low level of the amplitude of the alternating voltage of the resonant circuit, during the transition from OFF to the ON state of the modulation signal.
  • the double extractor unit described below with reference to the figure 3 is configured to take this transition time into account so as to remain always synchronous without loss of pulses of the clock signal supplied at the output of the unit.
  • the dual clock extractor unit of the figure 3 comprises a first sensitive clock extractor 32, a second inverter clock extractor 31, 33, an RS 36 flip-flop, logic gates 34, 35 and a multiplexer 37 for providing a clock signal CLK of one of the extractors clock selected according to the state of the modulation signal MOD.
  • the first sensitive clock extractor is composed of a voltage comparator 32.
  • This voltage comparator 32 receives at a positive input the AC voltage coming from the antenna coil via the terminal B1, and at a negative input a low reference voltage. , for example of the order of 100 mV to define the low threshold of the sensitive clock extractor.
  • a clock signal CLK_ON which is composed of a series of pulses with a frequency identical to the frequency of the AC voltage of the antenna coil, is supplied at the output of the voltage comparator 32.
  • the peak voltage of the alternating voltage signal of the antenna coil is above the low threshold to produce the series of pulses of the clock signal CLK_ON.
  • the second inverter clock extractor is essentially composed of a first inverter 31, which can be followed by a second inverter 33 to output a clock signal CLK_OFF.
  • This clock signal CLK_OFF is composed of a series of pulses with a frequency identical to the frequency of the AC voltage of the antenna coil received by the terminal B1.
  • the series of pulses of the clock signal is produced as long as the peak voltage of the AC voltage signal of the antenna coil is above a high threshold of the inverter V TH which may be of the order of 0.6 V. This high threshold can match that of an HVNMOS transistor.
  • the first inverter 31 may traditionally comprise, connected in series between the rectified supply voltage and the ground, a PMOS transistor and an NMOS transistor.
  • the PMOS transistor may be small channel, while the NMOS transistor may be large channel to achieve an unbalanced inverter.
  • the connected gates of these two transistors are controlled by the AC voltage of the antenna coil, while the connection node of the two transistors provides a clock signal, which is inverted by the second inverter 33 to provide the clock signal. CLK_OFF.
  • the flip-flop RS 36 of the dual clock extractor unit is controlled at an input S (Select) by the modulation signal MOD and at a reset input R (Reset) by a signal combining the signal of MOD modulation with clock signal CLK_OFF of the second clock extractor.
  • This combination of the signals is obtained by an AND logic gate 35, which receives as input the inverse modulation signal by an inverter 34 and the clock signal CLK_OFF, in order to supply the combined signal to the input R (Reset) of the RS rocker. In this way, it avoids having at the same time at the inputs S and R of the flip-flop a high state defined as a "1" binary, which can generate an undesired state Q output of the flip-flop.
  • the selection signal SEL at the output of the flip-flop RS 36 is supplied to the multiplexer 37, which receives as input the two clock signals CLK_ON and CLK_OFF of the two clock extractors. Depending on the state of the selection signal SEL, the clock signal of only one of the clock extractors is output from the multiplexer.
  • the clock signal CLK at the output of the multiplexer 37 makes it possible to clock the control logic of the transponder circuit and to be supplied to the monostable flip-flop for detecting a stop of the magnetic field picked up by the antenna coil.
  • figure 4 represents different voltage-in-time signals found in the dual clock extractor unit.
  • the alternating voltage VB1 is represented at the terminal B1 of the antenna coil of frequency close to 125 kHz.
  • This AC voltage present at the terminal B1 has a maximum amplitude shown close to 1.8 V, when the modulation signal MOD is in the low state defined by OFF.
  • the form of this maximum amplitude AC voltage present at the terminal B1 of the antenna coil is only the half-wave of the total AC voltage present at the two terminals of the antenna coil. This is due to the operation of the modulator rectifier block, which rectifies the AC voltage across the antenna coil since the amplitude of this voltage is above the threshold of the rectifier, which corresponds to the inverting threshold V TH .
  • the amplitude of this alternating voltage VB1 is strongly and rapidly reduced towards a value, for example close to 150 mV, when the modulation signal MOD goes from the low state defined by OFF to the high state defined by ON.
  • the AC voltage signal at terminal B1 of the antenna coil is sinusoidally centered with respect to ground.
  • transponder dual clock extractor circuit can be designed by those skilled in the art without departing from the scope of the invention defined by the claims. It can be provided that the transponder circuit is configurable to be of the active type instead of passive. It should be noted that the transponder circuit can be designed to also pick up signals at HF, VHF or UHF frequency.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Near-Field Transmission Systems (AREA)
  • Radar Systems Or Details Thereof (AREA)
EP07106985A 2007-04-26 2007-04-26 Transponderschaltung mit doppelter Taktableitungseinheit Active EP1986136B1 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP07106985A EP1986136B1 (de) 2007-04-26 2007-04-26 Transponderschaltung mit doppelter Taktableitungseinheit
DE602007009488T DE602007009488D1 (de) 2007-04-26 2007-04-26 Transponderschaltung mit doppelter Taktableitungseinheit
AT07106985T ATE483208T1 (de) 2007-04-26 2007-04-26 Transponderschaltung mit doppelter taktableitungseinheit
TW097113731A TWI446270B (zh) 2007-04-26 2008-04-16 具雙時脈抽取單元之應答器電路
US12/110,760 US8195100B2 (en) 2007-04-26 2008-04-28 Transponder circuit with double clock extractor unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP07106985A EP1986136B1 (de) 2007-04-26 2007-04-26 Transponderschaltung mit doppelter Taktableitungseinheit

Publications (2)

Publication Number Publication Date
EP1986136A1 true EP1986136A1 (de) 2008-10-29
EP1986136B1 EP1986136B1 (de) 2010-09-29

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EP07106985A Active EP1986136B1 (de) 2007-04-26 2007-04-26 Transponderschaltung mit doppelter Taktableitungseinheit

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US (1) US8195100B2 (de)
EP (1) EP1986136B1 (de)
AT (1) ATE483208T1 (de)
DE (1) DE602007009488D1 (de)
TW (1) TWI446270B (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3809329A1 (de) * 2019-10-15 2021-04-21 Nxp B.V. Taktwiederherstellung in einem rfid-transponder

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE472779T1 (de) * 2007-12-27 2010-07-15 Em Microelectronic Marin Sa Elektronischer schaltkreis für nicht initialisierten anrufbeantworter bei einschaltung der versorgungsspannung
JP5750031B2 (ja) * 2010-11-19 2015-07-15 株式会社半導体エネルギー研究所 電子回路及び半導体装置
EP3496004B1 (de) 2017-12-08 2020-11-25 Nxp B.V. Aktiver empfänger für verbundene rfid-etiketten
EP3572968B1 (de) * 2018-05-22 2021-08-04 Nxp B.V. Clock-gating-einheit für einen transponder

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0883078A2 (de) 1997-06-05 1998-12-09 Nec Corporation Takteingangsschaltung
EP0936574A2 (de) 1998-02-10 1999-08-18 Sony Corporation Ic-Karte und Ic-Kartensystem
WO2002009028A1 (fr) * 2000-07-21 2002-01-31 Microcid Sa Transpondeur passif a faible consommation
EP1280099A1 (de) 2001-03-02 2003-01-29 Sony Corporation Chip für kontaktlose lese-/schreibvorrichtung mit funktion zur verwaltung der stromversorgung

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0883078A2 (de) 1997-06-05 1998-12-09 Nec Corporation Takteingangsschaltung
EP0936574A2 (de) 1998-02-10 1999-08-18 Sony Corporation Ic-Karte und Ic-Kartensystem
WO2002009028A1 (fr) * 2000-07-21 2002-01-31 Microcid Sa Transpondeur passif a faible consommation
EP1280099A1 (de) 2001-03-02 2003-01-29 Sony Corporation Chip für kontaktlose lese-/schreibvorrichtung mit funktion zur verwaltung der stromversorgung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3809329A1 (de) * 2019-10-15 2021-04-21 Nxp B.V. Taktwiederherstellung in einem rfid-transponder
US11206058B2 (en) 2019-10-15 2021-12-21 Nxp B.V. Clock recovery in an RFID transponder

Also Published As

Publication number Publication date
EP1986136B1 (de) 2010-09-29
TWI446270B (zh) 2014-07-21
US20080266061A1 (en) 2008-10-30
ATE483208T1 (de) 2010-10-15
TW200903341A (en) 2009-01-16
US8195100B2 (en) 2012-06-05
DE602007009488D1 (de) 2010-11-11

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